NetTAG: Multimodal Gate-Level Netlist Model

• NetTAG is a multimodal foundation model that reformulates gate-level netlists as text-attributed graphs, integrating symbolic logic with physical cell metadata.
• It employs a two-stage architecture combining ExprLLM for local gate semantics and TAGFormer to capture global circuit topology and physical characteristics.
• Through self-supervised training with cross-stage alignment, NetTAG achieves state-of-the-art results in functional reasoning and physical prediction for EDA tasks.

NetTAG is a foundation model developed for gate-level netlists that fuses rich gate-level semantics with global topological and physical circuit information, addressing both functional and physical prediction tasks in Electronic Design Automation (EDA). Moving beyond previous approaches—typically based on graph neural networks (GNNs) operating on and-inverter graphs (AIGs) or shallow graph types—NetTAG introduces a multimodal representation of circuits as text-attributed graphs, incorporating both symbolic logic and physical cell metadata. The model leverages a joint LLM-based gate encoder and a structural transformer, trained by a suite of self-supervised objectives with cross-stage alignment to higher- (RTL) and lower- (layout) level circuit abstractions, achieving state-of-the-art results across functional reasoning and physical estimation tasks (Fang et al., 12 Apr 2025).

1. Text-Attributed Graph (TAG) Representation

NetTAG reformulates a post-synthesis gate-level netlist $\mathcal{N}$ as a directed graph $G_\mathcal{N} = (\mathcal{T}, \mathcal{E})$, where nodes represent individual standard-cell instances and edges encode netlist connectivity. Each node $i$ is assigned a text attribute $t_i$, which concatenates:

• A symbolic logic expression, computed from the gate’s $k$-hop fan-in cone (e.g., $``U3 = !((R1 \oplus R2) \mid !R2)"$).
• A compact table of physical cell properties (power, area, delay, toggle rate, capacitances), extracted from standard-cell libraries.

This text-attributed node set $\mathcal{T} = \{ t_1, \ldots, t_m \}$, together with edge set $\mathcal{E}$, provides a multimodal embedding ground for downstream neural encoders. The use of text-annotated nodes enables symbolic logic and physical context to be preserved and exploited within modern language and graph modeling architectures.

2. Multimodal Model Architecture

NetTAG consists of two key encoders operating in sequence:

• ExprLLM (Gate-Semantics Encoder): A decoder-only LLM (e.g., Llama-3-8B modified via LLM2Vec) with causal attention converted to bidirectional. ExprLLM consumes each $t_i$ (logic+physical) and outputs $T_i = \mathrm{ExprLLM}(t_i) \in \mathbb{R}^d$. This embeds local gate-level semantics.
• TAGFormer (Graph-Structure Encoder): A graph transformer (e.g., SGFormer) ingests node features $G_\mathcal{N} = (\mathcal{T}, \mathcal{E})$0, with $G_\mathcal{N} = (\mathcal{T}, \mathcal{E})$1 the raw numeric physical attribute vector. A special [CLS] node is connected to all gates, such that the output embedding $G_\mathcal{N} = (\mathcal{T}, \mathcal{E})$2 summarizes circuit-level properties.

The fusion operates by first encoding local gate attributes via ExprLLM and subsequently refining those with the global netlist structure in TAGFormer:

$G_\mathcal{N} = (\mathcal{T}, \mathcal{E})$3

3. Self-Supervised Pre-Training and Loss Objectives

Training proceeds in two phases with stage-specific objectives:

Step 1: Gate-Level Semantic Pre-training (ExprLLM)

• Positive pairs of symbolic expressions (2-hop cones) are generated using random Boolean-equivalence rewrites (De Morgan, commutativity).
• InfoNCE loss encourages the LLM to cluster embeddings of logically equivalent expressions:

$G_\mathcal{N} = (\mathcal{T}, \mathcal{E})$4

Step 2: Graph-Level Fusion and Multistage Alignment (TAGFormer)

• Masked-Gate Reconstruction: Random subset $G_\mathcal{N} = (\mathcal{T}, \mathcal{E})$5 of gates is masked; model predicts each gate’s type (e.g., NOR, MUX):

$G_\mathcal{N} = (\mathcal{T}, \mathcal{E})$6

• Graph-Contrastive Objective: Positive samples are obtained via function-equivalent graph augmentations:

$G_\mathcal{N} = (\mathcal{T}, \mathcal{E})$7

• Graph-Size Regression: Gate-count awareness is enforced via regression:

$G_\mathcal{N} = (\mathcal{T}, \mathcal{E})$8

• Cross-Stage Contrastive Alignment:

Netlist embeddings $G_\mathcal{N} = (\mathcal{T}, \mathcal{E})$9 are aligned with RTL ($i$0 via LLM encoding) and layout ($i$1 via SPEF-derived graph transformer) using dual contrastive loss:

$i$2

Training alternates between $i$3 for local logic semantics and the sum of $i$4, $i$5, $i$6, and $i$7 for global structure and cross-stage alignment.

4. RTL and Layout Alignment Strategy

NetTAG employs cross-stage embedding alignment to capture both high-level (Register-Transfer Level, RTL) functionality and low-level layout physicality. The process involves:

• Segmenting sequential designs into register cones that are functionally invariant across stages.
• Encoding RTL sources via an LLM-based text encoder to obtain $i$8.
• Representing layout parasitics (e.g., extracted from SPEF) as a compact graph, then embedding this using a graph transformer for $i$9.
• Applying dual-form contrastive alignment $t_i$0 between netlist $t_i$1, RTL $t_i$2, and layout $t_i$3 embeddings.

This procedure forces latent representations to incorporate RTL semantics and layout-aware physics, enabling tasks such as early-stage performance, power, and area (PPA) estimation without explicitly specialized physical-aware architectures.

5. Empirical Benchmarking and Performance

NetTAG was evaluated across four distinct downstream tasks, demonstrating cross-domain generalizability:

Downstream Task	Reference Baseline	NetTAG Performance	Baseline Performance
Combinational gate-function identification	GNN-RE	97% accuracy	83% accuracy
State vs. data register classification	ReIGNN	90% sensitivity	46% sensitivity
		86% balanced accuracy	73% balanced accuracy
Endpoint-register timing-slack prediction	adapted GNN	Pearson $t_i$4, MAPE 15%	$t_i$5, MAPE 17%
Whole-circuit area/power prediction	EDA tool, PowPrediCT-GNN	Area MAPE 4–11%, Power MAPE 8–12%	EDA: Area MAPE 34%, GNN 18%
			EDA: Power MAPE 34–38%, GNN 12–19%

Additionally, on pure AIG datasets, NetTAG outperformed state-of-the-art AIG encoders (FGNN, DeepGate3) in combinational function identification. This indicates that multimodal semantic-structural fusion surpasses conventional graph-only deep learning (Fang et al., 12 Apr 2025).

6. Architectural and Algorithmic Insights

NetTAG introduces several methodological innovations:

• Text-Attributed Graphs: Logic formulas per gate are extracted algorithmically using PySMT, enabling scalable symbolic annotation across arbitrary netlist types without expensive truth table simulation. This permits compatibility with modern LLMs and avoids growth in complexity with function size.
• Two-Stage Pre-Training: Separating fine-grained Boolean formula understanding (ExprLLM) from global reasoning (TAGFormer) allows submodels to specialize, simplifying pre-training dynamics.
• Cross-Stage Contrastive Alignment: Anchoring netlist encodings to both RTL and layout domains provides early predictive accuracy for physical metrics without customized architectural changes for physicality.
• Register Cone Decomposition: Chunking large sequential designs into register cones promotes scalability and preserves correspondence across abstraction boundaries.
• Scalability: Monotonic scaling trends were observed with increases in both model and data size.

A plausible implication is that further scaling of NetTAG’s architecture and data could deliver additional gains in accuracy on complex, physically diverse, or high-level circuit tasks.

7. Broader Relevance and Comparative Advantages

NetTAG advances netlist representation learning by tightly integrating symbolic logic, physical cell data, and hierarchical structure, offering a unified encoder applicable to task-agnostic fine-tuning for both functional reasoning and prediction of physical metrics. Its design leverages verification infrastructure for ground-truth logic annotation and avoids limitations of earlier GNN-based models that only handle simplified gate types. Empirical results confirm NetTAG’s superiority on both functional and physical EDA benchmarks relative to task-specific and AIG-based graph encoders, demonstrating strict gains from multimodal fusion (Fang et al., 12 Apr 2025).