Integrated Silicon-Photonic NG-RC

• Integrated silicon-photonic NG-RC is a computing architecture that uses photonic neuron networks and passive star couplers to implement efficient nonlinear mappings.
• These platforms combine modulator-neuron networks and Volterra reservoirs to achieve GHz operation, high TOPS/mm², and compatibility with standard 220 nm SOI processes.
• Scalable designs with thermal tuning and linear readout training enable reconfigurable systems tailored for real-time prediction, classification, and signal processing.

Integrated silicon-photonic next-generation reservoir computing (NG-RC) systems are fully integrated photonic computing architectures that leverage the high bandwidth, parallelism, and configurability of silicon photonics for efficient machine learning and signal processing. These systems implement nonlinear dynamical mappings in hardware using passive and active photonic devices, with particular emphasis on scalability, spectral multiplexing, and compatibility with standard silicon-on-insulator (SOI) foundry processes. Integrated silicon-photonic NG-RC platforms include both modulator-class photonic neurons with O/E/O architectures and passive star coupler-based Volterra reservoirs, enabling high-throughput processing for tasks such as time-series prediction and classification (Tait et al., 2018, Wang et al., 2024).

1. Device Architectures and Photonic Integration

Two principal architectures define integrated silicon-photonic NG-RC: modulator-neuron networks and passive star-coupler-based reservoirs.

Modulator-Photonic Neuron: The architecture presented by Tait et al. utilizes two balanced vertical Si–Ge photodiodes (PD⁺, PD⁻) to receive wavelength-division multiplexed (WDM) optical inputs at multiple wavelengths (λ₁, λ₂, …), with responsivity $R_{pd} \approx 0.7\,\mathrm{A/W}$. An algebraic sum of the photodiode currents, combined with a bias current $I_b$, modulates the injection into a microring resonator (MRR) modulator embedded in a PN junction. The modulator, with an 11.5-μm radius, converts the sum into a voltage-dependent transmission that encodes the neuron’s optical output. Thermal tuning is provided by a TiN heater. Fabrication is accomplished in a standard 220 nm SOI process, ensuring compatibility with CMOS lines. The network is assembled as a WDM “broadcast-and-weight” fabric, where each neuron emits on its own λ and subsequent weighting and recombination are performed with tunable microrings (Tait et al., 2018).

Star Coupler Volterra Reservoir: The architecture demonstrated in (Wang et al., 2024) employs a passive silicon-photonic star coupler—specifically, a multimode-interferometer (MMI) structure with 9 inputs and 45 outputs—coupled to on-chip delay lines that implement time-delayed replicas of the input. Passive photodetection at the outputs provides quadratic (second-order Volterra) nonlinear transformation of the injected optical fields. Layout incorporates delay-line spiral waveguides around the central star coupler, minimizing footprint (total chip area ≈2 mm²). The structure is fabricated in a standard 220 nm SOI platform.

2. Mathematical Models and Reservoir Dynamics

Modulator-Neuron Mathematical Model

The electrical and optical transfer from the summed photodiode currents through the MRR modulator is governed by:

• $i_{pd} = R_{pd} P_{in}$
• $\Delta V = R_b i_{pd} = R_b R_{pd} P_{in}$
• MRR Lorentzian transmission: $$T_{mod}(V) \approx T_0 - \Delta T \frac{1}{1 + [2(\lambda_n - \lambda_{res}(V))/FWHM]^2}$$
• Output optical power: $$P_{out} = P_{pump} T_{mod}(V_b + R_b R_{pd} P_{in})$$
• Small-signal gain: $$g = P_{pump} \left. \frac{dT_{mod}}{dV} \right|_{V = V_b^*} R_{pd} R_b$$

A gain $g>1$ establishes optical cascadability. Nonlinear time-domain dynamics are described by:

$$C_{mod}\frac{dV}{dt} = -\frac{V-V_b}{R_b} + R_{pd}[P_{pump}T_{mod}(V) + P_{ext}(t)]$$

The neuron bandwidth is set by the electrical RC time constant and photon lifetime, supporting $\mathcal{O}(10-40)$ GHz operation for depletion-mode designs (Tait et al., 2018).

Star Coupler Volterra Reservoir Model

In the passive star-coupler NG-RC engine, inputs $I_b$0 are mapped optically via a unitary matrix $I_b$1 (elements $I_b$2). The output fields at the $I_b$3 outputs are:

$I_b$4

Photodetection provides quadratic nonlinearity, yielding detector outputs:

$I_b$5

This exactly implements a Volterra mapping with explicit separation of linear and quadratic components, allowing fully interpretable nonlinear feature space expansion (Wang et al., 2024).

3. Neural Behaviors and Reservoir Properties

Fan-in and Inhibition: Modulator-neuron networks realize multi-wavelength fan-in and signed weighting using thermally tuned microring weight banks routing inputs to PD⁺ or PD⁻, implementing the weighted, signed sum:

$I_b$6

Inhibitory contributions are handled directly in the electrical domain by PD⁻ subtraction. Passive star-coupler networks utilize delay lines for temporal fan-in, providing temporal memory.

Nonlinearity: MRR modulators provide configurable nonlinear transfer functions (sigmoidal, ReLU, RBF), enabling diverse neural computations. Quadratic nonlinearity in star-coupler networks arises from the photodetection operation, embedding second-order Volterra features deterministically.

Autaptic Cascadability and Bifurcation: Modulator neurons can form autaptic loops (output-to-input feedback on the same neuron) with weight unity, exhibiting cusp bifurcations and optical gain $I_b$7 beyond threshold pump power, directly observed through hysteresis and bifurcation measurements. This is essential for arbitrary-depth network cascades and rich dynamical behaviors (Tait et al., 2018).

4. Performance, Benchmarks, and Comparative Metrics

Key quantitative metrics for silicon-photonic NG-RC platforms are summarized in Table 1.

Platform	Area (mm²)	Speed (GHz)	TOPS/mm²
[Vandoorne et al. 2014]	16	0.125–12	N/A
[Nakajima et al. 2021]	1320	0.06	0.016
[Feldmann et al. 2021]	3.63	12	1.2
[Ashtiani et al. 2022]	9.3	21.7	3.5
[Bai et al. 2023]	0.131	17	1.04
(Wang et al., 2024) (Star Coupler RC)	2	60	103

• Modulation Speed: Modulator-neuron devices demonstrate 1 GHz continuous-wave modulation and sub-500 ps pulse-widths (FWHM); injection-mode devices reach 6 GHz, depletion-mode exceeds 40 GHz (Tait et al., 2018).
• Computing Density: The star-coupler Volterra NG-RC engine attains 103 TOPS/mm² at 60 Gbaud with 2 mm² area, orders-of-magnitude improvement over prior silicon-photonic RC (Wang et al., 2024).
• Latency and Bandwidth: Star coupler reservoirs achieve 0.2 ns latency and are compatible with 100–200 GHz modulators/detectors.
• Energy Consumption: Passive coupler-delay architectures eliminate DC power except for modulators and (if present) optical amplifiers. Modulator-neuron arrays dissipate ∼1 mW/neuron for thermal bias.
• Signal-to-Noise: MRR extinction ratio >10 dB; 1 GHz eye diagram shows >5 dB SNR (Tait et al., 2018).

Benchmark tasks include NARMA10 (normalized MSE ≈ 0.107 for m = 45 nodes), Lorenz ’63 chaotic forecasting (NMSE_z = 1.43 × 10⁻²), and image classification (COVID-19 X-ray, accuracy = 92.1%, AUC = 0.93) (Wang et al., 2024).

5. Scalability, Fabrication Tolerance, and Network Topologies

Integrated silicon-photonic NG-RC platforms leverage process compatibility and architectural strategies for high scalability:

• Multiplexing Capacity: Broadcast-and-weight WDM networks permit up to ∼75 wavelengths per bus (ring- to-ring spacing ≈0.4 nm).
• Integration Footprint: Star coupler designs support $I_b$8 delay lines and $I_b$9 outputs, with $i_{pd} = R_{pd} P_{in}$0 (quadratic scaling). Custom MMI designs optimize coupler area as $i_{pd} = R_{pd} P_{in}$1.
• Fabrication Tolerance: Variations in star coupler split ratios or waveguide dimensions affect only the hidden-state mapping matrix $i_{pd} = R_{pd} P_{in}$2, which is compensated during readout training. ∆t shift from ±20 nm width variation is <0.5 ps, absorbed during retraining (Wang et al., 2024).
• Reconfiguration: Thermal tuning per microring (∼0.1 mW/0.1 nm shift) allows runtime network reconfiguration for different tasks (Tait et al., 2018).

Potential bottlenecks include insertion loss in long spiral delay lines, photodetector linearity at high power, and bandwidth/readout speed limitations at large scale. Advanced on-chip amplification and high-speed detector/modulator technologies (e.g., LiNbO₃, Ge-on-Si) are active research directions (Wang et al., 2024).

6. Machine Learning Methodology and Interpretability

All NG-RC platforms utilize a fixed physical reservoir and train only the output (readout) layer via ridge regression (Tikhonov regularization):

• Readout Training: The output weight matrix $i_{pd} = R_{pd} P_{in}$3, mapping the high-dimensional reservoir state to task outputs, is optimized by solving a linear system ($i_{pd} = R_{pd} P_{in}$4 for $i_{pd} = R_{pd} P_{in}$5 inversion). No backpropagation is performed through the photonic layers.
• Interpretability: In the Volterra (star coupler) NG-RC, all linear and quadratic features are explicit, and their contributions to task performance can be directly assessed (Wang et al., 2024).
• Benchmarking: Reservoirs solve standard tasks at sub-microsecond (and picosecond-scale) latencies, with performance matching or exceeding prior integrated photonic reservoir computers.

A plausible implication is that the explicitness and retrainability of the hidden-state mapping in passive architectures enhance post-fabrication adaptability and network interpretability for next-generation AI co-processors.

7. Applications and Outlook

Integrated silicon-photonic NG-RC platforms enable ultrafast machine learning for signal processing, forecasting, and classification in domains requiring THz-scale bandwidth and sub-nanosecond latencies. Demonstrated applications include real-time time-series prediction, complex dynamical forecasting (Lorenz attractor), and biomedical image classification. The scalable, fabrication-tolerant architectures, combined with the flexibility of linear readout training, position these platforms as foundational hardware for next-generation high-speed photonic computing and signal processing. As integrated photonic technologies advance, especially in active-device bandwidth and on-chip amplification, silicon-photonic NG-RC architectures are expected to play a significant role in neuromorphic hardware and optical AI accelerators (Tait et al., 2018, Wang et al., 2024).