Holographic Random Circuit Sampling

• Holographic random circuit sampling is a protocol that uses mid-circuit measurements, register re-use, and circuit depth to exponentially expand the effective Hilbert space.
• It employs a two-register system and 2-design circuits to achieve rapid anticoncentration, providing both theoretical rigor and experimental validation.
• This approach enables scalable quantum advantage by allowing a fixed qubit device to sample from an exponentially large distribution.

The holographic random circuit sampling algorithm is a protocol that leverages repeated mid-circuit measurements, register re-use, and circuit depth to exponentially scale the effective dimension of a quantum sampling task far beyond the native physical qubit count. Recent work establishes its theoretical foundations, rigorous anticoncentration properties, and experimental viability for demonstrating quantum advantage on pre-fault-tolerant devices (Zhang et al., 7 Nov 2025).

1. Algorithmic Structure and Protocol

The algorithm partitions the quantum processor into two registers:

• System register $A$ of $N_A$ physical qubits
• Bath register $B$ of $N_B$ physical qubits

At each of $t$ sequential steps:

1. A random circuit $U_k$, typically an 8-layer hardware-efficient ansatz (approximate 2-design), acts jointly on $A \cup B$.
2. All qubits in $B$ are measured in the computational basis yielding outcome $z_k$; optionally, $B$ can be reset to $N_A$0.
3. After the final ($N_A$1-th) step, $N_A$2 is measured producing outcome $N_A$3.

The joint output is the “spatio-temporal” bitstring $N_A$4, living on $N_A$5 bits. While the physical device comprises only $N_A$6 qubits, repeated use and measurement of $N_A$7 at each step causes the effective Hilbert space dimension to scale as

$N_A$8

This constitutes the “holographic expansion,” wherein circuit depth $N_A$9 functions similar to additional logical qubits.

2. Theoretical Underpinnings: Collision Probability and Anticoncentration

Let $B$0 denote the collision probability for outcome distribution $B$1. Anticoncentration—essential for quantum advantage arguments—corresponds to $B$2.

The collision probability under ensemble averaging over step circuits $B$3 (2-designs), after $B$4 rounds, is rigorously computed as

$B$5

where $B$6, $B$7. Asymptotically ($B$8),

$B$9

with $N_B$0.

This demonstrates that even for moderate circuit depths $N_B$1, the output distribution closely approximates that of Haar-random circuits on $N_B$2 qubits. This implies that the sampling task remains exponentially anticoncentrated with respect to $N_B$3.

3. Sampling Complexity and Scaling Law

By construction,

$N_B$4

so log $N_B$5 scales linearly with both register size and circuit depth. In the regime $N_B$6, the effective sampling complexity grows exponentially in $N_B$7.

This scaling law allows physical devices with fixed qubit number to compete far past previous quantum hardware limits. For instance, with $N_B$8 and $N_B$9, a device with only 20 physical qubits samples from a 200-qubit distribution in Hilbert space.

4. Cross-Entropy Benchmarking and Noise Modeling

Fidelity between the experimental sampler $t$0 and the ideal Haar-random distribution $t$1 is quantified by linear cross-entropy benchmarking (XEB):

$t$2

For ideal Porter–Thomas output over $t$3 qubits $t$4; for uniform random output $t$5.

Under channel noise modeled as local depolarizing maps per step, the XEB decays approximately as

$t$6

where $t$7 is the depolarizing parameter. This formula captures both the per-step decay and the partial plateau due to repeated measurement and reset.

5. Experimental Realization and Empirical Results

On IBMQ Torino (27-qubit device), the protocol was implemented with

• Step circuit: 8-layer 1D hardware-efficient ansatz (single-qubit rotations + CZ in brick-wall pattern).
• Each step utilized mid-circuit measurement and optional reset of $t$8.
• Sampling: $t$9 shots per task, averaged over 10 random circuit instances per $U_k$0.

Key benchmarks:

• For $U_k$1, $U_k$2 ($U_k$3): $U_k$4, a 3-fold improvement over previous 83-qubit RCS.
• For $U_k$5, two-patch protocol, $U_k$6 ($U_k$7): $U_k$8.

This constitutes experimental sampling from a $U_k$9-dimensional space using only 20 physical qubits.

Each HRCS instance involved resource counts (per step): $A \cup B$0300 SX, $A \cup B$1200 RZ, $A \cup B$260 CZ. For $A \cup B$3 steps, total gate count exceeds 20,000 two-qubit gates.

6. Rigorous Bounds, Limitations, and Open Questions

All collision probability and $A \cup B$4th-moment results derive from sequential Haar-twirling identities on a “doubled” Hilbert space, assuming step circuits implement at least approximate 2-designs. The total variation distance to true Haar sampling over $A \cup B$5 qubits is $A \cup B$6.

Algorithmic and runtime limitations include:

• 2-design assumption: Hardware-efficient ansätze approximate but do not formally guarantee 2-design behavior.
• Complexity-theoretic hardness: While hardness evidence parallels random circuit sampling (RCS), full #P-hardness or rigorous average-case complexity results for HRCS remain open.
• Error accumulation: No error correction is employed; resilience derives only from circuit anticoncentration and mid-circuit measurements. Longer $A \cup B$7 eventually accumulates noise beyond error-mitigated or statistical averaging capabilities.
• Reset fidelity and mid-circuit measurement quality are critical to XEB performance.
• Scalability to larger $A \cup B$8 would necessitate QRAM-style error correction.

7. Comparison to Related "Holographic" Algorithms

HRCS shares conceptual foundations with teleportation-inspired algorithms for classical simulation of low-depth circuits (Chen et al., 2019) and measurement-driven state generation paradigms (Zhang et al., 2024). All exploit a trade-off between spatial quantum resources ($A \cup B$9) and temporal or circuit-depth resources ($B$0 or sequential rounds $B$1), often referred to as holographic space-time tradeoff.

Unlike classical holographic simulation, which allows memory-efficient contraction for low-depth wide circuits, HRCS achieves quantum advantage by physically sampling exponentially large joint bitstrings ($B$2) via repeated circuit application and measurement.

In holographic deep thermalization (Zhang et al., 2024), similar sequential measure–reset protocols enable Haar-random state generation with only $B$3 ancilla, with rigorous decoupling guarantees and empirical frame-potential and XEB benchmarks.

8. Implications and Significance

The HRCS algorithm demonstrates that circuit depth, when exploited in the presence of mid-circuit measurement and register re-use, functions holographically as additional qubits. This enables an exponential scaling of sampling complexity relative to physical qubit resources. Verified both by exact theoretical formulas for collision probability and empirically via cross-entropy benchmarking, HRCS establishes a new route to scalable quantum advantage on near-term devices with fixed qubit count.

A plausible implication is the possibility of extending quantum supremacy demonstrations to much larger effective Hilbert spaces without hardware scaling, subject to the caveats of noise management and formal hardness proofs. The protocol synthesizes space-time resource trade-offs into a practical sampling benchmark, expanding the frontier for experimental quantum advantage.