AXIS High-Speed X-ray Camera

• AXIS High-Speed Camera is a focal-plane detector system designed for high-throughput X-ray imaging spectroscopy with fast readout and low noise.
• It integrates advanced MIT Lincoln Laboratory CCDs with Stanford ASICs to achieve readout rates up to 20 times faster than previous soft X-ray instruments.
• The system employs modular design, precise calibration, and robust event-processing to maintain arcsecond imaging quality and accurate spectral performance.

Searching arXiv for recent AXIS high-speed camera papers and closely related instrumentation context. The High-Speed Camera on AXIS is the focal-plane detector system for the Advanced X-ray Imaging Satellite (AXIS), a NASA Probe mission concept designed to provide high-throughput, high-spatial-resolution X-ray imaging spectroscopy across the 0.3–10 keV band. Its design is driven by pile-up avoidance and spectroscopic fidelity: AXIS requires detectors with readout rates at least 20 times faster than previous soft X-ray imaging spectrometers flying aboard missions such as Chandra and Suzaku, while retaining low noise, excellent spectral performance, and low power. The camera couples large-format MIT Lincoln Laboratory CCDs to a Stanford-developed ASIC readout chain, with calibration treated as essential because the detector response determines the redistribution matrix file (RMF) and ancillary response file (ARF) used in scientific analysis (Miller et al., 2023, Grant et al., 19 Aug 2025).

1. Mission role and top-level requirements

AXIS is a single-instrument observatory, so the high-speed camera is not an auxiliary subsystem but the detector that turns incoming X-rays into measurable event data. The mission context reported for the current design includes 1.5″ HPD on-axis spatial resolution at 1 keV, 1.8″ HPD FoV-average spatial resolution, 3900 cm² on-axis effective area at 1 keV, 600 cm² on-axis effective area at 6 keV, and a 24′ diameter field of view. The detector requirements are set so that this optical performance is not compromised by photon pile-up or readout-induced spectral degradation (Miller et al., 19 Aug 2025).

Parameter	Requirement / goal	Reported value
Frame rate	Baseline / goal	≥ 5 fps / 20 fps
Pixel size	Baseline	24 µm (0.55 arcsec)
Readout noise	Requirement	≤ 3 e⁻ RMS
Focal-plane temperature	Operating point	−110 ± 0.1 °C
Energy resolution goals	At 0.5 / 1 / 6 keV	≤70 / ≤100 / ≤150 eV FWHM
Energy band	Mission band	0.3–10 keV

These numbers define the AXIS-specific meaning of “high speed.” In this context, high speed is not primarily a cadence objective in the optical time-domain sense; it is the readout regime required to preserve arcsecond-quality imaging, suppress pile-up from the mission’s large effective area, and maintain science-grade spectroscopy.

2. Detector architecture and focal plane layout

The focal plane consists of four detectors in a 2×2 array, covering 27′ × 27′ on the sky. The flight detector is the CCID100 from MIT Lincoln Laboratory. In the current design description, each CCD has 1440 × 1440 active pixels, 24 µm pixel size, 16 pJFET outputs per CCD, ≥ 2 MHz serial readout per output, ≥ 0.5 MHz parallel transfer rate, and ≤ 0.2 s full-frame read time. The CCDs are described as back-illuminated, thinned to 100 µm, treated with molecular beam epitaxy (MBE) to passivate the entrance window, and coated with a thin aluminum layer to block optical and UV photons. The ground-calibration plan further describes the CCID100 devices as 100 μm thick and fully depleted, with radiation tolerance features such as a trough and charge injection, plus an on-chip aluminum optical blocking filter (Miller et al., 19 Aug 2025, Grant et al., 19 Aug 2025).

A key design feature is the advanced single-layer polysilicon gate structure. The camera papers emphasize this gate structure as enabling fast clock transfers and low power; the 2023 design discussion states that single-layer gates can be placed closer together, which reduces the required voltage swings during charge transfer and therefore lowers power consumption per transfer. The output amplifier architecture is likewise central. Earlier design reports emphasized the transition from a single-stage MOSFET to a two-stage pJFET amplifier, described as providing similar noise performance at about 10 times faster readout rate (Miller et al., 2023).

The focal-plane modularity is also explicit. Each CCD+ASIC chain is mechanically and electrically independent, so a failure in one detector chain does not disable the rest of the focal plane. This architecture is significant for a long-duration mission because detector speed, noise, and resiliency are all treated as system-level observatory requirements rather than isolated component specifications.

3. Readout ASIC, front-end electronics, and event-processing chain

Each CCD is paired with Stanford’s Multi-Channel Readout Chip (MCRC) ASIC. In the 2025 update, the relevant prototype is the 8-channel MCRC-V1, with physical size 4.2 mm × 2.9 mm; two 8-channel chips are used together for a 16-channel CCID100 detector. The chip provides high-speed pre-amplification, buffering, and a fully differential output signal, and is presented as a lower-power, smaller-footprint alternative to conventional discrete electronics. The 2023 paper adds quantitative prototype characteristics for the MCRC v1.0: 1.63 e⁻ RMS input referred noise, ±320 mV input dynamic range, channel-to-channel crosstalk less than −75 dBc, roughly 31 mW/channel power consumption, approximately 50 MHz bandwidth, and around 5 ns effective rise time (Miller et al., 2023, Miller et al., 19 Aug 2025).

The Front-End Electronics (FEE) provide power and clock voltages to the focal plane, amplify and digitize the video signal, and control mechanisms and heaters. The updated architecture assigns one Camera Control (CC) board per CCD+ASIC chain and splits the FEE into two boxes, because the analog flex cable run must be ≤ 50 cm; each box handles two CCD chains and includes an identical Power Distribution Unit (PDU). Each CC board includes a Microchip PolarFire FPGA and Microchip ADCs. The current digitization architecture uses digital video waveform capture at 50 Msamples/s, while the earlier concept described state of the art digital video waveform capture at 40 Msamples/s using STMicroelectronics ADCs and PolarFire FPGAs (Miller et al., 19 Aug 2025, Miller et al., 2023).

Downstream, the Back-End Electronics (BEE) are developed by Penn State and SwRI. Their functions include X-ray event finding, telemetry reduction by several orders of magnitude, and transient monitoring with fast alerts for changing sources. The 2023 design describes FPGA-based Event Recognition Processor (ERP) boards performing bias correction, bad-pixel masking, local-maxima detection, thresholding, and event grading, and a Transient Analysis Module (TAM) that disseminates alerts within 10 minutes. Together, these subsystems make the AXIS camera a complete event-detection and event-selection pipeline rather than only a high-speed pixel readout device (Miller et al., 2023, Miller et al., 19 Aug 2025).

4. Quantitative performance and prototype measurements

Prototype measurements reported for the MIT/LL CCD technology show that the camera is on a path to meeting the AXIS requirements. In the 2025 update, noise measurements on the back-illuminated CCID89 show that all eight output nodes meet the ≤ 3 e⁻ RMS requirement at the lowest tested temperature, with performance characterized at 1 MHz. The same paper gives the operational mapping 1 MHz output → 7 fps and 2 MHz output → 14 fps for the 16-channel detector system, while also stating that the architecture supports up to 20 fps. It further reports that the 1 MHz measurements meet AXIS baseline spectral-resolution requirements at 0.5, 1, and 6 keV, and that a specific 5.9 keV measurement with CCID93 + MCRC-V1 at Stanford is very close to the fundamental Fano limit (Miller et al., 19 Aug 2025).

The 2023 paper provides the earlier prototype trajectory in more detail. For the back-illuminated CCID-89 (W10C6) at 2 MHz and −90°C, the read noise is reported as less than 2.5 e⁻ RMS for six of the eight outputs, and the Mn Kα line width is 137 eV FWHM including all multiplicities, better than the AXIS requirement of ≤ 150 eV FWHM at 6 keV. Table values given there include 2.2--3.4 e⁻ RMS read noise and 137 eV FWHM at 5.9 keV for CCID-89, 2.1--3.1 e⁻ RMS and 139 eV FWHM for CCID-94, and, for CCID-93, 83 eV FWHM at O K (0.53 keV) for all events, 63--67 eV FWHM for selected multiplicities, and 142 eV FWHM at 5.9 keV (Miller et al., 2023).

Soft-X-ray response remains a technically important aspect of the design. The 2023 report notes that simulations reproduced charge diffusion and thresholding but did not reproduce the observed low-energy tail, suggesting a loss mechanism other than pure diffusion. It interprets this as evidence for charge loss at the backside entrance window or related charge-transfer effects, while still concluding that the MBE backside processing is good enough to achieve the required soft response. This is significant because the AXIS camera is not only a fast detector; it is a fast detector required to preserve low-energy spectroscopy in a 100 μm-class silicon absorber (Miller et al., 2023).

5. Ground calibration, RMF/ARF generation, and absolute quantum efficiency

The ground-calibration plan treats detector characterization as essential because calibration time on orbit is scarce, astronomical calibration targets can be complex, time-variable, and multi-component, and some important detector properties, especially quantum efficiency, are difficult to infer from sparse in-orbit data alone. Once the flight camera is assembled, the only planned in-system verification is a radioactive $^{55}$Fe source in the camera door for aliveness and performance checks; there will be no large-scale ground calibration after assembly. The CCDs therefore must be thoroughly characterized before integration into the flight focal plane (Grant et al., 19 Aug 2025).

The calibration program has two major phases. First is screening of candidate flight devices. Devices are packaged with the Stanford ASIC and tested in a vacuum chamber at MIT Kavli’s X-ray Detector Lab using a cryostat capable of cooling to −120 °C, with an Archon controller providing biasing, clocking, and digitization. A $^{55}$Fe source provides Mn-Kα and Mn-Kβ lines at 5.9 and 6.4 keV, and screening measurements include readout noise, gain, spectral FWHM, charge transfer inefficiency (CTI), cosmetic defects, low-energy charge-collection behavior, and dark current. The stated screening criteria are Read noise < 3 e− RMS, FWHM < 150 eV at 6 keV, FWHM < 70 eV at 0.5 keV, CTI of a few × 10⁻⁶ or lower, and negligible dark current at −110 °C. A second screening source, $^{210}$Po with a Teflon target, produces C-K at 277 eV and F-K at 677 eV to probe low-energy response (Grant et al., 19 Aug 2025).

Second is more detailed calibration of selected flight candidates. Here the objective is to measure both spectral response and quantum efficiency (QE) well enough to generate the response products needed for science analysis. The plan explicitly distinguishes RMF, which maps incident photon energy to detected pulse-height distribution including fluorescence peaks, escape peaks, and low-energy tails/structures, from ARF, which gives the effective area versus energy including mirror throughput, filter transmission, and detector QE. Because mono-energetic sources cannot densely sample the whole band, the strategy is to measure response at a limited set of energies, build a physics-based model of the detector, fit that model to the calibration data, and then populate the calibration files from the best-fit model. For QE, the simplest model is a slab-and-stop model; for spectral response, the model must include electron cloud drift and diffusion, surface losses, pixelization effects, and charge transfer effects (Grant et al., 19 Aug 2025).

The calibration sources proposed to span the AXIS band are C-K: 277 eV, O-K: 525 eV, Al-K: 1.5 keV, Mn-Kα: 5.9 keV, and Cu-K: 8.0 keV. Low-energy lines, especially C-K and O-K, come from an In-Focus Monochromator (IFM) covering 175 eV to 1.5 keV. For calibration accuracy, the plan calls for at least 10,000 events per X-ray line per region of interest, following the precedent from ACIS. Absolute QE is to be anchored with a Sony STARVIS sCMOS device that will be absolutely calibrated at BESSY-II and then mounted on a translation stage in the AXIS calibration beamline. This detector is chosen because it is small, requires much less cooling, can be moved in and out of the beam, and has shown excellent soft X-ray spectroscopic performance (Grant et al., 19 Aug 2025).

6. Development status, subsystem updates, and observatory integration

The AXIS mission is reported as being in Phase A, with a planned launch around 2032. The camera effort is a collaboration involving MIT, Stanford University, the Pennsylvania State University, and the Southwest Research Institute. By the 2025 design update, a first lot of prototype CCID100 CCDs had completed fabrication and was to begin X-ray performance testing, while parallel, standardized test facilities had been established at the MIT X-ray Detector Lab and the Stanford X-ray Astronomy and Observational Cosmology group. A prototype FEE CC board was also in progress to demonstrate the AXIS waveform-digitization chain using selected flight-like FPGA and ADC components (Miller et al., 19 Aug 2025, Grant et al., 19 Aug 2025).

The camera body, or Sensor Module, incorporates several observatory-level functions beyond focal-plane readout. The automatic camera door has been redesigned for automated open/close operation with a stepper motor and includes an $^{55}$Fe calibration source that illuminates the focal plane with 5.9 keV photons when closed. A contamination blocking filter (CBF) made of thin aluminum and polyimide on a 95% open stainless-steel mesh protects against optical/UV light and molecular contamination. Because AXIS now flies to L2, a commandable shutter has been added: a 4-mm-thick aluminum blade rotated into the beam with a solenoid actuator to protect the focal plane from solar energetic particles and to enable non-X-ray background (NXB) measurements. Thermal control is now passive, with the focal plane held at −110 ± 0.1 °C via a stable −115 °C radiator/cold-strap interface (Miller et al., 19 Aug 2025).

Taken together, these updates show that the AXIS High-Speed Camera is not defined solely by faster CCD clocks. It is an integrated X-ray detector system whose CCD architecture, ASIC readout, digital waveform sampling, event-recognition chain, contamination control, radiation protection, and calibration program are all coupled to a single observatory requirement: to deliver high-throughput, high-spatial-resolution X-ray imaging spectroscopy with sufficiently fast readout to avoid pile-up while preserving the response fidelity needed for RMF and ARF generation.