Energy-to-Solution (ETS) Metrics

• Energy-to-Solution (ETS) is a figure of merit defining the total energy required to obtain a successful computational outcome, integrating both runtime and energy use.
• ETS formulations vary by domain, being expressed as products of core counts and runtimes, energy per inference for quantum circuits, or normalized energy per solution for CMOS Ising machines.
• The metric drives system design by highlighting trade-offs between execution speed and energy savings, guiding optimal parallelism, quantum shot usage, and annealing strategies.

Energy-to-Solution (ETS) is a figure of merit for the total energy required to obtain a successful computational outcome, used when runtime alone does not capture the full cost of solving a problem. In the cited literature, ETS is instantiated in several substrate-specific forms: in elastic combinatorial search it is the product of parallel core count and expected solve time, $E(k)=k\,s_k$; in hybrid quantum–classical fine-tuning it is the total electrical energy required to produce one inference result from the parameterized quantum circuit head; and in a CMOS Ising machine it is a normalized energy-per-solution metric derived from time-to-solution, $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$ (Hurley et al., 2016, Knitter et al., 4 May 2026, Salim et al., 28 Mar 2026). These formulations share a common purpose—coupling computational success to energy expenditure—but differ materially in normalization, success criteria, and measurement methodology.

1. Definitions and formal variants

Across the three works, ETS is not defined by a single universal equation; instead, each domain specifies an operational metric tailored to its hardware model and success condition (Hurley et al., 2016, Knitter et al., 4 May 2026, Salim et al., 28 Mar 2026).

Context	Success quantity	ETS expression
Elastic combinatorial search	Expected minimum runtime on $k$ parallel runs	$E(k)=k\,s_k$
Hybrid quantum–classical inference	One inference result	$E_{qpu}(Q)$ or $E_{gpu}(Q)$
CMOS Ising machine	99% overall success at a 99% Hamiltonian threshold	$$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$

In elastic combinatorial search, if $T(M)$ denotes expected solution time on $M$ independent searches in parallel, then total energy is approximated, up to a proportionality constant, by the product of time and active cores:

$E(M)\propto M\times T(M).$

Under identical-hardware assumptions, the normalized form becomes

$$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$0

where $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$1 is the empirically estimated expected solution time on $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$2 cores.

In the quantum fine-tuning study, ETS is the total electrical energy required to produce one inference result from the parameterized quantum circuit head. Appendix B gives

$$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$3

with $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$4 the qubit count, $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$5 and $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$6 the numbers of single- and two-qubit gates, $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$7, $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$8, $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$9, $k$0, $k$1, and $k$2. The corresponding GPU model includes a factor $k$3, the throughput $k$4 FLOPS, and the maximum power draw $k$5.

In the CMOS Ising-machine work, ETS is built from single-run success probability $k$6, time-to-solution (TTS), and average annealing power. TTS is

$k$7

with $k$8. Total energy per solution is

$k$9

and the normalized ETS metric is

$E(k)=k\,s_k$0

A recurring point is that ETS always encodes both a workload definition and a success definition. This suggests that ETS should be interpreted as a problem-specific objective rather than as a context-free energy number.

2. Stochastic search, order statistics, and elastic parallelism

In elastic combinatorial search, ETS arises from stochastic solver behavior. The one-core runtime distribution is described as heavy-tailed, so the expected runtime on $E(k)=k\,s_k$1 independent parallel runs is the mean of the minimum of $E(k)=k\,s_k$2 samples:

$E(k)=k\,s_k$3

The corresponding energy-to-solution is

$E(k)=k\,s_k$4

The paper estimates $E(k)=k\,s_k$5 empirically by drawing 100,000 sets of $E(k)=k\,s_k$6 seeds and averaging the minima, rather than fitting a parametric distribution (Hurley et al., 2016).

This formulation makes the role of order statistics explicit. Since $E(k)=k\,s_k$7 is non-increasing in $E(k)=k\,s_k$8, increasing the number of cores never worsens expected solution time. The energy term, however, multiplies this decreasing quantity by the number of active cores. As a result, time and energy need not move in the same direction.

The paper identifies several behaviors. If the runtime distribution is essentially uniform, then $E(k)=k\,s_k$9 for all $E_{qpu}(Q)$0, so $E_{qpu}(Q)$1 and the energy-optimal choice is $E_{qpu}(Q)$2. If the distribution is heavy-tailed, doubling the number of cores can more than halve $E_{qpu}(Q)$3, so $E_{qpu}(Q)$4 may initially decrease with increasing $E_{qpu}(Q)$5, attain a minimum, and then rise again as diminishing returns appear. In extreme cases, the minimum of $E_{qpu}(Q)$6 lies at the largest available $E_{qpu}(Q)$7. Figure 1 is described as showing industrial SAT instances for which expected solution time drops, sometimes by orders of magnitude, with as few as 2–10 cores; Figure 2 is described as showing log-scale ETS curves with different minima and “U-shaped” or “$E_{qpu}(Q)$8-shaped” forms.

The significance of this analysis is that “more parallelism” and “more energy efficiency” are not synonymous. A common misconception is that reducing wall-clock time automatically reduces the energy cost of a solve. In the elastic-solver setting, the opposite can occur once the reduction in $E_{qpu}(Q)$9 is too small to compensate for the increase in $E_{gpu}(Q)$0.

3. Optimal core count, Pareto trade-offs, and learned configuration

The elastic-solver work defines the energy-optimal parallelism level by

$E_{gpu}(Q)$1

Equivalently, $E_{gpu}(Q)$2 is the smallest $E_{gpu}(Q)$3 for which $E_{gpu}(Q)$4 is less than $E_{gpu}(Q)$5 for all $E_{gpu}(Q)$6. This optimization assumes that runtimes are independent across cores, all cores consume equal power, and parallel-run overheads are negligible (Hurley et al., 2016).

The paper further studies a time–energy Pareto frontier over 902 challenging industrial SAT instances. For each allowed slowdown factor $E_{gpu}(Q)$7, it selects the $E_{gpu}(Q)$8 that solves within $E_{gpu}(Q)$9 while minimizing energy. The reported aggregate trade-off is that increasing solution time by only 10% can reduce total energy by about 20%, and accepting a 20% slower solve reduces energy by roughly 40%. The immediate implication is that ETS optimization need not coincide with minimum-time operation; modest relaxations in latency can buy disproportionately large energy savings.

Because there is no one-size-fits-all $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$0, the authors train a random-forest regressor with 100 trees, using 138 standard static SAT features and stratified 10-fold cross-validation, to predict the energy-optimal core count. The features include clause-to-variable ratios, graph-based parameters, balance metrics, and Horn proportions. On the full benchmark set, the learned policy solves 98.7% of instances within the one-hour timeout, achieves mean solution time of 366.8 s, and reports total energy of 5 494 k cumulative CPU-seconds. The oracle “VB Solved” is reported at 362.4 s, while the ML policy uses 29% less total energy than the VB-Solved oracle and an order of magnitude less than the naïve 100-core policy at 23 227 k.

The deployment workflow is correspondingly concrete: compute the 138 instance features, query the trained random-forest model for $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$1, launch $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$2 parallel solver processes with different random seeds, and terminate the remaining $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$3 processes as soon as one finds a solution. If a slowdown bound $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$4 is specified, the empirical trade-off curve can be used to select a core count consistent with that bound.

4. ETS in hybrid quantum–classical fine-tuning

The quantum fine-tuning study defines ETS at the level of a single inference result from the parameterized quantum circuit head in a hybrid pipeline. The formal QPU model is

$$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$5

with $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$6, so that $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$7. The GPU statevector model includes an explicit $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$8 factor, so the paper concludes that $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$9 under the stated assumptions (Knitter et al., 4 May 2026).

A notable methodological feature is direct instrumentation of QPU power. The Forte Enterprise system logs power draw at 1 Hz for three device groupings: ion-trap electronics, cryogenic plus non-cryogenic cooling modules, and remaining peripherals. For each inference job, defined as a single sample’s 600 shots split across 25 transpiled variants for symmetrization, start and end timestamps are recorded and the energy is obtained by integrating the instantaneous power $T(M)$0 over the job interval. The authors report average power draws with fluctuations and note that cycle-to-cycle variations dominate any qubit-count dependence.

Empirically, inference circuits at qubit widths $T(M)$1 were executed with 600 shots and fixed circuit depth. On a semilog plot, the fitted models are

$T(M)$2

and

$T(M)$3

Extrapolating the fitted trends yields a break-even qubit count of approximately $T(M)$4, defined by $T(M)$5.

The study also places ETS in direct relation to model quality. In an accuracy study using up to 20,000 shots at $T(M)$6 on 250 held-out SST2 test samples, ideal noiseless simulation reaches 92.06% accuracy, noisy simulation attains up to 91.40%, raw QPU plus debiasing reaches 90.80%, and the non-linear aggregation filter (DNL) recovers 91.20%. The classical baselines are SVC at 89.56% and logistic regression at 89.06%. At $T(M)$7, the quantum head reduces classification error by 23.9% relative to SVC in simulation and by 15.7% on the QPU. The paper therefore treats ETS not in isolation but as part of an energy–accuracy trade-off, while cautioning that the reported scope is inference only and excludes the heavier costs of on-hardware gradient evaluation, full retraining, and quantum–classical training-loop overhead.

Section VI further compares against a Matrix Product State backend. Under the paper’s assumptions, MPS time scales as $T(M)$8, and with local cost functions $T(M)$9 this becomes $M$0 energy scaling, whereas QPU execution time is $M$1, implying energy scaling $M$2.

5. ETS in a CMOS Ising machine

In the CMOS Ising-machine work, ETS is defined through the probability of obtaining a high-quality solution and the time required to reach a prescribed overall success target. The single-run success probability $M$3 is the fraction of independent annealing runs that reach at least 99% of the best-known Hamiltonian. The target success probability is $M$4, and the time-to-solution is

$M$5

The total energy per solution is then $M$6, and the normalized metric is

$M$7

The normalization accounts simultaneously for graph connectivity and coupling resolution (Salim et al., 28 Mar 2026).

The machine is a 64-spin all-to-all current-mode coupling Ising machine in 65 nm CMOS. The design supports 31 coefficient levels in $M$8. During measurement, the die is powered from a precision supply/interface board; two function generators control the DAC bias rails for continuous refresh and periodic zeroing; an FPGA-based controller writes 5 bits per coupling into on-chip SRAM, sequences column-wise DAC refresh via an 80 MHz shift register, and drives a 64-bit LFSR for spin initialization; after each $M$9 anneal, spin states are latched and shifted out.

Power is recorded on the 1.2 V rail during active annealing, including continuous DAC refresh. Over random weighted all-to-all QUBOs with edge densities from 10% to 90% and $E(M)\propto M\times T(M).$0, the authors compute $E(M)\propto M\times T(M).$1, then TTS, then $E(M)\propto M\times T(M).$2. For $E(M)\propto M\times T(M).$3, the reported total power during anneal is $E(M)\propto M\times T(M).$4, the per-run anneal time is $E(M)\propto M\times T(M).$5, and the median TTS is $E(M)\propto M\times T(M).$6, yielding

$E(M)\propto M\times T(M).$7

With $E(M)\propto M\times T(M).$8 directed couplings and $E(M)\propto M\times T(M).$9, hence $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$00, the normalized metric is

$$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$01

A central architectural feature is continuous programming refresh. Without refresh, leakage alters the programmed couplings $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$02 and degrades solution quality. The refresh scheme scans columns at 80 MHz and reprograms the 5 DAC bits for each coupling cell every approximately $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$03. This both mitigates leakage and introduces deterministic landscape perturbation by zeroing a column’s couplings and then restoring them. The reported effect is a success-rate improvement of more than $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$04 compared to gradient-descent-only operation, thereby reducing TTS and lowering $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$05 and $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$06.

The work also emphasizes comparison across hardware types. Table II reports that planar or lattice designs have normalized $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$07, whereas this machine reports $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$08; the best prior ring-oscillator all-to-all result is listed as “not reported” for ETS.

6. Interpretation, comparability, and methodological limits

The three studies show that ETS is a common concept with divergent operational meanings. In one case it is a normalized proxy proportional to core-seconds, $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$09; in another it is directly instrumented electrical energy per inference result; in the third it is a success-normalized and size-normalized quantity in $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$10 (Hurley et al., 2016, Knitter et al., 4 May 2026, Salim et al., 28 Mar 2026). A direct numerical comparison across these values would therefore be inappropriate without first reconciling their success definitions and normalizations.

The success conditions differ substantially. Elastic search uses the expected minimum runtime over independent random seeds. The quantum study measures the energy required to produce one inference result, then separately studies the effect of larger shot budgets on classification accuracy. The Ising-machine study measures TTS to reach 99% overall success at a 99% Hamiltonian threshold. These are all legitimate ETS constructions, but they answer different questions.

The assumptions behind the metric also vary. The elastic-solver model assumes identical hardware per core, independent runtimes across cores, and negligible overheads from spawning parallel runs. The quantum study’s scaling and break-even analysis is specific to the Forte device, the NVIDIA L4, the chosen ansatz, and $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$11 shots, and it explicitly excludes the costs of training. The Ising-machine metric depends on the chosen normalization by $$ETS_{\text{edge-bit}}=E_{\text{total}}/(N_{\text{edges}}\log_2 C)$$12, on the fixed annealing time, and on the particular definition of success probability. This suggests that ETS is best interpreted within a workload family and an experimental protocol, not as a standalone cross-domain ranking.

A second recurring misconception is that ETS is reducible to either power or runtime alone. The cited work consistently rejects that simplification. In elastic search, more cores always reduce expected time but can increase energy. In quantum fine-tuning, better accuracy may require higher shot counts, producing a practical energy–accuracy trade-off. In the Ising machine, higher single-run success probability lowers TTS and therefore lowers total energy even when per-anneal power is unchanged. ETS is therefore a joint metric of execution cost and solution process, not a synonym for device power draw.

Taken together, these works position ETS as a rigorous systems-level criterion for solver configuration, hardware comparison, and algorithm–hardware co-design. The common principle is that a solution should be evaluated not only by whether it is obtained, or how quickly, but also by the energy budget required to obtain it under a specified operational definition.