DC-coupled Resistive Silicon Detectors (DCRSD)

• DC-RSDs are LGAD-based silicon sensors featuring a continuous p⁺ gain layer and n⁺ resistive electrode directly coupled to metal pads, ensuring inherent charge sharing and a 100% fill factor.
• They operate by triggering avalanche multiplication in the gain layer and lateral current sharing via a 2D resistive sheet, achieving sub-pitch spatial resolution and precise 4D tracking.
• Extensive TCAD and beam-test studies validate DC-RSD performance with controlled signal confinement, unipolar pulse output, and efficient leakage current management for enhanced timing.

DC-coupled Resistive Silicon Detectors (DC-RSD, also written DCRSD) are LGAD-based silicon sensors in which a continuous $p^+$ gain layer and a continuous $n^+$ resistive electrode are combined with metal readout pads that are directly DC-coupled to the resistive layer, without an intervening dielectric. The architecture was introduced as an evolution of AC-coupled Resistive Silicon Detectors (RSD, or AC-LGAD) to preserve built-in charge sharing, 100% fill factor, and LGAD-class timing while replacing AC-coupled bipolar pulses with unipolar pad currents and moving leakage-current handling from the sensor periphery to the front-end input stage (Menzio et al., 2022, Moscatelli et al., 14 Aug 2025). Within the broader resistive-silicon lineage, an earlier proof-of-concept 2D microstrip detector with poly-Si resistive electrodes had already established the viability of resistive charge division in silicon, reaching an average longitudinal resolution close to $1.2\%$ of strip length for a 6 MIP signal (Bassignana et al., 2011).

1. Device concept and architectural distinction

A DC-RSD is a Low-Gain Avalanche Diode with a continuous $p^+$ gain layer, a continuous $n^+$ resistive electrode on the top surface, segmentation provided only by metal pads placed on top of the resistive $n^+$ layer, no dielectric between the $n^+$ electrode and the readout pads, and direct coupling of each pad to the front-end electronics (Moscatelli et al., 14 Aug 2025). In this sense, DC-RSD retains the defining RSD features—gain everywhere under the surface and resistive lateral signal sharing—while changing the sensor-electronics interface from capacitive pickup to direct conduction-current readout (Moscatelli et al., 14 Aug 2025, Cartiglia et al., 2023).

The lineage is technically specific. Standard LGADs provide moderate avalanche multiplication in thin silicon but ordinarily rely on discrete segmentation. AC-RSDs solved the fill-factor problem by replacing segmented $n^+$ electrodes with a continuous $n^+$ resistive sheet and capacitively coupled pads, thereby enabling analog interpolation over large pixels. DC-RSD preserves the continuous gain and resistive sheet, but removes the AC-coupling dielectric and places ohmic contacts directly on the $n^+$ layer (Menzio et al., 2022, Croci et al., 22 Aug 2025).

Feature	AC-RSD (AC-LGAD)	DC-RSD
Pad coupling	Dielectric layer, typically SiO$n^+$0, between $n^+$1 and pads	No dielectric; metal pads form ohmic contacts on $n^+$2
Signal at pads	Bipolar	Unipolar conduction currents
Leakage-current handling	Collected at sensor edges	Seen and filtered by the front-end
Shared structural basis	Continuous $n^+$3 gain layer and continuous $n^+$4 resistive layer	Continuous $n^+$5 gain layer and continuous $n^+$6 resistive layer

This architectural change was motivated by specific limitations observed in AC-RSDs: bipolar signals, long tails, baseline fluctuations because leakage current is collected only at the sensor edge, position-dependent response, and scaling difficulties for large sensitive areas (Menzio et al., 2022, Croci et al., 22 Aug 2025). The DC-coupled variant was therefore formulated not as a different detector family, but as a refinement of resistive LGAD readout for future 4D tracking (Arcidiacono et al., 29 May 2025).

2. Physical operation and signal formation

DC-RSDs operate according to the standard LGAD principle. A shallow, moderately doped $n^+$7 gain layer a few micrometers below the surface generates a localized high-field region when the sensor is reverse-biased; in TCAD studies, a backside bias such as $n^+$8 was used for fully depleted operation (Moscatelli et al., 14 Aug 2025). A traversing MIP generates electron-hole pairs, electrons drift toward the $n^+$9 side, holes toward the back contact, and avalanche multiplication occurs in the gain layer. In full-device simulations this multiplication was modeled with the Massey avalanche model (Moscatelli et al., 14 Aug 2025).

The multiplied electrons are injected into the continuous $1.2\%$0 layer, which behaves as a two-dimensional resistive sheet. Signal sharing then arises from lateral current propagation in that sheet. The resistive readout can be expressed as a current-divider problem,

$1.2\%$1

where $1.2\%$2 is the effective impedance between the hit position and pad $1.2\%$3 (Cartiglia et al., 2023). Closer pads therefore collect larger fractions of the current, while more distant pads receive smaller and delayed signals. In mixed-mode simulations, this same physics is represented as a 2D RC network formed by the sheet resistance, the capacitance to the backplane, and the input impedances of the readout channels (Croci et al., 22 Aug 2025).

A central design parameter is the sheet resistance of the $1.2\%$4 layer. Early hybrid studies explored $1.2\%$5 in the $1.2\%$6 range, with optimized strip-assisted designs around $1.2\%$7 for a $1.2\%$8-wide detector (Menzio et al., 2022). Later full 3D Sentaurus studies identified $1.2\%$9 as the best compromise for reconstruction, pad isolation, and timing (Moscatelli et al., 14 Aug 2025). Other TCAD variants explicitly examined $p^+$0 and $p^+$1 implementations to study the timing-sharing trade-off (Croci et al., 22 Aug 2025). Across these studies, the common conclusion is that the resistive sheet must be high enough to enable sub-pitch interpolation, but not so high that signals become excessively slow or diffuse.

The defining DC-specific change is that pad signals are unipolar and include the actual device current, including leakage and bias components, rather than only the AC-coupled fast component. This removes the high-pass behavior imposed by coupling capacitors and allows leakage to be collected and stabilized locally at each pad (Croci et al., 22 Aug 2025). Charge sharing can extend over distances as large as a millimeter in the intended large-pixel regime, but the design goal is not unconstrained spreading; it is controlled sharing within a predetermined set of pads (Croci et al., 22 Aug 2025, Arcidiacono et al., 29 May 2025).

3. Simulation frameworks and design optimization

The development of DC-RSDs has been unusually simulation-driven. The 2022 concept paper introduced a hybrid Weightfield2 plus LTSpice framework, in which a standard LGAD current waveform was injected into a discretized 2D resistor-capacitor network representing the resistive sheet, low-resistivity strips, and front-end input impedance (Menzio et al., 2022). In the later “two-prong” framework, this methodology was reformulated as TCAD plus Spice: Synopsys Sentaurus provided full device-level electric-field, avalanche, and transient-current information, while Spice provided scalable simulation of long-range lateral sharing in large pixels and centimeter-scale sensors (Croci et al., 22 Aug 2025).

Full 3D Sentaurus TCAD then became the main optimization tool for the first FBK DC-RSD production. Two representative geometries were used: a four-pad structure for sheet-resistance, pitch, and reconstruction studies, and a $p^+$2 matrix with $p^+$3 pitch for confinement and pad-shape studies (Moscatelli et al., 14 Aug 2025). In the four-pad case, the mesh had about 290k points, and one MIP transient simulation required about 20 hours on a 16-CPU workstation (Moscatelli et al., 14 Aug 2025). These simulations were performed at $p^+$4, with explicit ohmic contact modeling and avalanche transport (Moscatelli et al., 14 Aug 2025).

Several optimization results became design rules. First, contact resistance had to be low. Simulations comparing $p^+$5 and $p^+$6 showed that low-resistance contacts confined current in the central cell, whereas high contact resistance caused charges to continue flowing in the $p^+$7 sheet and destroyed confinement (Moscatelli et al., 14 Aug 2025). Second, pad geometry imposed a fundamental trade-off: longer cross-shaped or bar-shaped electrodes improved confinement but introduced severe position-reconstruction distortion, because hits near pad edges were reconstructed closer to pad centers (Moscatelli et al., 14 Aug 2025). This led to the guideline to use small, dot-like electrodes, optionally combined with additional confinement structures (Moscatelli et al., 14 Aug 2025).

Third, auxiliary resistive or topological confinement elements proved effective. TCAD studies of inter-pad resistive strips, with resistance tuned between $p^+$8 and $p^+$9 of $n^+$0, showed that charge could be collected almost entirely by the four pads of the struck pixel while avoiding direct shorting of front-end channels (Moscatelli et al., 14 Aug 2025). In the earlier hybrid framework, the analogous optimization variable was the strip linear resistivity, explored over $n^+$1, with favorable regions near $n^+$2 and variable-resistivity strips used to linearize response (Menzio et al., 2022). Fourth, isolating trenches—already familiar from TI-LGAD technology—provided excellent confinement and were robust against manufacturing variation (Moscatelli et al., 14 Aug 2025).

A separate TCAD optimization stream explicitly addressed radiation resistance and the non-uniform response of AC-RSDs. That work compared cross-shaped DC pads and small pads combined with pad-to-pad oxide trenches, concluding that long cross arms can achieve about $n^+$3 confinement but at the cost of large geometric distortion, whereas small pads plus full pad-to-pad trenches suppress crosstalk while preserving more faithful centroid behavior (Fondacci et al., 8 May 2025).

4. Reconstruction methods and performance observables

Because DC-RSDs are resistive-sharing devices rather than implant-segmented detectors, reconstruction is fundamentally analog. In simulation studies of four-pad cells, position was reconstructed from amplitude imbalance in Spice,

$n^+$4

and from charge imbalance in TCAD,

$n^+$5

with $n^+$6 and $n^+$7 (Croci et al., 22 Aug 2025). These formulas are classical resistive charge-division observables; their validity depends on symmetry, controlled confinement, and a sufficiently linear pad-response map.

In the broader RSD program, more general estimators were introduced for large pixels. The signal-weighted position method uses

$n^+$8

while the Discretized Position Circuit method uses normalized left-right and top-bottom amplitude imbalances with experimentally determined scale factors $n^+$9 and $n^+$0 (Arcidiacono et al., 2022). Migration maps derived from laser scans are then used to correct systematic distortions (Arcidiacono et al., 2022). In beam data on both AC-RSD and DC-RSD, template methods and look-up tables are also used: AC-RSD position reconstruction in the DESY beam test used a sharing template among four corner electrodes, whereas DC-RSD1 position reconstruction used signal-sharing fractions $n^+$1 matched to calibration tables (Moscatelli et al., 14 Aug 2025, Arcidiacono et al., 29 May 2025).

The resolution budget is likewise treated explicitly. For resistive sensors, the spatial error can be decomposed as

$n^+$2

and the time error as

$n^+$3

with the jitter term scaling as $n^+$4 for position and $n^+$5 for timing (Arcidiacono et al., 2022). In practice, this means that resistive sharing improves spatial information but can degrade timing if the signal is split across too many channels or broadened excessively. That trade-off is the central reason why DC-RSD optimization focuses simultaneously on $n^+$6, pad geometry, contact resistance, and confinement structures (Moscatelli et al., 14 Aug 2025, Croci et al., 22 Aug 2025).

A recurrent misconception is that stronger confinement and better reconstruction are always aligned. Published TCAD results show the opposite in some geometries: long arms or oversized pads may improve confinement but pull reconstructed positions toward pad centers, degrading spatial fidelity (Moscatelli et al., 14 Aug 2025, Fondacci et al., 8 May 2025). Conversely, smaller pads can improve linearity but require trenches or resistive strips to preserve pixel-local charge collection.

5. Prototype implementations and measured performance

The most mature measured benchmarks in the resistive-LGAD program were established with AC-coupled RSDs and set the performance targets for DC-RSD. In the DESY beam test reported in 2025, an RSD2 device with a $n^+$7 electrode matrix, $n^+$8 pitch, cross-shaped electrodes, and FAST2 ASIC readout achieved a best position resolution of $n^+$9, which is about $n^+$0 of the pitch, and remained below $n^+$1 even at the lowest gain (Moscatelli et al., 14 Aug 2025). The same paper reported that about $n^+$2 of the signal leaked outside the four-electrode readout area in AC-RSD, providing a concrete motivation for DC-RSD confinement studies (Moscatelli et al., 14 Aug 2025). In laser TCT characterization of RSD2, a $n^+$3 pixel reached $n^+$4 time jitter and $n^+$5 spatial resolution concurrently at gain $n^+$6, while a $n^+$7 pixel reached $n^+$8 and $n^+$9, respectively (Arcidiacono et al., 2022). More generally, the RSD program demonstrated combined $n^+$0 and $n^+$1 performance with $n^+$2 pixels (Cartiglia et al., 2023).

Against that background, the first FBK DC-RSD prototype production, DC-RSD1, was completed in November 2024 within the 4DSHARE project. It comprised 15 p-type $n^+$3 epitaxial wafers with $n^+$4 active thickness, different $n^+$5 resistivity values, different gain implant doses, and different Si-Al DC-contact implementations; 7 wafers were reported as fully functional (Arcidiacono et al., 29 May 2025). The first beam tests were performed at the DESY T22 beamline with $n^+$6 electrons on trench-isolated square $n^+$7 and $n^+$8 pixels and triangular $n^+$9 pixels, using devices from wafer W3, which had the highest gain-layer doping dose and highest $n^+$0 resistivity (Arcidiacono et al., 29 May 2025).

These measurements established the first direct DC-RSD performance data. Signals were observed only on electrodes belonging to the struck pixel, indicating perfect charge containment by the trench-isolated design (Arcidiacono et al., 29 May 2025). Position resolution was better than $n^+$1 of the pitch at all tested biases, and for the $n^+$2 square matrix the reported value was $n^+$3 at gain $n^+$4, corresponding to $n^+$5 MPV $n^+$6 (Arcidiacono et al., 29 May 2025). Time reconstruction used a CFD at $n^+$7 of signal amplitude plus corrections for resistive-sheet propagation delay and setup offsets; for the same $n^+$8 square matrix the reported timing resolution was $n^+$9 at gain $n^+$0 (Arcidiacono et al., 29 May 2025). The $n^+$1 device could not be biased above $n^+$2, which limited the achievable gain and performance (Arcidiacono et al., 29 May 2025).

The measured DC-RSD results therefore remain somewhat less aggressive than the best AC-RSD benchmarks in spatial precision, but they directly validate the principal DC-RSD claims: trench-controlled containment, unipolar LGAD-like pulses, and simultaneous large-pixel spatial and temporal resolution in the 4D-tracking regime (Arcidiacono et al., 29 May 2025).

6. Applications, limitations, and outlook

The intended application domain is 4D tracking: precise space and time measurement in thin silicon with low material budget and scalable large-area coverage. Across the resistive-LGAD literature, the required operating point is consistently phrased as few-percent-of-pitch spatial resolution together with timing in the few-tens-of-picoseconds range (Menzio et al., 2022, Moscatelli et al., 14 Aug 2025). Resistive LGADs meet this by combining thin active regions, internal gain, continuous gain coverage, and analog interpolation over large pixels. In the RSD program, this has already enabled large pixels with sub-pitch resolution and channel-count reductions described as more than an order of magnitude or, in another formulation, about 50–100 relative to single-pixel readout at equal spatial resolution (Moscatelli et al., 14 Aug 2025, Arcidiacono et al., 2022).

DC-RSD adds several system-level advantages. The absence of an AC dielectric removes capacitive-coupling distortions and bipolar pulses, and local pad collection of leakage current stabilizes the baseline and improves scalability to larger areas (Moscatelli et al., 14 Aug 2025). Mixed TCAD-plus-Spice studies explicitly target pixels up to the millimeter scale and sensors up to centimeters while maintaining few-tens-of-picoseconds timing and few-microns simulated spatial resolution (Croci et al., 22 Aug 2025). The architecture is also naturally compatible with DC-coupled front-ends, including FAST-type ASICs cited in the design studies (Moscatelli et al., 14 Aug 2025).

The limitations are equally clear in the published record. Front-end electronics must tolerate DC leakage and static current while preserving high bandwidth and low jitter; low contact resistance is essential; $n^+$3 and trench geometry must be controlled across large wafers; and gain-layer, contact, and trench design must avoid premature breakdown (Moscatelli et al., 14 Aug 2025, Fondacci et al., 8 May 2025). Radiation tolerance remains an explicit design axis rather than a settled result. The DC-RSD simulation literature emphasizes that leakage and gain degradation become more directly visible at the electronics in the DC-coupled configuration, and future studies are planned to incorporate radiation damage into TCAD and to test irradiated devices (Moscatelli et al., 14 Aug 2025, Croci et al., 22 Aug 2025).

The current outlook is therefore developmental rather than speculative. Full 3D TCAD was used to define the first FBK production and to exclude non-performing layouts before fabrication (Moscatelli et al., 14 Aug 2025). Subsequent work has already moved from concept papers and simulations to trench-isolated beam-tested prototypes (Arcidiacono et al., 29 May 2025). The next published steps are further beam tests, studies of irradiated devices, and extended validation of squared matrices of dot-like electrodes with and without isolating trenches, with the objective of confirming spatial and timing performance, scalability to larger-area matrices, and integration into 4D tracking systems (Moscatelli et al., 14 Aug 2025, Croci et al., 22 Aug 2025).