4H-SiC LGADs: High-Voltage, Fast Timing Detectors
- 4H-SiC LGADs are semiconductor detectors that integrate a thin, highly doped gain layer to achieve controlled avalanche amplification using SiC's low leakage and high breakdown properties.
- They have evolved from analytical studies to fabricated devices with gains up to 20 and timing resolutions in the tens-of-picoseconds, validated by both simulation and experimental measurements.
- Key design challenges include optimizing layer architectures, mitigating radiation-induced gain degradation, and implementing effective segmentation for precise particle tracking.
4H-SiC low gain avalanche detectors (LGADs) are semiconductor particle detectors that embed a thin internal multiplication layer within a depleted 4H-SiC drift structure in order to obtain controlled avalanche amplification while retaining the material advantages of 4H-SiC, notably low leakage, high breakdown capability, thermal stability, and radiation tolerance. In the published literature, the field has advanced from analytical and TCAD feasibility studies to fabricated single-pad devices, next-generation implanted structures, beta-source timing measurements, high-voltage trench-terminated designs, and segmented strip and pixel demonstrators (Yang et al., 2022, Zhao et al., 2024, Švihra et al., 12 Apr 2025, Yang et al., 4 Sep 2025, Onder et al., 16 Oct 2025, Kráčmar et al., 16 May 2026).
1. Material basis and emergence of the 4H-SiC LGAD concept
The motivation for 4H-SiC LGADs is rooted in the intrinsic properties of 4H-SiC as a detector material. The literature summarized here reports a bandgap of –, electron mobility –, hole mobility –, saturation drift velocities of about for electrons and for holes, and a primary ionization signal lower than in silicon, quoted as of Si or in SiC versus 0 in Si (Barletta et al., 2022, Yang et al., 4 Sep 2025, Kalani et al., 23 Jan 2026). These parameters explain the central design trade-off of the field: 4H-SiC supports high electric fields and low dark current, but the smaller primary signal relative to Si makes internal charge multiplication especially important for timing and minimum-ionizing-particle detection.
The research trajectory is unusually compressed. Early work framed 4H-SiC LGADs as a route to fast timing in harsh environments and established analytic and TCAD design windows for gain-layer thickness and doping (Barletta et al., 2022, Yang et al., 2022). A later simulation study introduced the RASER framework and reported a simulated time resolution of 1 at 2 for a proposed 4H-SiC LGAD timing device (Wang et al., 2023). Experimental work then moved rapidly: SICAR was reported as the first fabricated 4H-SiC LGAD (Zhao et al., 2024); newly developed onsemi devices provided initial TCT and laboratory data across multiple wafers (Švihra et al., 12 Apr 2025); beta-source timing reached 3 (Yang et al., 4 Sep 2025); a trench-isolated 4 design was optimized in Sentaurus for operation up to 5 reverse bias with breakdown above 6 (Onder et al., 16 Oct 2025); and segmented 4H-SiC LGADs with strip and pixel geometries were subsequently fabricated and characterized (Kráčmar et al., 16 May 2026).
2. Device architectures, layer stacks, and process strategies
Published 4H-SiC LGADs span both epitaxial-gain and implanted-gain realizations. SICAR employed an epitaxially grown five-layer 7 stack, with a gain layer roughly 8 thick and an 9 bulk (Zhao et al., 2024). onsemi devices instead used an N-type substrate and epi wafer with a shallow 0 multiplication implant about 1 below the front surface, in 2 and 3 epitaxial variants and with JTE edge structures for 4 breakdown (Švihra et al., 12 Apr 2025). A separate high-voltage design used a fully epitaxial 5 stack with a 6 thick 7 gain layer and a termination scheme combining deep etched trenches with deep 8 JTE implants (Onder et al., 16 Oct 2025).
| Platform | Representative structure | Reported features |
|---|---|---|
| SICAR | 9 epitaxial stack; gain layer 0; bulk 1 | Gain about 2 at 2; CCE 3 at 4 |
| onsemi next-generation LGADs | Shallow 5 gain implant 6 below surface; 7 or 8 epi; JTE periphery | 9 at 0 to 1–2 at 3 |
| Trench-isolated 4 design | 5 gain layer 6 thick in a 7 stack; deep trench + deep 8 JTE | Full depletion below 9; breakdown above 0 |
Processing routes reflect the constraints of SiC technology. Reported flows include epitaxial growth at 1–2, high-temperature implant activation near 3, mesa definition by RIE, and passivation using thermal and PECVD 4 (Yang et al., 2024, Švihra et al., 12 Apr 2025). Contact stacks include Ni/Ti/Al, Ti/Al, and Ti/Ni-based schemes, with rapid thermal anneals at 5–6 or 7 depending on the polarity and process integration (Zhao et al., 2024, Yang et al., 2024). In SICAR, optimization of the metal-semiconductor interface led to a best Ni/Ti/Al recipe of 8 annealed at 9, yielding 0 at 1 reverse bias (Zhao et al., 2024). In the trench-terminated high-voltage design, the guard structure used sidewalls passivated with 2 3 plus 4 5, emphasizing the transfer of SiC power-device termination practice into detector design (Onder et al., 16 Oct 2025).
3. Electrostatics, avalanche multiplication, and modeling conventions
The operating principle is the deliberate creation of a localized high-field region whose depletion precedes or coincides with bulk depletion but remains below catastrophic breakdown over the intended bias range. Across the literature, the impact-ionization coefficients are parameterized in Chynoweth-like form,
6
and the multiplication is written either as
7
or, in low-gain approximation,
8
The detailed form varies by paper, but the central electrostatic problem is consistent: the gain layer must sustain fields of order 9–0 or higher while the full structure remains depletable at acceptable bias (Zhao et al., 2024, Onder et al., 16 Oct 2025).
Analytical design studies made the depletion–breakdown constraint explicit through
1
In one TCAD study, solving for 2 and 3 identified an allowed region in which 4 and 5–6 offered a practical compromise; two field-shaping variants were then compared, a “triangle” design and a more gradual “trapezoid” design (Yang et al., 2022). The triangle design reached Gain 7 at 8, while the trapezoid design reached Gain 9 and offered a wider safe bias range (Yang et al., 2022). This distinction remains relevant in later work, where edge termination and field uniformity become dominant determinants of usable bias.
A notable point in the literature is that the multiplication convention is not uniform. Some summaries treat the gain primarily through electron-initiated coefficients 0 and corresponding low-gain approximations (Zhao et al., 2024, Onder et al., 16 Oct 2025), whereas others state that in 4H-SiC avalanches are predominantly hole-initiated or hole-dominated, with 1 (Barletta et al., 2022, Satapathy et al., 30 Jul 2025). This suggests that comparisons of published gain laws require careful attention to device polarity, layer ordering, and the adopted ionization model rather than only to the nominal value of 2.
The numerical toolchain is correspondingly diverse. Sentaurus TCAD appears in quasi-1D, 2D, and guard-termination studies, including quasistationary I–V/C–V sweeps, Mixed-Mode AC at 3, and HeavyIon transients (Onder et al., 16 Oct 2025). RASER combines DEVSIM, Geant4, Shockley–Ramo current calculation, drift-diffusion transport, and CFD timing extraction (Wang et al., 2023). WeightField2 was later used for ultra-thin AC-LGAD studies including irradiation, acceptor removal, carrier trapping, and TDC contributions (Kalani et al., 23 Jan 2026).
4. Electrical characteristics and charge-collection performance
The first fabricated 4H-SiC LGAD, SICAR, established the basic experimental signatures of the technology. Reverse I–V and C–V measurements showed a gain-layer depletion step at 4–5 and a bulk-depletion knee near 6; the leakage current was reduced by four orders of magnitude through process optimization to 7 at 8 reverse bias; gain was reported to be about 2 at 9; and the charge collection efficiency reached 0 at 1 and unity by 2 under 3 4 irradiation (Zhao et al., 2024). A separate characterization study of mesa 4H-SiC LGADs and PiN references reported, for a 5 device, 6 at 7, 8 without edge termination, a C–V step at about 9, and gain 00 at 01 with a projected 02–03 near 04 (Yang et al., 2024).
The first onsemi generation moved the measured gain substantially upward. For 05 pads, the total capacitance was reported as 06, the gain-layer depletion voltage as about 07–08, and the breakdown voltage as 09 for LGAD1 and 10 for LGAD2, while UV-LED tests gave measured 11–12 in the same voltage range (Novotný et al., 10 Mar 2025). In the subsequent next-generation study, IV data showed 13–14 for LGAD1/2, breakdown above 15 for about 16 yield across about 20 devices, and CV data showed full depletion uniformity with 17 over 20 samples (Švihra et al., 12 Apr 2025). TCT gain extraction gave LGAD1 18 at 19 and 20–21 at 22, while for one wafer the gain at 23 over about 20 LGAD1 devices was 24 with 25 (Švihra et al., 12 Apr 2025).
A separate Sentaurus design study illustrates the high-voltage end of the design space. In the nominal 26 device without guard, simulated dark currents remained below 27 up to 28 for all but the worst-case gain layer, the gain layer depleted by 29, the full device depleted by 30, and 31–32 was linear from 33 to 34 with full depletion at about 35 (Onder et al., 16 Oct 2025). The nominal multiplication rose smoothly from 1 at 36 to 37–38 at 39–40, and a trench-plus-JTE guard sweep identified an optimized breakdown voltage of 41 for trench width 42 and trench depth 43 (Onder et al., 16 Oct 2025). The literature therefore does not support a single canonical gain figure for 4H-SiC LGADs; rather, measured and simulated values span about 44 to 45 depending on thickness, polarity, implantation strategy, and bias.
5. Fast timing performance and signal formation
Timing performance in 4H-SiC LGADs is constrained by the same two factors that dominate Si LGAD timing—slew rate and charge statistics—but with the additional complication of lower intrinsic charge generation in SiC. In the 46 beta-timing device, the reported structure consisted of a 47 48 contact, a 49 50 gain layer at 51, and a 52 53 drift layer at 54, with a field-plate termination (Yang et al., 4 Sep 2025). UV-TCT measured 55–56 at 57, the most probable collected charge under 58 was about 59–60 at 61, and the time resolution extracted by quadrature deconvolution,
62
was 63 at 64 (Yang et al., 4 Sep 2025). The same work identifies limited charge generation, rather than intrinsic drift speed, as the present timing bottleneck.
Simulation had anticipated a more aggressive timing envelope. Using RASER, a 65-bulk design with a 66 gain layer and a 67 68 contact yielded a simulated 69 at 70 for 50,000 MIP events under CFD timing, with component terms 71, 72, and 73 (Wang et al., 2023). In the same study the LGAD outperformed a simulated 4H-SiC PIN detector, which had 74 at 75 (Wang et al., 2023). The experimental trajectory is therefore consistent with the simulation literature in one narrow sense: internal gain is necessary to bring SiC timing into the tens-of-picoseconds regime.
Measured and simulated next-generation data occupy the intermediate regime between the earliest low-gain devices and the most aggressive timing projections. Beta-source measurements on the onsemi generation reported timing resolution 76 at 77 for W19_LGAD1, comparable to an HPK Si LGAD reference in that setup (Švihra et al., 12 Apr 2025). Ultra-thin AC-LGAD studies using WeightField2 then pushed the projected timing substantially lower: for a 78 4H-SiC sensor, the reported unirradiated timing was 79 at 80, with 81 at 82 and 83–84 at 85 (Kalani et al., 23 Jan 2026). Those results are simulation-based, but they sharpen a point already visible in the measured beta data: reducing thickness and increasing collected charge per unit transit time is central to the timing roadmap.
6. Radiation response, segmentation, and current design directions
Radiation behavior is a defining question for 4H-SiC LGADs, and the available measurements show both resilience and nontrivial degradation. In SICAR irradiated with 86 protons up to 87, I–V, C–V, and 88-particle measurements showed an increase in threshold voltage, a 2 to 4 order of magnitude reduction in leakage current, and a charge collection efficiency decrease of about 89 (Zhao et al., 16 Jul 2025). The same study reported a forward turn-on shift from about 90–91 to above 92 at the highest fluence, flat C–V behavior at 93 due to compensation in the drift layer, and a degradation law for the gain factor of the form
94
with 95 (Zhao et al., 16 Jul 2025).
A distinct proton campaign at 96 reached similar conclusions through a different dataset. There, 4H-SiC LGADs and complementary PiN diodes were irradiated up to 97, and the LGAD gain at 98 decreased monotonically from 99 before irradiation to 00 at 01, 02 at 03, and 04 at 05 (Satapathy et al., 30 Jul 2025). The same work reported loss of rectification, disappearance of the I–V step associated with gain-layer depletion, nearly flat capacitance below 06 over 07–08 at high fluence, and identified gain-layer compensation together with defect-limited carrier acceleration as the main gain-reducing mechanisms (Satapathy et al., 30 Jul 2025). A common misconception is therefore contradicted by the existing data: the wide bandgap of 4H-SiC does not imply invariance of LGAD gain under irradiation, even though measurable signal and some gain can persist.
Segmentation has now moved from proposal to realized hardware. The first fabricated and characterized segmented 4H-SiC LGADs include strip detectors with 09 pitch and pixel arrays with 10 and 11 pitch, implemented with both geometric separation and oxide-filled trenches (Kráčmar et al., 16 May 2026). TPA-TCT measurements demonstrated clear charge separation between adjacent strips with internal gain, and internal gains of about 12–13 at 14 were inferred from TCT ratios (Kráčmar et al., 16 May 2026). The same study reported that devices with 15 exhibited avalanche breakdown near about 16–17 regardless of isolation type, while devices with 18 remained stable up to at least 19, and it found that geometric separation with 20 was sufficient to suppress gain between channels to 21 (Kráčmar et al., 16 May 2026).
Current design directions are correspondingly specific. Proposed strategies include fine-tuning the 22 implant dose and profile via multi-energy implants and tailored anneals, exploring thicker epitaxial growth of 23–24 or double-gain-layer designs, reducing drift-layer doping to enable fuller depletion at available bias, and refining JTE or trench isolation to push breakdown above 25 or 26 depending on geometry (Švihra et al., 12 Apr 2025, Yang et al., 4 Sep 2025, Kalani et al., 23 Jan 2026). In the high-voltage trench-terminated program, the recommended process window was a gain-layer thickness of 27, gain-layer doping of 28, trench width 29 with 30, and JTE width 31 with depth 32, within which the device fully depletes below 33, provides 34–35 up to 36, and withstands more than 37 without premature breakdown; a corresponding wafer run is currently processed at IMB-CNM, Barcelona (Onder et al., 16 Oct 2025). Taken together, these programs define the present state of the field: 4H-SiC LGADs have progressed beyond proof of principle, but their eventual competitiveness will depend on simultaneously increasing collected charge, stabilizing gain under irradiation, and preserving high-voltage robustness in segmented layouts.