Clique_L2: Local Decoder for Surface Code

• Clique_L2 is a local decoder for the rotated surface code that extends Clique_L1 by correcting both length-1 and length-2 error chains.
• It employs a four-stage, four-color pipelined architecture that updates local syndromes progressively to maintain low hardware cost and minimize conflicts.
• The design significantly reduces off-chip syndrome traffic, achieving bandwidth improvements up to 18× under certain noise models while managing modest hardware overhead.

Searching arXiv for the Clique_L2 paper and closely related work on the original Clique decoder and surface-code local decoding. arXiv search query: "Clique local decoder surface code" Clique_L2 is a local decoder for the distance-$d$ rotated surface code that extends the original Clique decoder by correcting both length-1 and length-2 space error chains in the cryogenic domain while preserving a filtering architecture in which only complex residual patterns are forwarded to a room-temperature decoder (Jia et al., 15 Jul 2025). The design relaxes the original activation rule, adds low-cost logic for four length-2 spatial configurations, and evaluates local syndrome-processing units in a four-stage, four-color pipeline. Its reported purpose is to reduce classical I/O bandwidth and room-temperature decoder load, particularly when increasing physical error rate or code distance makes length-2 chains non-negligible (Jia et al., 15 Jul 2025).

1. Error model and decoding objective

The decoder is formulated for the rotated surface code. In the distance-$d$ patch, space error chains of length $k$ occur with probability $O(p^k)$, so isolated length-1 flips dominate at low $p$ and modest $d$, whereas length-2 space chains become increasingly relevant as $p$ or $d$ grow (Jia et al., 15 Jul 2025). The original Clique decoder, denoted Clique_L1, corrects exactly length-1 chains on-chip: it activates a local clique when a central ancilla syndrome is $1$ and its four neighbors have odd parity, then flips the unique adjacent data qubit. All other patterns, including any $k \ge 2$ space chain, are treated as complex and are forwarded off-chip (Jia et al., 15 Jul 2025).

Clique_L2 is designed to change that coverage boundary without abandoning the original filtering philosophy. Its stated goals are to correct both $d$0 and $d$1 space chains locally in the cryo-domain, preserve Clique_L1’s low hardware cost, and ensure that only truly complex cases such as $d$2 or time-like patterns escape to a room-temperature decoder (Jia et al., 15 Jul 2025). The paper also reports that Clique_L1’s on-chip coverage drops sharply once length-2 chains become common enough; one example given is that at $d$3 and $d$4, only approximately $d$5–$d$6 of syndromes are handled on-chip, which motivates extending the local decoder to length-2 spatial events (Jia et al., 15 Jul 2025).

2. Formal structure and local decision rules

The decoder uses the following notation. Let $d$7 be the set of data qubits and $d$8 the set of ancilla qubits, with $d$9 of each $k$0 or $k$1 type and $k$2. For each ancilla $k$3, the final syndrome bit is $k$4 after multi-round measurement, and $k$5 denotes the set of up to four nearest-neighbor ancilla qubits around $k$6. The variable $k$7 denotes the length of the shortest connected chain of data-qubit errors inducing the current syndrome pattern (Jia et al., 15 Jul 2025).

Length-1 detection inherits the Clique_L1 rule. Define the local parity

$k$8

The condition for a local length-1 decode is

$k$9

When this condition holds, the decoder proposes the unique adjacent data-qubit flip implied by the central ancilla and odd neighbor parity (Jia et al., 15 Jul 2025).

Length-2 detection is the defining extension of Clique_L2. The clique must first be inactive, meaning

$O(p^k)$0

and must satisfy even neighbor parity,

$O(p^k)$1

Under those conditions, exactly one of a small set of subpatterns is detected. Writing the four neighbors as $O(p^k)$2, the paper defines

$O(p^k)$3

$O(p^k)$4

$O(p^k)$5

$O(p^k)$6

$O(p^k)$7

These correspond, respectively, to horizontal, vertical, diagonal, diagonal, and mixed length-2 space configurations. If $O(p^k)$8, the decoder flips the two horizontal data qubits; if $O(p^k)$9, the two vertical qubits; if $p$0 or $p$1, the two implied diagonal qubits; and if $p$2, all four neighboring data qubits (Jia et al., 15 Jul 2025).

A useful interpretive point is that the suffix “L2” refers here to local correction of length-2 space chains rather than to any Euclidean or graph-theoretic $p$3 construction. In operational terms, a “clique” is the local syndrome-processing unit centered on ancilla $p$4 and its nearest-neighbor ancilla set $p$5 (Jia et al., 15 Jul 2025).

3. Pipeline organization and scheduling

Clique_L2 sequences the logic in four pipeline stages. Stage 0 performs measurement-error mitigation by collapsing raw four-round syndrome bits $p$6 to a single persistent bit $p$7. Stage 1 executes the inherited Clique_L1 core for length-1 decoding. Stage 2 introduces the new length-2 decode logic for inactive cliques with even neighbor parity. Stage 3 handles edge and corner special cases using the two- or three-neighbor parity rules inherited from Clique_L1. Stage 4 marks any remaining $p$8 patterns as complex and forwards them for off-chip decoding (Jia et al., 15 Jul 2025).

This staged organization is important because partial syndrome updates feed subsequent stages. After a Stage 1 length-1 correction, the local syndrome state is updated by clearing the four neighboring syndrome bits and setting the central syndrome to $p$9. After a Stage 2 length-2 correction, the four neighbor bits are cleared. The architecture therefore uses successive local state updates rather than a single monolithic pattern match (Jia et al., 15 Jul 2025).

Parallel execution is coordinated by a four-color schedule. Because any clique can have up to eight neighbors in an 8-connected grid, the clique layout is colored with four colors, denoted $d$0, such that no two intersecting cliques share a color. All cliques of one color are evaluated in one phase, followed by the remaining colors in turn. The stated purpose is to guarantee that no two active cliques simultaneously propose corrections to the same data qubit (Jia et al., 15 Jul 2025).

The resulting computational structure is therefore local, pipelined, and phased. This suggests that the decoder is engineered less as a global optimization procedure than as a hardware-friendly front-end filter for sparse or moderately structured syndrome events.

4. Bandwidth model and implementation cost

The paper measures decoder effectiveness through the fraction of cycles forwarded off-chip. Let $d$1 be the fraction of cycles where Clique_L1 forwards the syndrome off-chip, and let $d$2 denote the analogous quantity for Clique_L2. The bandwidth reduction factor is

$d$3

Under the data-only code-capacity model, the forwarding fraction is empirically fit with a logistic form

$d$4

for $d$5, although the reported bandwidth numbers are computed directly from tabulated values obtained from $d$6 trials (Jia et al., 15 Jul 2025).

Hardware overhead is reported explicitly. Clique_L1 uses approximately $d$7 two-input gates per qubit plus a 2-round counter for measurement-error filtering. Clique_L2 adds $d$8 AND gates, $d$9 OR gates, and $p$0 pipeline registers, for a total of approximately $p$1 gates per parity qubit. The 4-phase scheduler requires a 2-bit color counter per clique, described as negligible overhead of $p$2 bits $p$3 (Jia et al., 15 Jul 2025).

The implementation target is cryogenic digital logic. The paper states that all logic can be implemented in ERSFQ/SFQ at $p$4 K with less than $p$5 per logical qubit, and also reports a total power/thermal figure of less than $p$6 per logical qubit in the scalability discussion (Jia et al., 15 Jul 2025). The gate-count scaling is given as approximately $p$7 SFQ gates per parity qubit, or

$p$8

gates per logical qubit. Pipeline depth is reported as $p$9 stages times $d$0 colors, yielding $d$1 subcycles per code cycle; at a $d$2 code cycle, this corresponds to $d$3 subcycles (Jia et al., 15 Jul 2025).

The principal systems claim is I/O reduction. By lowering the off-chip syndrome traffic by factors in the reported $d$4–$d$5 range under favorable noise models, the decoder is intended to reduce cryo-to-room wiring demand by a comparable factor, addressing the approximately terabit-per-second I/O bottleneck projected for million-qubit machines (Jia et al., 15 Jul 2025).

5. Reported behavior under different noise models

The paper evaluates Clique_L2 under data-qubit-only errors, uniformly random data-plus-measurement noise, Gaussian-clustered noise, and a Dual-Error or hook model (Jia et al., 15 Jul 2025). The reported gains depend strongly on how often the observed syndrome originates from a length-2 spatial chain.

Noise model	Representative reported setting	Reported bandwidth reduction
Data-qubit-only	$d$6, $d$7	$d$8
Uniformly random	$d$9, $1$0	$1$1
Gaussian-clustered	$1$2, $1$3	$1$4
Dual-Error / hook	$1$5, $1$6	Peak $1$7

For data-qubit-only errors, one reported point is

$1$8

at $1$9 and $k \ge 2$0. Across $k \ge 2$1 and $k \ge 2$2, the reported maximum reaches $k \ge 2$3 at $k \ge 2$4 (Jia et al., 15 Jul 2025). A separate figure summary states that at $k \ge 2$5 and $k \ge 2$6, the off-chip fraction drops from $k \ge 2$7 to $k \ge 2$8, corresponding to an $k \ge 2$9 saving (Jia et al., 15 Jul 2025).

Under uniformly random noise including measurement errors, the gain is smaller. At $d$00 and $d$01, the reported values are $d$02, $d$03, and $d$04, with an overall range $d$05 across $d$06 (Jia et al., 15 Jul 2025). The stated explanation is that two-round measurement mitigation slightly reduces visibility of length-2 events, so the incremental benefit of Clique_L2 is more modest in this regime (Jia et al., 15 Jul 2025).

Under Gaussian-clustered noise, the gain increases substantially. At $d$07 and $d$08, the reported off-chip fractions are $d$09 and $d$10, yielding $d$11, and the paper reports a range $d$12 across tested $d$13 values, with a maximum of $d$14 at $d$15 (Jia et al., 15 Jul 2025). The stated reason is that clustering drives up the frequency of length-2 chains, exactly the class that Clique_L2 adds to local coverage (Jia et al., 15 Jul 2025).

The strongest reported improvement occurs in the Dual-Error or hook model. For $d$16 and $d$17, Clique_L1 offloads approximately $d$18 of syndromes, whereas Clique_L2 still handles approximately $d$19–$d$20 locally. The peak reported factor is $d$21 at $d$22 and $d$23; at $d$24 and $d$25, the range is $d$26–$d$27 (Jia et al., 15 Jul 2025). The paper attributes this to hook-type adjacent flips matching the length-2 patterns explicitly detected in Stage 2 (Jia et al., 15 Jul 2025).

A recurring interpretive theme is therefore straightforward: the closer a noise model is to producing spatially adjacent two-qubit events, the larger the advantage of Clique_L2 over Clique_L1.

6. Scope, limitations, and nomenclature

Clique_L2 is not presented as a replacement for a full decoder. It is a local predecoder that preserves a filtering architecture in which only the simple, high-frequency cases are resolved on-chip, while residual complex syndromes are forwarded off-chip for conventional decoding (Jia et al., 15 Jul 2025). The complexity boundary remains explicit: the design targets length-1 and length-2 space chains, whereas $d$28 or time-like patterns remain outside its local correction scope (Jia et al., 15 Jul 2025).

This scope matters when interpreting the reported bandwidth savings. The gains are substantial under data-only, clustered, and hook-dominated regimes, but they are much smaller under uniformly random data-plus-measurement noise, where the paper reports at most $d$29 reduction (Jia et al., 15 Jul 2025). A plausible implication is that Clique_L2 is best viewed as a noise-model-sensitive systems optimization rather than a universally dominant decoding strategy.

The paper identifies three future directions: extension to $d$30 local decoding under the name Clique_Lk, improved multi-round measurement-error filtering to boost length-2 detection under time-like noise, and hardware prototyping in cryo-CMOS or SFQ to measure end-to-end latency and power (Jia et al., 15 Jul 2025). These directions follow directly from the architecture’s stated trade-off: a small increase in local area and pipeline complexity in exchange for reduced I/O wiring pressure and reduced room-temperature decoder load (Jia et al., 15 Jul 2025).

The name can also cause terminological confusion because “clique” and “$d$31” have established meanings elsewhere in the literature. Distinct examples include $d$32 clique communities in network evolution (Fan et al., 2013), Euclidean $d$33-distance graphs whose clique number on $d$34 is $d$35 for positive squared distance (Lorenz et al., 2023), and “L₂-cliques” in second iterated line graphs (Krawczyk et al., 2010). Those are separate graph-theoretic usages. In Clique_L2, by contrast, “L2” denotes local correction of length-2 space chains within a cryogenic surface-code decoding pipeline (Jia et al., 15 Jul 2025).