CircuitJSON: Structured Schematic Format

• CircuitJSON is a rigorously defined JSON format that represents electronic schematics and hierarchical netlists with precise schema and bi-directional connectivity mapping.
• It supports both flat schematic capture, as seen in CircuitLM, and recursive module definitions for parametric circuit modeling and end-to-end differential simulation.
• The format integrates canonical component databases, electrical constraint enforcement, and computational graph semantics to enable automated validation and optimization workflows.

CircuitJSON is a rigorously structured, machine-interpretable format for representing electronic circuit schematics, parametric circuit modules, and complete hierarchical netlists in JSON. Distinguished by precise schema definitions and explicit bi-directional mapping between components and their electrical connectivity, CircuitJSON underpins a new generation of LLM-aided design frameworks, such as CircuitLM, and computational-graph-based simulation pipelines. The format is engineered to support both descriptive schematic capture and full end-to-end automatic parameter differentiation within hierarchical circuit design and optimization workflows (Hasan et al., 8 Jan 2026, Long et al., 2024).

1. Schema Design and Hierarchical Structure

CircuitJSON formalizes electrical schematics as either (A) flat netlists containing components, nets, and parameters (as in CircuitLM) or (B) a recursive hierarchy of module definitions, each specifying external interfaces, parameters, internal decomposition, and runtime behaviors (for equation systems and differentiable simulation).

Flat Schematic Schema (CircuitLM)

At the top level, CircuitJSON contains:

Field	Type	Description
version	Number	Schema version (e.g., 1.0)
author	String	Agent/user ID
components	Array of Component	All instantiated circuit elements
nets	Array of Net	Explicit net definitions
parameters	Object<String, Any> (opt.)	Global parameters (e.g., simulation settings)

Component objects encode all canonical electrical and physical properties:

• id, type, value, footprint: uniquely identify instance, part family, and PCB/package; value as string or number
• pins: pin-level array (each with name, number, and net reference)
• attrs: optional vendor/metadata

Net objects define:

• id, name: unique identifiers and human-readable label
• connections: array of "ComponentID:PinName" entries (bidirectionally referenced in pins)

Hierarchical Module Schema (Computational-Graph View)

For parametric, behavioral, and subcircuit modeling (Long et al., 2024):

Field	Type	Purpose
ExternalNodes	List<String>	Module ports for external connection
InternalNodes	List<String> (optional)	Nets local to the module
InputParams	List<String>	Names of design/global parameters
SubModel	Object (optional)	Local expression, lookup, or callback modeling dynamic/intrinsic params
Schematic	Object<InstName, InstRecord>	Hierarchical instantiation of children/basic elements

Each instance maps its ports (ExternalNodes), parameterizations (InputParams), and internal schematic recursively, with optional SubModel for dynamic (signal-dependent) parameters.

2. Canonical Pinout Retrieval and Component Knowledge Base

Component and pin definitions must correspond exactly to verified, canonical entries in an embedding-powered knowledge base. In CircuitLM, the Retrieval Agent uses Qwen3-Embedding-0.6B to vectorize user-provided names, searching a ChromaDB corpus of ~50 parts. Each DB entry prescribes:

• Canonical key (e.g., "resistor", "NMOSTYPE")
• Pin labels and exact pinout
• Footprint (e.g., "R_0805")
• Aliases and technical spec constraints

Pinout data is transferred verbatim into each Component's pins array; all pin and net references are validated by crosschecking against this ground truth, preventing hallucinated or schema-inconsistent interconnects (Hasan et al., 8 Jan 2026).

3. Electrical Constraint Formalism and Computational Graph Semantics

CircuitJSON is itself a descriptive format, but its structure directly encodes the connectivity and parameter associations required for physical validation and simulation.

Constraint Enforcement (CircuitLM)

• Kirchhoff’s Current Law (KCL): For each net $j$, the sum of currents entering/exiting all connected pins must be zero:

$\sum_{i\in\text{pins on net }j} I_i = 0$

• Ohm’s Law (for resistors):

$V_A - V_B = I_R \times R$

Practical validation is implemented as routines iterating through all nets, computing per-connection current via type-specific expressions, and asserting the KCL constraint to within a small tolerance.

Hierarchical Equation System Construction

For simulation and optimization, the JSON hierarchy maps to a computational graph:

• Each subcircuit/module forms a compute node. The node's residual is:

$R^{(i)}(x^{(i)},p^{(i)})$

and the total circuit equation system is:

$R(x,p) = \sum_i R^{(i)}(x^{(i)},p^{(i)})$

• Node-local SubModels compute intrinsic parameters as differentiable functions of node voltages and design/global params.
• Gradients (Jacobians) $\partial R / \partial x$ and $\partial R / \partial p$ are computed via chain-rule backpropagation across module boundaries, enabling end-to-end sensitivity and optimization (Long et al., 2024).

4. Validation and Assessment: Dual-Metric Circuit Validation (DMCV)

To ensure machine-generated CircuitJSON is both schema-faithful and electrically plausible, CircuitLM employs the Dual-Metric Circuit Validation framework:

• Library Compliance Score $S_{\text{comp}}$ (40%): Measures component/pin schema correctness, matching fields and pin-nets to canonical DB; penalized by numbers of errors via

$$S_{\text{comp}} = \max\left(0, \frac{100 - 10n_s - 5n_p}{10}\right),\;\; S_{\text{comp}}\in[0,10]$$

where $n_s$, $\sum_{i\in\text{pins on net }j} I_i = 0$0 count schema/pin assignment errors.

• Electrical Logic Score $\sum_{i\in\text{pins on net }j} I_i = 0$1 (60%): Uses rule-based and LLM-QA checks for KCL, required current-limiting branches, and no invalid voltage domains; severity penalties as fatal/major/minor/warning.
• Final DMCV Score:

$\sum_{i\in\text{pins on net }j} I_i = 0$2

This hybrid assessment aligns structural conformance with expert-guided electrical validation (Hasan et al., 8 Jan 2026).

5. Parametric and Behavioral Modeling: Examples and Applications

CircuitJSON enables both concrete schematics and deeply parametric, hierarchical device models.

Example: RC Low-Pass Filter (Flat Schematic)

$\sum_{i\in\text{pins on net }j} I_i = 0$3 (Hasan et al., 8 Jan 2026)

Example: Size-Dependent Resistor (Hierarchical)

$\sum_{i\in\text{pins on net }j} I_i = 0$4 (Long et al., 2024)

Complex device models, such as decomposed MOSFETs ("NMOSTYPE") and full OpAmp sizing modules, leverage internal SubModels and nested subcircuit instantiation to capture runtime dependencies, enable sensitivity analysis, and support optimization across PVT corners, with all gradients automatically propagated through the computational graph (Long et al., 2024).

6. Impact, Applications, and Comparative Context

CircuitJSON directly addresses persistent challenges in both human- and machine-generated circuit design: prevention of schematic hallucinations, programmatic verification of electrical constraints, and seamless integration into differentiable simulation and optimization pipelines. By enforcing strict canonicalization at both the component and interconnect level, it enables faithful translation from natural language or high-level design intent to deployable, simulation-ready netlists.

The format’s extensibility to deeply nested, parameterized device models, and its runtime compatibility with computational-graph-based solvers, provide efficient support for advanced design flows such as LLM-driven schematic generation (CircuitLM), auto-sizing of analog modules, and gradient-based design closure (Hasan et al., 8 Jan 2026, Long et al., 2024). Its machine-readability, formalism, and extensibility distinguish CircuitJSON from conventional EDA formats, providing foundational infrastructure for embedding, validation, and optimization in modern electronic CAD frameworks.