Adiabatic Controlled-Z Gates
- Adiabatic Controlled-Z (CZ) gates are two-qubit operations achieved by slowly varying control parameters so that systems follow instantaneous eigenstates with conditional phase accumulation.
- They are implemented in superconducting circuits, semiconductor spins, and neutral-atom platforms, each utilizing platform-specific controls such as flux, detuning, or laser fields.
- Advanced techniques like pulse shaping, shortcut-to-adiabaticity, and superadiabatic control optimize gate fidelity while mitigating errors such as leakage, dephasing, and residual couplings.
Adiabatic controlled- (CZ) gates are two-qubit controlled-phase operations realized by varying Hamiltonian parameters slowly enough that the system follows instantaneous eigenstates while accumulating a conditional phase. After removing local single-qubit phases, the logical action is equivalent to . In the implementations represented here, the control parameter is platform dependent—baseband flux in superconducting circuits, detuning or exchange in semiconductor qubits, and laser detuning or electric field in neutral-atom systems—but the common principle is adiabatic conditional-phase accumulation with leakage suppression through spectral engineering or pulse shaping (Chu et al., 2021, Frees et al., 2018, Beterov et al., 2016).
1. Logical action and adiabatic principle
The controlled-phase viewpoint is the natural formalism for adiabatic CZ gates. In superconducting-circuit notation, the ideal controlled-phase gate is written as
and an adiabatic pulse generally produces a raw diagonal unitary
After local corrections, the nonlocal phase is
so the gate is a CZ when (Ding et al., 2024).
In tunable-coupler superconducting architectures, the same condition is often expressed as
with the CZ obtained when after removing single-qubit phases (Chu et al., 2021). In quantum-dot hybrid qubits, the entangling term is written as an effective 0 interaction and the total logical evolution remains diagonal in the adiabatic basis, again reducing the gate to a controlled phase plus local 1 rotations (Frees et al., 2018). In exchange-coupled spin qubits, the same logic appears as a pulse-area condition: the exchange-induced conditional phase must equal 2 modulo 3, yielding a gate locally equivalent to CZ after single-qubit 4 corrections (Nguyen et al., 2023).
The defining adiabatic requirement is that transitions out of the instantaneous eigenstate manifold remain suppressed. In the floating-coupler transmon analysis this is written as
5
and its practical consequence is that the pulse must move slowly near small gaps and may move faster where the spectrum is more benign (Chen et al., 6 Apr 2026). Across platforms, the gate is therefore not defined by a specific pulse family but by adiabatic following of an eigenstate path that returns population to the computational subspace while imprinting a nonlocal phase.
2. Superconducting-circuit realizations
In superconducting qubits, adiabatic CZ gates are commonly implemented by flux-pulsing a tunable element so that the dressed 6 branch approaches a non-computational manifold, acquires a conditional dynamical phase, and then returns to the idle point. A representative realization uses two Xmon qubits coupled by a tunable coupler. There the effective coupling 7 is tunable from about 8 MHz up to 9 MHz, the idle-point effective 0 interaction is below 1 kHz, and the adiabatic CZ is implemented with a half-period cosine flux pulse of total duration 2 ns. Interleaved randomized benchmarking gives 3 and 4 (Xu et al., 2020).
A later fixed-frequency-transmon architecture with a symmetric floating tunable coupler pushes the same principle to shorter durations. In that system the coupler is flux-pulsed while the qubits remain fixed-frequency, and the architecture is designed so that direct and coupler-mediated interactions have opposite signs, allowing exact residual 5 at idle. The reported gate benchmark was performed at a nearby point with residual 6, while exact 7 was accessible on the device. The key physical claim is that the dressed 8 branch is the highest relevant two-excitation level in the straddling regime, so the conditional-phase rate grows without the usual problematic sequence of anticrossings. Experimentally, a 9 ns adiabatic CZ reaches 0 interleaved-RB fidelity and remains stable over 1 hours with average fidelity 2 (Chen et al., 6 Apr 2026).
Adiabatic CZ gates have also been proposed for superconducting architectures in which the tunable element is not a standard grounded coupler. A fluxonium–transmon–fluxonium design for integer fluxonium qubits uses a tunable transmon coupler to suppress static 3 at idle and activate a large conditional phase during a flux sweep. In the reported simulations, coherent error is below 4 for gate duration less than 5 ns, below 6 for less than 7 ns, and below 8 for less than 9 ns; specific optimized pulses 0 have durations 1 ns, 2 ns, and 3 ns with infidelities 4, 5, and 6, respectively, before dissipation is added (Wang et al., 5 Sep 2025).
A related but distinct superconducting proposal replaces flux control of qubit frequency with electrostatic tuning of a semiconductor Josephson junction that mediates the inter-qubit interaction. There the gate is adiabatic because the coupling transparency 7 is switched on and off smoothly with an error-function profile, the dressed computational energies accumulate a nonlocal phase at rate 8, and leakage is controlled by sufficiently long switching ramps. In the absence of decoherence, gate time below 9 ns with gate error below 0 is reported for the studied architectures (Qi et al., 2018).
3. Semiconductor spin and quantum-dot variants
In semiconductor systems, adiabatic CZ gates are typically expressed either as detuning-controlled 1 phase accumulation or as exchange-controlled conditional phase. For capacitively coupled quantum-dot hybrid qubits, the adiabatic mechanism uses simultaneous lowering of both qubits’ detunings so that their charge distributions become dipolar and interact electrostatically. The effective logical Hamiltonian contains an 2 term,
3
and the gate is produced by integrating the conditional phase generated by 4 during a smooth ramp-hold-ramp sequence (Frees et al., 2018).
That work emphasizes a central limitation of adiabatic solid-state phase gates: no conventional static sweet spot exists where all relevant detuning derivatives vanish simultaneously. To address this, it introduces a dynamical sweet spot (DSS), defined by vanishing time-averaged derivatives,
5
For detuning-only control, the best average process infidelity is 6, corresponding to about 7 fidelity, with 8 ns, 9 ns, and 0 ns. Adding tunnel-coupling pulse sequences gives a 1 improvement in fidelity relative to the detuning-only optimized case, with the best sequences reaching fidelities above 2 and discussion that they can approach 3 for DSS-inspired pulses (Frees et al., 2018).
For neighboring spin qubits, the conventional adiabatic or static exchange gate is formulated through the Hamiltonian
4
In the static case 5, the CZ condition reduces to
6
while the oscillating-exchange generalization becomes
7
The resulting operation is generally locally equivalent to CZ rather than literally 8 in the bare basis, with only single-qubit 9 rotations needed to recover the canonical form. In the noisy model based on Gaussian fluctuations of 0, resonant oscillating-exchange CZ and iSWAP gates are reported as comparable to the conventional static CZ for low charge noise, roughly 1, while the static CZ can remain more robust at larger noise because it uses shorter gate times in the parameter sets considered (Nguyen et al., 2023).
4. Neutral-atom and Rydberg implementations
Neutral-atom adiabatic CZ gates exploit Rydberg-mediated conditional phase shifts, but the physical realizations differ substantially in how the adiabatic path is traversed. One route uses Stark-tuned Förster resonances. In the Cs example 2, the two-atom system undergoes a double adiabatic passage through resonance under a time-dependent electric field. The essential result is deterministic phase accumulation: after two identical passages the initial state returns with a phase shift of 3, so only the doubly excited logical branch acquires the CZ sign change (Beterov et al., 2016).
Another route is adiabatic Rydberg dressing. In the 4Cs proposal using clock states, the entangling interaction is the difference between the two-atom dressed light shift and twice the single-atom light shift,
5
When 6, the operation is a CZ up to local phases. The proposal further uses a counterpropagating 7 geometry to cancel first-order Doppler sensitivity in the adiabatic subspace. For the representative parameters, the predicted CZ gate time is under 8s, specifically around 9s in the example shown, with error probability on the order of 0 (Keating et al., 2014).
Symmetric adiabatic pulses applied to both atoms provide a third family. In the one-photon ARP scheme, the states 1 and 2 adiabatically cycle through singly excited Rydberg manifolds while 3 evolves through the symmetric state 4. The gate becomes maximally entangling when 5. With smooth ARP pulses and Cs parameters, the predicted Bell-state fidelity reaches 6, and the abstract summarizes this regime as 7. A two-photon, globally optimized STIRAP-inspired sequence gives 8 (Saffman et al., 2019).
A single-temporal-modulation protocol for 9 realizes a full family of
0
gates by adiabatic following of different eigenpaths for 1 and the singly excited states. For 2, reported fidelities are above 3 in less than 4s even with spontaneous emission included. For the 5 benchmark, the predicted fidelity after correcting measurement errors is about 6 (Li et al., 2022).
Echoing rapid adiabatic passage yields a further variant in which two identical RAP pulses generate a closed adiabatic loop. In the blockade regime, the paper states that dynamical phases from the two pulses cancel while a geometric phase of 7 remains, producing an effective two-qubit gate
8
With Cs parameters, the reported CZ fidelity is above 9, around 00 when 01 GHz, and 02 in a conservative benchmark with 03 MHz, lifetime 04s, and 05 MHz (Xue et al., 2024).
5. Pulse synthesis, superadiabatic acceleration, and analytical design
Because adiabatic CZ gates are limited by the speed–leakage tradeoff, a substantial part of the literature focuses on pulse synthesis. A direct acceleration strategy is shortcut-to-adiabaticity (STA). In coupled Xmon qubits, the relevant subspace is 06, and the avoided crossing is used exactly as in a conventional adiabatic gate. The STA construction adds counter-diabatic driving so that the system follows the adiabatic path in shorter time. Experimentally, the resulting pulse has duration about 07 ns, with measured fidelity higher than 08 in both quantum process tomography and randomized benchmarking; the reported process fidelity is 09 (Wang et al., 2018).
A related but conceptually distinct acceleration is superadiabatic control under parametric modulation. In an 8-qubit transmon chip, modulation of a tunable transmon drives the 10 transition, and the superadiabatic construction is used to preserve adiabaticity at a speed close to the quantum limit. The SA-CZ gate uses a total evolution time of 11 ns, reaches 12 fidelity with equivalent error rate 13, and is reported as limited largely by decoherence. Simulation without decoherence gives 14, and the paper also reports robustness against 15 perturbations in pulse amplitude and duration for the superadiabatic protocol (Chu et al., 2019).
Within tunable-coupler superconducting circuits, adiabatically weighted pulse (AWP) design turns the multilevel adiabatic problem into a directly engineered waveform. The derivative of the coupler frequency is expanded as
16
and the weighting is informed by a multilevel adiabaticity metric. The reported result is that nonadiabatic errors can reach 17 for gate times above about 18 ns with only one AWP component, and the paper argues that, with improved coherence, the scheme could potentially achieve a two-qubit gate error rate near 19 (Chu et al., 2021).
Baseband-flux pulse design has also been cast explicitly as a signal-processing problem. In a two-level avoided-crossing abstraction with diabatic states 20 and 21, the approximate leakage probability is
22
which, after a nonlinear time transformation, connects leakage to the Fourier transform of the control trajectory. Using that framework, a Chebyshev-based anti-symmetric trajectory is compared with the standard Slepian-based trajectory. In simulation, the Chebyshev design lowers leakage by about 23 in certain cases, maintains similar or smaller pulse duration by about 24 ns on average, and reduces gate infidelity by 25 on average; the paper notes that this advantage is clearest in the moderate target-infidelity range 26 to 27 and can be mostly recovered under hardware constraints around 28 and 29 (Ding et al., 2024).
6. Error channels, benchmarking, and conceptual boundaries
The dominant error mechanisms in adiabatic CZ gates are platform specific but structurally similar: leakage near avoided crossings, incoherent decay during longer pulses, flux- or detuning-dependent dephasing, and residual couplings at idle. The tunable-coupler Xmon experiment provides a direct adiabatic–diabatic comparison: the adiabatic CZ uses 30 ns and reaches 31, while the diabatic CZ uses 32 ns and reaches 33. Purity benchmarking attributes about 34 of the total two-qubit Clifford error to incoherence in the adiabatic case and about 35 in the diabatic case, so the faster gate reduces incoherent exposure but pays in increased leakage sensitivity and calibration complexity (Xu et al., 2020).
A recent analytical treatment makes explicit that adiabatic superconducting CZ gates are affected by time-dependent dissipation, not merely static 36 and 37. For a tunable-coupler gate with time-dependent coupler frequency 38, the master equation is written with explicitly time-dependent Lindblad rates,
39
and the paper identifies two principal degradations: flux-dependent coupler dephasing, modeled through 40, and hybridization, which transfers coupler relaxation and dephasing into dressed logical states through factors of order 41. A central conclusion is that static time-averaged error estimates are insufficient because they miss the time dependence of both the rates and the dressed eigenbasis (Fors et al., 18 Jun 2026).
Benchmarking conventions also differ across platforms. Superconducting experiments in this corpus use interleaved randomized benchmarking, purity benchmarking, quantum process tomography, and MLE-based RB analysis (Xu et al., 2020, Wang et al., 2018, Chen et al., 6 Apr 2026). Neutral-atom works often report Bell-state fidelity or fidelity on uniform superposition inputs, reflecting the relative importance of leakage and phase correctness in blockade-mediated evolution (Saffman et al., 2019, Xue et al., 2024). This suggests that reported numbers are not interchangeable unless the benchmarking protocol is taken into account.
A recurring conceptual boundary concerns what should not be called an adiabatic CZ gate. Not every controlled-phase operation generated by 42 is adiabatic. In the fixed-frequency transmon experiment with strong always-on 43, the CZ is implemented by free evolution under
44
with 45, gate time 46, and reported average gate fidelity 47. That work explicitly realizes a free-evolution conditional-phase CZ, not a pulse-shaped or adiabatic entangling gate (Long et al., 2021). The distinction matters because adiabatic CZ refers specifically to protocols in which a control parameter is swept slowly enough to preserve eigenstate following, whereas free-evolution, diabatic, or microwave-activated schemes generate the same logical gate by different physical mechanisms.