Address-Event Representation (AER) Overview

• Address-Event Representation (AER) is an asynchronous protocol that encodes events with spatial addresses, timestamps, and polarity for efficient neuromorphic processing.
• It enables low-power, high-throughput communication in systems like silicon retinas and spiking neural networks by transmitting only sparse, significant events.
• AER facilitates scalable, delay-insensitive interconnects and has been extended for adaptive compression and distributed, biohybrid applications.

Address-Event Representation (AER) is an asynchronous, event-driven data encoding and communication protocol, foundational for large-scale neuromorphic and spiking neural network systems. It enables efficient transmission of sparse, temporally precise neural or sensory information using digital "events" that encode spatial address, timing, and, if applicable, polarity. AER is central in both silicon retinas (dynamic vision sensors) and neuromorphic computation, supporting low-latency, low-power, and high-throughput interconnects across hardware and software platforms.

1. Formal Definition and Protocol Structure

AER encodes activity as discrete events, each comprising at minimum a spatial address and a timestamp, often also including polarity (for sensory applications). In standard vision use, a typical AER event is:

$E = \langle x, y, t, p \rangle$

with:

• $x, y$: pixel coordinates,
• $t$: timestamp (µs or finer resolution),
• $p \in \{+1, -1\}$: polarity (e.g., ON/OFF for changes in log-intensity).

At the hardware interconnect level, AER implements a fully asynchronous, four-phase handshaking protocol for arbitration and data transfer. Each spike or event drives an N-bit data bus (carrying an address), with additional request (REQ) and acknowledge (ACK) lines, supporting high-throughput, delay-insensitive, and robust communication without a global clock (Qiao et al., 2019, Qiao et al., 2019).

A typical digital AER packet for routing spikes has the structure:

Field	Bit length	Description
Address	N	Source neuron or sensor index
Timestamp	variable	Emission time
Polarity	1	ON (+) / OFF (–); not always used

Arbitration resolves concurrent requests, and the protocol natively supports unidirectional and bidirectional transmission (Qiao et al., 2019).

2. Sensor and Communication Hardware Implementations

Neuromorphic sensors—such as silicon retinas (DVS, ATIS)—generate AER streams in real time, offering high temporal resolution (<1 µs), high data sparsity, and low energy operation. Each pixel operates independently, emitting events only upon thresholded change in local log-intensity (Liu et al., 2020, Annamalai et al., 2024).

For chip-to-chip and core-to-core links, AER is realized with asynchronous bit-serial or parallel LVDS architectures, often incorporating level-encoded dual-rail (LEDR) coding and token-ring serialization. This enables ultra-low-power, clock-less operation where power consumption is strictly proportional to event rate, minimizing idle dissipation and eliminating conventional clock/data recovery overhead (Qiao et al., 2019).

Key parameters for a high-performance AER LVDS link (LEDR, bit-serial):

• 1.5 Gbps link, 32-bit address width
• Event rate up to 35.7 MEvents/s
• TX/RX static leakage: 80 nA / 42 nA
• Silicon area <0.14 mm² in 0.18 µm CMOS
• Power scales linearly with event throughput

Bidirectional AER transceivers achieve handover latencies of 5 ns, throughputs of 28.6 MEvents/s at 11 pJ/event per 26-bit payload, with compact die area and reduced I/O pin count (Qiao et al., 2019).

AER protocols have been extended to Ethernet/UDP for wide-area distributed biohybrid applications, using custom 16-byte payloads per event, encoding source, timestamp, custom data, and address. Such schemes maintain sub-millisecond host-side latencies, jitter < 2 ms, and loss rates well below 1% on commodity networks (Mayr et al., 15 Jan 2025).

3. Computational Methods and Algorithms for AER Data

The event-driven, asynchronous structure of AER data enables algorithmic strategies fundamentally distinct from frame-based systems.

Unsupervised and Supervised Object Recognition:

• Event-driven pipelines use multiscale spatio-temporal features (e.g., Gabor filtering, local pooling) to abstract orientation, scale, and temporal context from raw AER streams (Liu et al., 2019).
• Latency coding (mapping filter energy to spike times via logarithmic mapping) maximizes information utilization.
• Spiking Neural Networks (SNNs) with leaky integrate-and-fire (LIF) dynamics, trained via spike-timing-dependent plasticity (STDP) or backpropagation-through-spike-time, process compact event-derived features with high sample efficiency and state-of-the-art accuracy.

Notable recognition architectures:

• Unsupervised SNN + MuST features: 99.0% accuracy on POKER-DVS, 89.96% on MNIST-DVS (Liu et al., 2019)
• Segmented Probability-Maximization with Peak Detection (supervised): 96.7% on MNIST-DVS, 96.3% on NMNIST, perfect 100% on Cards (Liu et al., 2020)
• EventF2S: asynchronous, sparse, First-To-Spike SNN with analytical single-spike denoising; 94% on NMNIST with 80% MAC reduction over baselines (Annamalai et al., 2024)
• Shape classification: context-enhanced HOE, eLBP, and ESC features, achieving near state-of-the-art with minimal events and <1 ms latency (Negri, 2018)

Temporal and Margin-Based Computation:

• TEMP (Time-to-Event Margin Propagation) encodes synaptic weight as routing delay and accumulates in the time domain, eschewing MAC units, achieving >99% MNIST accuracy in convolutional architectures (R et al., 2023).

Compression and Generalization:

• Classical AER: contrast/polarity events only.
• ADΔER (Address, Decimation, Δt Event Representation) generalizes AER by encoding absolute intensity via per-pixel integration thresholds and variable inter-event intervals, supporting lossy compression and adaptive event rates (Freeman, 2024).

Methodology	Coding	Accuracy (MNIST-DVS)	Key Property
SPA + PD SNN	Segmented SNN	96.7%	Sample efficiency/robust peaks
MuST + Unsupervised	Feature+SNN	89.96%	Unsupervised, STDP
EventF2S	Sparse, async	84%-94%	Single-spike, low-compute
TEMP	Margin-timed	97.7%-99.1%	Compute-in-interconnect

4. Network Architecture and Routing

AER networks are typically implemented as hierarchies of arbitration trees and routing tables. Each spike/event is assigned to a unique address, and events are serialized and dispatched via programmable routing machinery:

• Arbitration resolves multiple concurrent events on a shared bus, guaranteeing mutual exclusion and monotonic time sorting (R et al., 2023).
• Routing tables implement synaptic connectivity for large networks, specifying fan-out and programmable delays (effectively encoding weights in time).

Some architectures (e.g., TEMP) utilize these hardware primitives directly for computation, replacing multiply-and-accumulate and memory with causally-sorted delays, enabling polychronous codes and high-dimensional temporal representations without heavy arithmetic (R et al., 2023).

Bidirectional, multi-chip systems achieve topology flexibility (e.g., 2D mesh of neuromorphic cores) through per-edge AER links, efficiently scaling to large arrays while keeping latency and static I/O power minimal (Qiao et al., 2019, Qiao et al., 2019).

5. Compression, Encoding, and Extension to General Video

Standard AER operates exclusively on polarity (difference-only) events. ADΔER extends this by integrating intensity over adaptive pixel-dependent intervals and encoding absolute intensity via (x, y, D, Δt):

• $D$: per-pixel decimation/integration parameter
• $\Delta t$: elapsed time since last event on the pixel

ADΔER enables:

• Recoverable absolute intensities: $I_{\rm rec} = 2^D / \Delta t$
• Adaptive, scene-aware event rates (critical for video surveillance and high-dynamic-range scenes)
• Lossy compression via temporal decimation, entropy coding (CABAC), and spatio-temporal block partitioning (Freeman, 2024)

Property	Classical AER	ADΔER
Event content	Address, time, polarity	Address, decimation, Δt
Intensity reconstruction	No	Yes ($2^D/\Delta t$)
Compression	None (lossless only)	Two-stage lossy + CABAC
Rate/adaptivity	Fixed contrast, fixed rate	Per-pixel, scene-adaptive
Backward compatibility	Polarity-only apps	Both framed and event apps

Compression ratios ≥2.5:1 are reported for surveillance, and application-driven rate-control via adaptive D is feasible (Freeman, 2024).

6. Scalability and Distributed Operation

By moving from parallel buses to bit-serial LVDS and time-multiplexed bidirectional buses, AER communication links reduce I/O pin count, silicon area, and static energy—a critical requirement for core-to-core and chip-to-chip scaling in large neuromorphic arrays (Qiao et al., 2019, Qiao et al., 2019). Such links inherently support sparse, bursty traffic patterns of neuromorphic data, where static/dynamic power both scale with the instantaneous event rate.

For distributed (wide-area) systems, UDP/IP-based AER enables integration of remote neuromorphic and biological components, with <0.5% packet loss, latency well within biological time constants, and sufficient throughput for spike-based protocols (up to MEvents/s on FPGA/ASIC implementations) (Mayr et al., 15 Jan 2025). This is particularly relevant for brain-machine interfaces and biohybrid networks, allowing co-location of neuromorphic and biological substrates across networked laboratories.

7. Limitations, Extensions, and Emerging Directions

AER is limited by the lack of global timing in the presence of event bursts and challenges with arbiter latency or precise delay circuitry when system size grows. Implementation challenges include scalable programmable delays, event queue management under high rates, and training differentiating networks that exploit time-domain computation (TEMP, ADΔER pipelines) (R et al., 2023, Freeman, 2024).

Future directions include:

• Online STDP or delay-learning directly into routing tables
• Sub-word and high-precision serializations for further I/O and energy savings
• Event-driven lossy codecs (ADΔER) for universal video, bridging legacy and event-native sensing
• Bi-directional, real-time closed-loop interfaces for distributed neuromorphic-biohybrid systems (Mayr et al., 15 Jan 2025)

AER remains foundational for neuromorphic, event-based sensing and processing, with ongoing advances in asynchronous/no-clock communication, neuromorphic-aligned event-driven computation, and adaptive compression (Qiao et al., 2019, Liu et al., 2020, Annamalai et al., 2024, Freeman, 2024, R et al., 2023, Liu et al., 2019, Mayr et al., 15 Jan 2025, Negri, 2018).