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DSLHyPE-a DSL kernel language for the Exascale Hyperbolic PDE Engine ExaHyPE

Published 18 Aug 2026 in cs.MS, cs.PL, gr-qc, and math.NA | (2608.19273v1)

Abstract: We introduce a bilingual domain-specific language (DSL) for modelling compute kernels within a generic solver for hyperbolic partial differential equations (PDEs). Users express PDE terms, i.e.~the underlying physics, in a familiar native language such as C or C++, while the numerical scheme is specified in a Python-embedded DSL, DSLHyPE. DSLHyPE's compiler lowers the Python description to MLIR and introduces a translation pass that integrates it with native code likewise mapped to MLIR. Our approach keeps the numerical representation and the physics implementation separate for as long as possible, while delegating optimization to the compiler through existing MLIR optimization passes. This separation of concerns benefits researchers developing numerical schemes on top of existing PDE implementations or with applications involving nonlinear systems whose PDE terms must solve PDEs themselves. We demonstrate the feasibility of the approach using a gravitational-wave solver and a matter-evolution solver on x86 processors and H200 GPUs.

Summary

  • The paper presents DSLHyPE, a bilingual domain-specific language that combines user-written C/C++ physics with Python-based numerical schemes and fuses them through MLIR for unified CPU and GPU compilation.
  • The paper shows that generated kernels outperform vanilla C++ on a single CPU core and OpenMP-offloaded C++ on an H200 GPU, while memory flattening reduces excess data movement and TLB pressure.
  • The paper reduces implementation effort substantially, requiring 85 lines for a 3D finite-volume solver compared with 660 handwritten CPU lines and 1,124 GPU lines, while identifying fusion, layout, and transfer hiding as key optimization opportunities.

Motivation and design

ExaHyPE is a generic engine for hyperbolic PDEs of the form ∂tQ+∇F(Q)+B(Q)⋅∇Q=S(Q)\partial_t Q + \nabla F(Q) + B(Q)\cdot\nabla Q = S(Q), discretized with high-order FD/FV (and DG) schemes over dynamically adaptive spacetree meshes via Peano. Its numerical astrophysics application ExaGRyPE requires bespoke Riemann solvers, admissibility checks, and Kreiss–Oliger dissipation, and the resulting kernels must run on both CPUs and GPUs. The paper's central design decision is a bilingual DSL: the physics terms (FF, BB, SS) remain in user-authored C/C++ or SymPy-generated code, while the numerical scheme is expressed in DSLHyPE, a Python-embedded stencil language. The compiler lowers both into MLIR and fuses them early, so that all optimization of the merged kernel is delegated to the MLIR/LLVM stack rather than maintained in source-to-source form.

The kernel LLMs computation as single-assignment mappings between DataBlocks—arrays with programmer-specified (possibly non-zero-based) index ranges. Three block flavors exist: aliases of existing arrays, blocks produced by evaluating external physics functions elementwise, and blocks computed via stencil shifts or whole-array matrix operators (the latter being essential for DG schemes). Kernels operate on batches of KK cells arranged as an array-of-arrays-of-structs (AoAoS), with halo layers for FV/FD.

Compilation pipeline

Three bespoke passes carry most of the technical weight:

  • Physics inlining (dslhype-include-physics): Polygeist raises the user's C++ PDE functions to MLIR, which are then fused with the kernel IR. This enforced cross-language inlining is what exposes whole-kernel optimization opportunities that per-language pipelines cannot see; it is also what makes GPU offloading possible at all, since MLIR's GPU passes require the entire kernel body in the IR.
  • Memory linearization (dslhype-linearize-nested-memrefs): indirect nested memrefs (memref<?xmemref<?xf64>>) are flattened to one contiguous data space via explicit gather/scatter prologue and epilogue operators wrapped around the kernel composition.
  • Host-to-device memory-space rewriting: pointer and memref operations are retargeted with explicit allocation and copy operations, producing fat binaries compatible with upstream MLIR GPU lowering. Targeting AMD GPUs would require only device-specific passes and mgpu* callbacks, not IR changes.

A simple pretty-printer baseline emitting plain C++ loops serves as a comparison point.

Performance results

Benchmarks use a mini-app isolating kernel runtime and offloading transfers, on an Intel Sapphire Rapids CPU and an H200 GPU, over Euler (5 equations) and CCZ4 (59 nonlinear equations) with FV and fourth-order FD schemes, patch sizes 3–16, and fused cell counts up to K=8,694K=8{,}694.

On a single CPU core, the MLIR-generated kernels outperform the vanilla C++ baseline across all configurations. Hardware counters explain why: without flattening, the MLIR version exhibits roughly 114% of the C++ main-memory data volume, ~7% more cycles lost to D-TLB load misses, and an almost 57% increase in the L2 memory-bound TMA metric; with memory flattening these gaps shrink to about 102.5% and 2%, respectively. The effect of batching (KK) and patch size is scheme-dependent: for compute-light Euler-FV, large KK induces cache and TLB pressure between loop-fissioned steps, whereas the arithmetic-heavy CCZ4 kernels are largely insensitive to surrounding loop structure.

On the H200, DSLHyPE uniformly beats OpenMP target offloading of the C++ code. Two notable observations emerge: higher-order FD kernels run faster on the GPU than low-order FV ones (counterintuitive but consistent with saturation behavior), and overheads—kernel launches, reorganization, and migration—roughly double the total runtime of the higher-order scheme, since ExaHyPE uses pure kernel offloading with no persistent GPU-resident data. The authors suggest conditional offloading gated on sufficient KK as a consequence.

Productivity gains are substantial: the DSL requires 85 lines for a 3D FV solver versus 660 handwritten CPU and 1,124 handwritten GPU lines (73 vs. 752 for FD4, for which no handwritten GPU variant was implemented).

Candidate optimizations

The evaluation identifies optimizations missing from canonical MLIR passes: kernel concatenation/fusion across the SS steps (with masking and warp-local barriers, mindful of register pressure); AoS-to-SoA conversion hidden inside the prologue/epilogue to enable cross-function vectorization; collapsing per-step temporary allocations into a single analyzed scratchpad or recycled buffers; horizontal/vertical parallelization and DAG-based orchestration of expensive individual steps; and mapping linear stencil sequences onto tensor contractions and BLAS calls via MLIR's linalg dialect. Which combination to apply remains an open search problem, with cost models or autotuning proposed as remedies.

Limitations

The GPU lowering does not yet support all C math functions—notably fmax/fmin—requiring manual rewriting into branches. The MLIR inlining pass struggles with extensive dynamic stack allocations, so user code must avoid them. The GPU offloading pass assumes side-effect-free, purely functional user functions reading no global state. Performance portability claims rest on two architectures only, and the production use in ExaGRyPE still relies on manually composed pass sequences that the authors state do not unlock the full potential of the approach.

Conclusion

DSLHyPE demonstrates that a bilingual DSL—Python numerics plus native C/C++ physics, unified at the MLIR level via Polygeist—is a viable architecture for hyperbolic PDE engines, delivering compiler-delegated optimization, dual CPU/GPU targets from one specification, and an order-of-magnitude reduction in kernel code size, while remaining competitive with or faster than hand-managed baselines once memory flattening is applied. The principal open questions are automated selection among fusion, layout, and parallelization transformations, and hiding of offloading transfer overheads.

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1. What is this paper about?

This paper introduces DSLHyPE, a new programming language and compiler tool for creating very fast scientific simulations.

The simulations are built using partial differential equations (PDEs). These equations help scientists model things that change across space and time, such as:

  • Gravitational waves
  • Moving fluids
  • Shock waves
  • The behavior of matter in space

DSLHyPE is designed for ExaHyPE, a larger software system that solves these kinds of equations on powerful computers.

The main idea is to let scientists describe:

  • The physics in familiar languages such as C or C++
  • The numerical calculation steps in a simpler Python-based language

The compiler then joins these parts together and creates code that can run on both CPUs and GPUs.

2. What questions did the researchers investigate?

The researchers wanted to find out whether DSLHyPE could make scientific programming:

  1. Easier Could scientists describe numerical methods without writing large amounts of complicated low-level code?
  2. More flexible Could the same description work for different kinds of computers, including CPUs and GPUs?
  3. Fast enough Would code generated by DSLHyPE perform as well as, or better than, handwritten C++ code?
  4. Useful for complex physics Could it work with difficult systems of equations, such as those used to simulate gravitational waves?

The paper also asks which compiler improvements might make DSLHyPE even faster in the future.

3. How did the researchers approach the problem?

Separating physics from calculation instructions

Imagine building a model of a car:

  • One person describes how the engine works.
  • Another person describes the steps needed to simulate the car’s movement.
  • A manager combines both descriptions and organizes them so the simulation runs efficiently.

DSLHyPE uses a similar division:

  • The physics, such as pressure, density, and gravitational effects, is written in C, C++, or generated using a mathematics tool called SymPy.
  • The numerical scheme, meaning the step-by-step method for calculating the next state of the simulation, is written in a Python-like language.

This is called a bilingual domain-specific language because it combines two programming languages for two different jobs.

Using data blocks and stencils

DSLHyPE works with pieces of simulation data called DataBlocks. These are like organized boxes containing values for a small region of space.

For example, a DataBlock might hold the pressure and velocity at every point inside a small cube.

The program can then perform operations such as:

  • Copying values
  • Applying a physics function
  • Looking at neighboring points
  • Combining nearby values to calculate a new result

Looking at nearby values is called a stencil operation. A simple analogy is calculating your next position by looking at your current position and the positions of your neighbors.

Translating the program into efficient code

DSLHyPE turns the Python-like instructions into an intermediate form called MLIR. MLIR is like a common middle language used by compilers.

The process is similar to translating a story:

  1. The researcher writes the instructions in a simple language.
  2. DSLHyPE translates them into MLIR.
  3. MLIR applies improvements, such as reorganizing loops.
  4. The result is turned into machine code for a CPU or GPU.

The researchers also use a tool called Polygeist to translate the C++ physics code into the same intermediate form. This allows the compiler to see both the physics and numerical calculations together and optimize them as one program.

Testing the system

The researchers tested DSLHyPE using two types of simulations:

  • Euler equations, which describe the movement of matter such as fluids
  • CCZ4 equations, a much larger and more complicated set of 59 equations used to simulate gravitational waves

They tested several numerical methods on:

  • An Intel CPU
  • An NVIDIA H200 GPU

They compared DSLHyPE-generated programs with ordinary C++ programs and C++ programs using OpenMP, a tool for parallel programming.

4. What did the researchers find?

DSLHyPE reduced the amount of code

One of the clearest results was that DSLHyPE required far fewer lines of code.

Numerical method DSLHyPE code Handwritten CPU code Handwritten GPU code
Finite Volume 85 lines 660 lines 1,124 lines
Fourth-order Finite Difference 73 lines 752 lines Not implemented

This means a scientist can describe the important numerical method much more briefly. They do not need to separately write and maintain completely different CPU and GPU versions.

CPU performance was generally good

On a single CPU core, the MLIR version was generally faster than the basic C++ version.

However, the results depended on the simulation:

  • Simple simulations, such as the Euler equations, were more affected by how data was arranged and how loops were organized.
  • Complex simulations, such as CCZ4, spent most of their time doing physics calculations. Therefore, changes to the surrounding loops made less difference.

The researchers also found that memory flattening helped. Memory flattening means putting data into one continuous area instead of spreading it across many smaller areas. This is like replacing many scattered boxes with one well-organized shelf, making it easier for the computer to find information.

GPUs could be much faster, but moving data was expensive

DSLHyPE successfully generated GPU code, and the GPU could calculate the simulation very quickly once it had enough work to do.

However, using a GPU also created extra costs:

  • Starting GPU kernels
  • Copying data from the CPU to the GPU
  • Rearranging data into a suitable format
  • Copying results back

These costs were especially large for higher-order methods, which use extra neighboring data called halo layers.

The GPU performed best when many cells were calculated together. If only a small number of cells were sent to the GPU, the GPU was not fully used, much like bringing a huge factory online to make only one toy.

The approach worked for difficult scientific problems

The successful tests with gravitational-wave equations are important because these equations are nonlinear and complicated. This shows that DSLHyPE is not limited to simple textbook examples.

The compiler could combine:

  • Existing, trusted physics code
  • New numerical schemes
  • CPU and GPU execution

without requiring scientists to rewrite all their physics code.

5. Why are these findings important?

Scientific simulations often take a long time and require enormous amounts of computer power. Writing highly optimized programs for CPUs and GPUs can be difficult and may require expert knowledge about computer hardware.

DSLHyPE could make this process easier by allowing researchers to focus on:

  • The science
  • The equations
  • The numerical method

The compiler handles much of the difficult work of turning these descriptions into hardware-specific code.

This also makes experiments faster. A scientist could try a new numerical method without having to write separate, carefully optimized versions for every type of computer.

6. What could happen next?

The current version of DSLHyPE is useful, but the researchers say it is not yet using the full potential of the hardware. They suggest several future improvements:

  • Combining steps: Joining several small calculation stages into one larger stage to reduce overhead
  • Improving data layout: Rearranging data so computers can process it more efficiently
  • Reusing temporary memory: Avoiding repeated memory allocation
  • Better parallelization: Finding more calculations that can happen at the same time
  • Automatic tuning: Testing different arrangements and choosing the fastest one for a particular computer

In simple terms, DSLHyPE is like a promising automatic translator and organizer for scientific programs. It already makes code shorter and supports both CPUs and GPUs. With further improvements, it could help scientists run larger and more detailed simulations of fluids, waves, astrophysical events, and other complex systems more quickly and with less programming effort.

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Knowledge Gaps

Knowledge gaps, limitations, and open questions

The paper leaves the following issues unresolved:

  • Limited empirical scope: Performance is evaluated primarily with Euler and CCZ4 kernels, so it remains unclear whether DSLHyPE generalizes to other hyperbolic systems, such as magnetohydrodynamics, reactive flows, acoustics, elasticity, or systems with stiff source terms.
  • Narrow hardware evaluation: The experiments use one Intel Sapphire Rapids CPU and one NVIDIA H200/Grace-Hopper system. Results on AMD CPUs, AMD GPUs, older NVIDIA GPUs, discrete GPU systems, FPGAs, and other accelerator architectures are not established.
  • No distributed-memory assessment: The study uses a stand-alone mini-application and does not quantify DSLHyPE's impact in full-scale MPI executions, including communication, domain decomposition, load balancing, and GPU-aware communication.
  • Unclear performance in full applications: The reported timings isolate kernel computation and data transfers; the effect of DSLHyPE on complete ExaHyPE or ExaGRyPE simulations with adaptive mesh refinement, traversal, I/O, synchronization, and time integration remains unmeasured.
  • No end-to-end time-to-solution comparison: The paper reports kernel runtimes and lines of code, but does not show total simulation time, energy consumption, throughput per timestep, or time-to-solution relative to production handwritten implementations.
  • Weak baseline coverage: The main comparisons are against a simple C++ pretty-printer and OpenMP variants. The work does not compare against highly optimized handwritten CPU/GPU kernels, vendor-specific CUDA implementations, Devito, PyStencils, YATeTo, or other performance-portable DSLs under equivalent optimization effort.
  • Incomplete GPU comparison: The FD4 handwritten GPU implementation is reported as “Not Implemented,” preventing a direct comparison for that scheme and making the GPU performance conclusions incomplete.
  • Unresolved memory-layout trade-offs: AoS, flattened nested memrefs, and the proposed future SoA transformation are not compared systematically across patch sizes, batch sizes, stencil orders, and arithmetic intensities.
  • Unquantified flattening overhead: Although memory flattening improves several CPU metrics, the paper does not provide a comprehensive cost-benefit model covering allocation, gather/scatter, cache behavior, GPU transfers, and different values of KK, pp, halo width, and number of variables.
  • No automatic optimization strategy: The current implementation relies on manually selected MLIR passes. It remains unknown which pass sequences are robust across PDEs, hardware, patch sizes, and batch sizes, or how much performance is lost compared with an automatically selected pipeline.
  • Missing cost models: The paper identifies fusion, loop permutation, vectorization, SoA conversion, and memory reuse as promising, but does not develop or validate cost models that decide when these transformations improve performance.
  • Kernel fusion is not implemented and evaluated: The proposed fusion of the SS stages is discussed conceptually, but its effects on runtime, register pressure, occupancy, synchronization, temporary storage, and numerical correctness are not demonstrated.
  • Temporary-memory reuse remains unresolved: Each data-block stage can create a separate temporary allocation, but no implemented analysis or memory-pooling transformation is evaluated for reducing allocation count and peak memory usage.
  • Limited exploitation of inter-stage parallelism: The implementation executes stages sequentially, even though some operations may be independent. The paper does not characterize available dependency parallelism or evaluate task-graph, asynchronous, or overlapped execution.
  • No systematic vectorization study: The paper notes that cross-function vectorization is difficult, but does not measure vectorization rates, generated SIMD instructions, or the effect of inlining and alternative data layouts on CPU vector performance.
  • GPU occupancy and register-pressure behavior is underexplored: The study does not report register usage, occupancy, shared-memory usage, warp efficiency, or spill behavior, despite identifying fusion and complex inlined physics functions as potential sources of GPU performance degradation.
  • GPU data-transfer optimization is incomplete: Data are not held persistently on the GPU, and the paper does not evaluate asynchronous transfers, pinned memory, CUDA streams, kernel-transfer overlap, GPU-side reordering, or persistent device-resident cell data.
  • Portability claims are not demonstrated: The paper states that targeting AMD GPUs requires only device-specific lowering passes and runtime callbacks, but provides no AMD or non-NVIDIA implementation or performance results.
  • Language and API limitations are unspecified: The supported subset of Python syntax, data-block operations, control flow, dynamic indexing, reductions, irregular access patterns, exceptions, and numerical library calls is not formally defined.
  • Side-effect restrictions are not enforced or characterized: GPU generation assumes that user functions are side-effect-free and do not access global state, but the compiler's ability to detect violations, issue diagnostics, or guarantee correctness is not described.
  • C/C++ interoperability limitations remain unclear: The paper does not establish which C++ features, pointer patterns, templates, external libraries, complex data types, or compiler constructs can successfully pass through Polygeist and be inlined into MLIR.
  • Compilation scalability is not evaluated: Large physics routines, such as the 59-equation CCZ4 system, may produce very large IR. Compilation time, memory consumption, optimization time, and binary size are not reported as problem complexity increases.
  • No incremental compilation strategy is presented: It is unclear whether changing a numerical stencil, PDE term, hardware target, or optimization pass requires recompiling the entire fused representation.
  • Correctness validation is limited: The paper demonstrates feasibility and performance but does not provide systematic numerical validation against reference implementations across resolutions, orders, boundary conditions, long-time integrations, or conservation properties.
  • Numerical reproducibility is unaddressed: The effects of CPU/GPU lowering, reassociation, fused multiply-add, parallel execution order, and other compiler transformations on bitwise reproducibility and physically relevant error metrics are not quantified.
  • Boundary and exceptional-case handling is insufficiently discussed: The treatment of physical boundaries, AMR interfaces, halo exchanges, irregular patch sizes, masking, and schemes requiring special admissibility checks is not fully specified.
  • Runtime adaptability is unexplored: The paper suggests selecting CPU versus GPU execution based on KK and workload, but does not implement or evaluate an automatic runtime policy for heterogeneous execution.
  • Lines-of-code results lack a broader productivity evaluation: The code-size comparison excludes user-defined physics, does not measure development time, debugging effort, learning curve, maintainability, or performance-porting effort, and therefore does not establish overall developer productivity.
  • Usability for domain scientists is not assessed: No user study, documentation assessment, or analysis of error messages and debugging workflows determines whether scientists can effectively write and diagnose DSLHyPE kernels.
  • Compiler-generated code debugging is unresolved: The paper does not explain how source-level Python expressions are mapped to generated C++/MLIR/GPU code for profiling, correctness debugging, or numerical failure diagnosis.
  • Linear-algebra lowering is only proposed: The potential use of tensor contractions or BLAS-like operations is not implemented, so the conditions under which stencil sequences benefit from explicit linear-algebra formulations remain unknown.
  • Automatic differentiation and symbolic analysis are not addressed: The DSL does not demonstrate support for Jacobians, tangent-linear models, adjoints, sensitivity analysis, or automatic differentiation, which are important for inverse problems and modern scientific workflows.
  • Support for implicit or coupled solvers is unclear: The design targets explicit time-stepping hyperbolic kernels, leaving its applicability to implicit methods, nonlinear solves, multigrid operations, and PDE terms that invoke nested solvers unresolved.
  • Energy and resource efficiency are missing: No measurements assess energy per cell update, power consumption, memory capacity pressure, or the environmental cost of additional gather/scatter and host-device transfers.
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Practical Applications

Immediate Applications

The paper’s demonstrated capabilities support the following applications that can be deployed now, particularly within HPC research and production simulation workflows.

  • Portable CPU/GPU solvers for hyperbolic PDEs — HPC, astrophysics, computational physics
    • Researchers can implement a numerical scheme once in DSLHyPE and generate CPU and GPU implementations from the same Python-based kernel description.
    • This is already applicable to ExaHyPE-based production codes, including:
    • gravitational-wave simulations such as ExaGRyPE;
    • Euler-equation solvers for compressible-flow and matter evolution;
    • finite-volume, finite-difference, and potentially discontinuous-Galerkin-style kernels.
    • Potential workflow: retain validated C/C++ implementations of F(Q)F(Q), B(Q)B(Q), and S(Q)S(Q) while expressing stencils, flux updates, Runge–Kutta stages, and data movement in DSLHyPE.
    • Dependencies: compatibility with the ExaHyPE/Peano data model, availability of a suitable MLIR/LLVM backend, and physics routines that can be safely inlined and compiled for the target accelerator.
  • Rapid prototyping of new numerical schemes — academia and scientific software
    • Numerical analysts can modify discretizations, stencil ranges, halo widths, patch sizes, and operator composition in Python without manually rewriting separate CPU and GPU kernels.
    • This reduces implementation effort substantially: the reported 3D examples require tens of DSL lines compared with hundreds or more of handwritten CPU/GPU code.
    • Potential tools: notebook-driven kernel prototyping, regression-test suites comparing generated kernels against reference solvers, and compiler-generated variants for different patch sizes or Runge–Kutta schemes.
    • Dependencies: users still need expertise in numerical stability, consistency, convergence, boundary conditions, and physical admissibility; DSLHyPE does not automatically validate the mathematics of a scheme.
  • Preservation and reuse of existing physics implementations — scientific computing and engineering
    • Institutions can reuse mature C or C++ PDE terms while replacing only the numerical-kernel layer.
    • This is useful where the physics is nonlinear, large, or difficult to express symbolically, such as the 59-equation CCZ4 gravitational system.
    • Potential product/workflow: a legacy-code modernization pipeline that imports existing functions through Polygeist, fuses them with DSLHyPE kernels, and produces optimized binaries.
    • Dependencies: source code must be transformable by Polygeist and must expose sufficiently explicit function interfaces. Complex preprocessor constructs, unsupported language features, global state, or side effects may prevent reliable integration.
  • Automatic GPU offloading of dynamically adaptive mesh computations — HPC, climate, fluid dynamics, seismic modeling
    • DSLHyPE can generate GPU kernels for cell-wise computations within dynamically adaptive Cartesian meshes, avoiding the need to manually maintain separate accelerator implementations.
    • This can support simulation workflows involving shocks, wave propagation, compressible flow, and adaptive resolution.
    • Potential workflow: Peano or another adaptive-mesh runtime bundles cells, DSLHyPE gathers their data, launches GPU stages, and scatters updated results back to the host.
    • Dependencies: GPU benefit depends strongly on batch size and arithmetic intensity. The paper shows that sufficiently large batches are needed to saturate the GPU, while data transfer, kernel-launch, and halo-management overheads can dominate smaller or higher-order workloads.
  • Compiler-assisted performance portability — supercomputing centers and research software teams
    • A single high-level numerical specification can be lowered through MLIR to different CPU or GPU targets, reducing hardware-specific maintenance.
    • The same approach can support different GPU vendors in principle, provided suitable device-specific MLIR lowering passes and runtime callbacks are available.
    • Potential tools: architecture-specific build pipelines, fat binaries containing host and GPU code, and automatic generation of CUDA- or other accelerator-compatible kernels.
    • Dependencies: portability is not entirely automatic. Device-specific runtime integration, supported MLIR dialects, compiler maturity, and architecture-specific tuning remain necessary.
  • Performance diagnostics and kernel-selection workflows — HPC operations and performance engineering
    • The findings provide practical rules for deciding whether a kernel should execute on a CPU or GPU:
    • use GPUs when batches are large enough to achieve compute saturation;
    • favor CPU execution for small batches or low-arithmetic-intensity kernels;
    • account explicitly for gathering, scattering, memory flattening, and host-device transfers.
    • Potential product: a runtime policy that selects CPU or GPU execution using batch size, patch order, halo width, arithmetic intensity, and measured transfer cost.
    • Dependencies: thresholds are hardware- and problem-dependent. The paper does not provide a universal cost model, so deployment requires benchmarking or auto-tuning.
  • Educational and training environments for compiler-aware scientific computing — academia
    • DSLHyPE can serve as a teaching platform for demonstrating:
    • domain-specific language design;
    • stencil and finite-volume programming;
    • MLIR intermediate representations;
    • CPU/GPU lowering;
    • memory layout and cache behavior;
    • cross-language compilation.
    • Students can compare a compact numerical specification with the generated loops, memory operations, and accelerator code.
    • Dependencies: the toolchain must be packaged with reproducible examples, documentation, and accessible hardware or emulation environments.
  • Improved reproducibility of numerical-method implementations — academia and public research infrastructure
    • A Python-level specification can act as a concise, reviewable description of a numerical algorithm, while the compiler generates platform-specific implementations.
    • Research groups can version-control the DSL kernel rather than multiple manually optimized CPU and GPU variants.
    • Potential workflow: publish the DSL kernel, physics routines, compiler version, target configuration, and validation tests as part of a reproducible simulation artifact.
    • Dependencies: reproducibility still requires fixed compiler versions, numerical tolerances, hardware metadata, and tests for generated-code equivalence and convergence.
  • Indirect applications in policy and daily life through improved simulation infrastructure
    • Although the paper does not present a consumer-facing product, faster and more maintainable PDE kernels can improve simulations used for:
    • weather and climate risk analysis;
    • flood, wildfire, and infrastructure planning;
    • seismic hazard assessment;
    • aerospace and automotive fluid dynamics;
    • astrophysical and space-weather forecasting.
    • Policymakers and planners could use outputs from such simulations for risk maps, engineering standards, emergency planning, and resource allocation.
    • Dependencies: these are indirect benefits and require validated physical models, uncertainty quantification, sufficient computational resources, and careful interpretation of simulation results.

Long-Term Applications

The following applications follow directly from the paper’s proposed optimizations and limitations but require additional compiler research, validation, scaling, or production integration.

  • Autonomous optimization of PDE kernels — HPC compilers and scientific software
    • DSLHyPE could evolve into an auto-tuning compiler that selects loop fusion, loop permutation, memory layouts, batch sizes, and CPU/GPU placement automatically.
    • Cost models or machine-learning-based tuning could use patch size, number of cells KK, halo width, arithmetic intensity, cache capacity, register pressure, and transfer volume to choose an implementation.
    • Potential product: a compiler-generated portfolio of kernel variants with runtime selection based on hardware counters or problem characteristics.
    • Dependencies: representative training data, reliable performance models, bounded compilation/tuning overhead, and safeguards against optimizations that alter numerical behavior.
  • Kernel fusion and reduced accelerator-launch overhead — GPUs and heterogeneous systems
    • Multiple DSLHyPE stages could be fused into fewer GPU kernels, reducing launch overhead and intermediate memory traffic.
    • This is particularly relevant for low-order schemes or workloads where the current sequence of GPU launches is a substantial fraction of total runtime.
    • Potential workflow: analyze DataBlock dependencies, fuse compatible stages, and insert synchronization only where required.
    • Dependencies: fusion may increase register pressure, reduce occupancy, complicate different iteration ranges, and require masked execution or warp-level barriers. A cost model is needed to determine when fusion is beneficial.
  • Automatic array-of-structures to structure-of-arrays conversion — vectorized CPUs and GPUs
    • The compiler could transparently convert AoS or AoAoS data into SoA layouts to improve SIMD vectorization, coalesced GPU access, and cache utilization.
    • Since physics functions are inlined into MLIR, the layout transformation could remain invisible to users.
    • Potential tools: layout-specialization passes that select AoS, SoA, or hybrid layouts per kernel and generate the required gather/scatter operations.
    • Dependencies: reordering itself incurs memory traffic. Benefits depend on variable count, patch size, access patterns, and whether data conversion can be fused with computation or moved onto the GPU.
  • Memory pooling and temporary-buffer reuse — accelerator runtimes
    • DSLHyPE can analyze the lifetimes of temporary DataBlocks and allocate one reusable scratchpad instead of repeatedly allocating separate temporary arrays for each stage.
    • This could reduce GPU allocation overhead, peak memory use, and data movement.
    • Potential product: a compiler-generated memory planner integrated with ExaHyPE’s kernel runtime.
    • Dependencies: accurate lifetime and alias analysis are required, particularly when kernels are fused, parallelized, or executed asynchronously. The planner must also preserve correctness under concurrent execution.
  • Persistent GPU-resident adaptive-mesh workflows — exascale simulation
    • The current design transfers cell data to the accelerator for kernel execution and then returns it to the host. A future system could keep frequently reused mesh data resident on the GPU across multiple time steps or traversal phases.
    • This could substantially reduce transfer costs for high-order schemes with large halo regions.
    • Potential workflow: maintain GPU-side patches, perform mesh updates and selected traversal operations asynchronously, and transfer only boundary or refinement data.
    • Dependencies: dynamic AMR, irregular cell bundles, load balancing, memory capacity, mesh adaptation, and synchronization between host and device are major unresolved challenges.
  • Compiler-managed task graphs for intra-kernel parallelism — heterogeneous scheduling
    • Dependencies between DSLHyPE stages could be represented as a directed acyclic graph, enabling independent stages to execute concurrently on GPU warps, CPU cores, or separate accelerator streams.
    • Expensive sub-operators could be scheduled independently rather than executing every stage serially.
    • Dependencies: task-graph overhead, synchronization costs, temporary-memory requirements, and limited parallelism may outweigh the benefit for small operators. The approach requires dependency analysis and runtime scheduling policies.
  • Mapping linear stencil sections to BLAS or tensor libraries — AI accelerators and high-performance linear algebra
    • Compiler passes could recognize linear portions of a kernel as matrix-vector products or tensor contractions and lower them to optimized BLAS, GPU tensor-core, or vendor-specific libraries.
    • This may benefit high-order and linear components of finite-difference, finite-volume, or discontinuous-Galerkin schemes.
    • Dependencies: many target applications contain nonlinear terms evaluated repeatedly and on intermediate states, limiting the amount that can be expressed as a single linear algebra operation. Numerical precision, sparsity, and tensor-library suitability must also be assessed.
  • Expansion beyond ExaHyPE to a general bilingual scientific-DSL platform — multiple PDE sectors
    • The architecture could be adapted to other solver frameworks in:
    • computational fluid dynamics;
    • seismic and acoustic wave propagation;
    • weather and climate modeling;
    • plasma physics;
    • electromagnetic simulation;
    • structural and multiphysics engineering.
    • Users would retain domain-specific native-language routines while expressing numerical schedules in a high-level DSL.
    • Dependencies: each framework needs explicit data interfaces, compatible memory semantics, suitable MLIR dialects, and validation against established solvers. The approach is most naturally suited to explicit, stencil- or cell-based hyperbolic methods and may require substantial changes for implicit or global methods.
  • Integration with uncertainty quantification, inverse problems, and scientific machine learning — research and engineering
    • Once kernels can be generated portably and optimized automatically, the same DSL could support repeated forward simulations in parameter estimation, Bayesian inference, ensemble forecasting, and differentiable or surrogate-assisted modeling.
    • Potential tools: ensemble execution engines, batched parameter sweeps, automatic differentiation extensions, and accelerator-aware simulation pipelines.
    • Dependencies: the paper does not establish automatic differentiation, adjoint generation, or statistical workflow integration. These would require additional compiler representations and careful treatment of nonlinear physics, memory, and numerical stability.
  • Policy-grade hazard and infrastructure digital twins — public policy and urban planning
    • At scale, DSLHyPE-like systems could underpin continuously updated digital twins for flood propagation, seismic risk, coastal waves, atmospheric hazards, or infrastructure response.
    • Portable CPU/GPU execution and adaptive meshes could enable higher-resolution scenario analysis under changing conditions.
    • Dependencies: operational deployment requires validated models, real-time data assimilation, uncertainty estimates, fault tolerance, long-term software support, and transparent governance. Performance improvements alone do not guarantee decision-quality predictions.
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Glossary

  • Adaptive mesh refinement (AMR): A technique that dynamically changes mesh resolution to allocate computational resources where they are most needed. “cell-wise adaptive AMR codes”
  • Array of arrays of structs (AoAoS): A nested data layout in which each element is an array of structures, often producing noncontiguous access across elements. “We may interpret this as an array of AoS (AoAoS).”
  • Array of structs (AoS): A memory layout storing complete records for multiple entities contiguously, with each record containing several fields. “They are arranged as an array of structs (AoS) that is stored contiguously in memory.”
  • Backend: A compiler component that generates code for a particular target architecture or execution environment. “LLVM \cite{Lattner:2004:LLVM} backends, such as those targeting CPUs or GPUs.”
  • Bilingual domain-specific language: A DSL that combines code or representations written in two different programming languages. “the concept of a bilingual DSL which integrates a codebase written in multiple languages (e.g.~Python and C)”
  • Butcher tableau: A tabular representation of the coefficients used by a Runge–Kutta numerical integration method. “according to the Butcher tableau”
  • Cache capacity miss: A cache miss caused when the working data set exceeds the available capacity of a cache level. “a large KK induces cache capacity and Translation Lookaside Buffer (D-TLB) misses”
  • Cell-wise adaptive mesh refinement: Adaptive mesh refinement in which individual computational cells, rather than only entire grids, are refined or coarsened. “belongs to the class of cell-wise adaptive AMR codes”
  • Concrete syntax tree (CST): A tree representation of source code that preserves syntactic details such as punctuation and formatting structure. “can be represented by Python's concrete syntax tree (CST).”
  • Conservative flux: A flux formulation that preserves a conservation law in the discretized numerical system. “They involve five equations feeding into a conservative flux.”
  • DataBlock: A DSL abstraction representing an indexed multidimensional data region used in kernel calculations. “The DSL represents all calculations as mappings between DataBlocks”
  • Data dependence: A relationship in which one computation requires data produced or modified by another computation. “This single-assignment \cite{Scholz:1996:SAC} mirrors functional programming and makes data dependencies between calculation steps plain and explicit.”
  • Data race: A conflict arising when concurrent computations access shared data and at least one access modifies it without suitable synchronization. “each range element is only assigned once.”
  • Dialect: A specialized collection of operations and types within MLIR for representing a particular abstraction or domain. “MLIR provides a series of Intermediate Representation (IR) dialects”
  • Directed acyclic graph (DAG): A directed graph containing no cycles, commonly used to represent dependencies among computations. “compute steps to be modeled as directed, acyclic graphs.”
  • Domain-specific language (DSL): A programming language designed for a particular application domain rather than general-purpose programming. “We introduce a bilingual domain-specific language (DSL)”
  • Explicit time-stepping: A numerical integration approach in which the next time step is computed directly from known current-state values. “that are discretized via explicit time-stepping methods.”
  • Fat binary: A binary package containing executable code for multiple architectures or execution targets. “resulting in a fat binary that contains the kernel wrapper and launch code for the host and the embedded GPU kernel binaries”
  • Finite Difference (FD): A discretization method that approximates derivatives using differences between values at discrete grid points. “Finite Volume (FV) and Finite Difference (FD) schemes”
  • Finite Volume (FV): A discretization method that evolves averages or conserved quantities over control volumes using fluxes across their boundaries. “It is a Finite Volume kernel with a halo of h around each cell's grid.”
  • Flux: The rate at which a conserved physical quantity crosses a surface or cell boundary. “an operator KΔt(3)\mathcal{K}_{\Delta t}^{(3)} evaluates the fluxes FF”
  • Gauss–Lobatto shape function: A polynomial basis function associated with Gauss–Lobatto quadrature points, used in high-order numerical discretizations. “each cube hosts Gauss-Lagrangian or Gauss-Lobatto shape functions”
  • Gauss–Lagrangian shape function: A polynomial interpolation basis associated with Gauss–Lagrange nodes in a numerical approximation. “each cube hosts Gauss-Lagrangian or Gauss-Lobatto shape functions”
  • Gathering: The operation of collecting data from multiple, potentially noncontiguous memory locations into a contiguous representation. “We therefore introduce explicit gathering and scattering”
  • Halo layer: Additional neighboring grid cells stored around a computational region to provide values needed by stencil or boundary computations. “each cell's embedded mesh is augmented by a halo layer of width hh”
  • Hyperbolic partial differential equation: A PDE describing wave-like propagation, in which information travels at finite characteristic speeds. “simulating a wide range of wave phenomena, i.e.~hyperbolic partial differential equations (PDEs)”
  • Inlining: A compiler transformation that replaces a function call with the function’s body. “the user code has to be inlined into MLIR automatically and early”
  • Intermediate Representation (IR): A compiler-internal representation of a program used for analysis, transformation, and code generation. “transform the programmer's code in our DSL into CPU or GPU binaries.”
  • Instruction-level parallelism: The simultaneous execution of multiple independent machine instructions within a processor. “combined with instruction-level parallelism considerations”
  • Kreiss–Oliger dissipation: A numerical stabilization technique that adds carefully scaled high-order derivative terms to suppress grid-scale oscillations. “differencing schemes with appropriate Kreiss-Oliger dissipation terms”
  • Loop fission: A compiler transformation that splits one loop into multiple loops, often to improve optimization or manage dependencies. “Our kernels implement aggressive loop fission”
  • Loop fusion: A compiler transformation that combines multiple loops with compatible iteration spaces into one loop. “it tends to increase register pressure and amplify memory access challenges”
  • Loop permutation: Reordering nested loops to improve locality, parallelism, or hardware utilization. “Loop permutation could further improve runtimes.”
  • Lowering: Translating a program representation from a higher abstraction level to a lower-level representation. “The DSLHyPE approach is to leverage MLIR”
  • Memory flattening: Transforming nested or indirect memory structures into a single linear memory representation. “This pass maps all input and temporary memory onto one linear data space”
  • Memory pooling: Reusing a preallocated memory region for multiple temporary allocations. “While memory pooling is now a state-of-the-art technique”
  • Memory-space rewriting: Changing the memory-space annotations or address spaces associated with data to support a target device. “memory-space rewriting”
  • Polyhedral semantics: A mathematical representation of loop nests and array accesses using integer polyhedra, enabling dependence analysis and loop transformations. “POM extracts polyhedral semantics into MLIR”
  • Prologue and epilogue: Setup and cleanup portions surrounding the main computation of a kernel or function. “the kernel K~Δt(S+1)\tilde{ \mathcal{K} }_{\Delta t}^{(S+1)} ... is embedded into a prologue and epilogue”
  • Riemann solver: A numerical method for estimating the solution of a local discontinuity problem in hyperbolic conservation laws. “custom Riemann solvers incorporating physical admissibility checks”
  • Runge–Kutta scheme: A family of numerical methods for integrating ordinary differential equations using multiple intermediate evaluations per time step. “Runge-Kutta schemes require multiple cell update calls”
  • Scattering: The operation of distributing data from a contiguous representation to multiple memory locations. “We therefore introduce explicit gathering and scattering”
  • Scratchpad: A manually or compiler-managed temporary memory area used for intermediate computation data. “allocate one large scratchpad per kernel invocation”
  • Single assignment: A programming discipline in which each variable or data element is assigned at most once within a computation region. “This single-assignment \cite{Scholz:1996:SAC} mirrors functional programming”
  • Stencil: A fixed pattern of neighboring grid-point accesses used to approximate a differential operator. “i.e.~a stencil.”
  • Streaming multiprocessor: A GPU execution unit containing processing cores and resources for running groups of parallel threads. “The numerical schemes expressed through DSLHyPE are well-suited for a streaming multiprocessor”
  • Tensor contraction: An operation that generalizes matrix multiplication by summing products over one or more shared tensor indices. “combined through a series of tensor contractions”
  • Translation Lookaside Buffer (TLB): A hardware cache that stores recent virtual-to-physical address translations. “Translation Lookaside Buffer (D-TLB) misses”
  • Vectorization: Transforming scalar operations into operations on multiple data elements simultaneously using vector instructions. “Indirect memory accesses are undesired due to their unsuitability for many optimizations including aggressive vectorization.”
  • Warp: A group of GPU threads executed together in a SIMD-like execution model. “Certain subranges (warps) might also require warp-local barriers.”
  • Warp-local barrier: A synchronization point that coordinates threads within a GPU warp or related execution subgroup. “Certain subranges (warps) might also require warp-local barriers.”
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