Stencil: Numerical Methods and Lithography

• Stencil is a computational technique defined by fixed local update patterns on structured grids, used in PDE solvers, seismic imaging, and climate models.
• In nanofabrication, stencil lithography employs mask-defined pattern transfer to enable precise feature control in superconducting qubits and nanoscale metal deposition.
• Advanced stencil methods leverage hardware-specific optimizations and compiler transformations to boost efficiency and energy performance in high-performance computing.

In the cited literature, “stencil” denotes a family of locality-constrained update patterns on structured grids and, in a distinct fabrication context, a mask-defined pattern-transfer method. In scientific computing, a stencil updates each grid point from a fixed neighborhood of nearby points and recurs in PDE solvers, seismic imaging, weather and climate models, image processing, and related regular-grid workloads; its defining properties are regular spatial dependence and a historically unfavorable balance between arithmetic and data movement on conventional cache-based architectures (Jacquelin et al., 2022). In nanofabrication, stencil lithography uses apertures to confine incoming flux and transfer a pattern without resist at the final deposition stage, including recent on-chip implementations for Josephson-junction fabrication (Hanna et al., 22 Jul 2025).

1. Computational definition and geometric forms

A computational stencil applies the same local rule across a structured lattice. In the 2D and 3D cases discussed across the literature, the neighborhood is described by a stencil shape, a dimensionality, and a radius. Two standard families recur: star stencils, which use axis-aligned neighbors only, and box stencils, which use all points in a centered square or cube. The generic 2D update form used for Jacobi-style iteration is

$$u_{i,j}^{(k+1)} = \sum_{(p,q)\in \mathcal{N}} w_{p,q}\,u_{i+p,j+q}^{(k)},$$

with $\mathcal{N}$ the stencil neighborhood and $w_{p,q}$ the weights (Belli et al., 8 May 2026).

The literature also distinguishes gather and scatter views. In gather mode, an output $B_{i,j}$ is formed from neighboring input values. In scatter mode, one input value contributes to multiple outputs, and for a 2D box stencil the scatter coefficient matrix is related to the gather coefficient matrix by

$C^s = J_{2r+1}\times C^g\times J_{2r+1},$

where $J_{2r+1}$ is the reversal matrix (Zhao et al., 2023). This distinction is not merely notational: it underlies later formulations based on adjoints, outer products, and hardware mapping.

High-order structured stencils remain central in production solvers. A representative example is the 3D 25-point stencil for the wave equation, commonly interpreted as a center point plus four neighbors in each positive and negative coordinate direction, giving $1 + 3 \times 2 \times 4 = 25$ points (Jacquelin et al., 2022). This suggests that “stencil” in HPC is best understood not as a single operator, but as a parameterized class of local linear or nonlinear update rules whose geometry strongly influences storage layout, communication, and optimization strategy.

2. Numerical formulations and explicit time marching

Stencil schemes are often derived from finite-difference approximations, but the literature also contains nonstandard constructions from exact integral representations. For the transient 2D acoustic wave equation,

$$\frac{\partial^2 u}{\partial t^2} -c^2\left(\frac{\partial^2 u}{\partial x_1^2}+\frac{\partial^2 u}{\partial x_2^2}\right)=0,$$

a Poisson-formula-based construction yields a one-step initialization

$u^1(x)=A(x,\tau)u_0(\cdot)+B(x,\tau)v_0(\cdot),$

followed by the two-step recurrence

$u^{k+1}(x)=2A(x,\tau)u^k(\cdot)-u^{k-1}(x),$

from which explicit 5-point, 9-point, and 13-point schemes are generated by polynomial stencil interpolation and exact integration over the unit disk (Khutoryansky, 2019). The resulting stability limits differ by stencil: the 5-point and 13-point schemes admit $\mathcal{N}$0, whereas the Poisson-generated 9-point scheme has

$\mathcal{N}$1

compared with $\mathcal{N}$2 for the conventional isotropic 9-point scheme (Khutoryansky, 2019).

The same local-update viewpoint appears in explicit parabolic and nonlinear conservation-law discretizations. For the 1D heat equation, forward Euler in time and centered second-order differences in space give

$\mathcal{N}$3

which is a convex-sum stencil under $\mathcal{N}$4 (Markidis et al., 16 Nov 2025). For viscous Burgers’ equation, a first-order upwind plus centered-diffusion discretization yields

$\mathcal{N}$5

with locally solution-dependent weights (Markidis et al., 16 Nov 2025). These examples show that the stencil abstraction covers both linear and certain nonlinear PDE updates so long as the local dependence remains explicit and fixed-radius.

3. Performance bottlenecks and hardware-specific optimization

The dominant systems fact about stencil computation is that it is usually memory-bound on conventional architectures. High-order 3D stencils, large domains, multiple time levels, and modest arithmetic per byte loaded mean that performance is frequently capped by DRAM bandwidth and cache behavior rather than floating-point throughput (Reguly et al., 2017). This has produced several distinct optimization lines.

One line attacks capacity limits. Out-of-core GPU execution on a Tesla V100 for a 46 GB 3D acoustic 25-point stencil uses temporal blocking, region sharing, and then adds on-the-fly compression with cuZFP 0.5.5 plus a single working buffer. The reported result is 1.1× speedup and 33.0% reduction in GPU memory consumption relative to a non-compressed out-of-core baseline (Shen et al., 2022). Another line uses runtime tiling across large loop chains: OPS-based out-of-core stencil execution on KNL and P100 supports problem sizes about 3× larger than the fast-memory tier with at most 15% loss in efficiency on KNL, and on NVLink GPUs often within 16% of in-core performance (Reguly et al., 2017).

A second line changes the algorithm–architecture pairing. On the Cerebras WSE-2, a localized communication strategy for a 25-point 3D wave-equation stencil replaces repeated memory accesses with short-range PE-to-PE communication, making the kernel compute-bound and delivering near perfect weak scaling up to 503 TFLOPs on a single wafer-scale system with 850,000 processing elements (Jacquelin et al., 2022). On the later WSE-3, the CStencil framework maps 2D Jacobi stencils to one tile per PE, stores tiles and halos in distributed SRAM, and uses mesh-local communication; the reported speedup is up to 342× over an adapted ConvStencil baseline on an NVIDIA A100 (Belli et al., 8 May 2026).

A third line targets matrix and tensor units. The paper that directly asks whether Tensor Cores are needed for stencil computation shows that Tensor Cores help only in specific operational regions. With temporal fusion, the CUDA-core arithmetic intensity grows as

$\mathcal{N}$6

while Tensor Core mappings incur sparsity overhead $\mathcal{N}$7 and fusion redundancy $\mathcal{N}$8, yielding the profitability criterion

$\mathcal{N}$9

in the compute-bound regime (GU et al., 28 Feb 2026). Sparse Tensor Cores expand this profitable region. Consistently, SPTCStencil exploits 2:4 structured sparsity induced by stencil-to-matrix transformations and reports average speedups of 5.46× over CUDA-core baselines and 2.00× over Tensor Core-based approaches (GU et al., 27 Jun 2025). The common implication is that Tensor Cores are neither categorically irrelevant nor categorically optimal; their usefulness depends on whether temporal fusion has already pushed the stencil into a compute-bound region and on how much transformation-induced redundancy remains.

4. Compilation, transformation, and formal lifting

Because stencil programs are regular but often buried inside large legacy codes, a substantial literature treats them as compiler objects. In MLIR-based FPGA compilation, Stencil-HMLS preserves stencil semantics through the stencil dialect, lowers to an HLS dialect with streams, pipelining, and dataflow constructs, and automatically introduces shift-buffered execution. On real 3D kernels from weather and ocean modeling, it reports 14–100× performance improvement and 14–92× energy-efficiency improvement relative to the next best state-of-the-art tool (Rodriguez-Canal et al., 2023).

A related but more hardware-structural approach is StencilFlow, which represents a stencil application as a DAG of heterogeneous stencil operators rather than a single iterated kernel. It computes internal buffers and inter-stencil delay buffers to maximize temporal locality while ensuring deadlock freedom, then maps the graph to single- and multi-FPGA dataflow systems. The reported throughput reaches 1.31 TOp/s on a single device and 4.18 TOp/s on multiple devices (Licht et al., 2020). This suggests that “stencil” as a compilation target includes both local neighborhood semantics and whole-program graph structure.

Differentiation and lifting introduce another layer of abstraction. Reverse-mode AD normally converts a gather stencil into a scatter adjoint with write conflicts, but PerforAD splits, shifts, and fuses derivative contributions to recover gather-form adjoint stencil loops that remain parallelizable; the best reported speedup over conventional adjoints is 125× (Hückelheim et al., 2019). At the source-to-DSL boundary, Stencil-Lifting represents legacy nested-loop stencils with invariant subgraphs and predicate summaries, proving loop invariants and postconditions by self-consistency rather than external search-based verification. On benchmarked lifting tasks it reports 31.62× speedup over STNG and 5.8× over Dexter while maintaining semantic equivalence (Li et al., 12 Sep 2025). Taken together, these systems show that stencil structure is valuable not only for runtime performance but also for differentiation, synthesis, and verified translation.

5. Alternative algorithmic formulations and emerging accelerators

Not all stencil acceleration proceeds by direct time-step iteration. For homogeneous linear stencils with periodic boundaries, the FFT-based StencilFFT-P algorithm diagonalizes the stencil operator in the Fourier basis and computes the $w_{p,q}$0-step result in

$w_{p,q}$1

work and

$w_{p,q}$2

span, rather than $w_{p,q}$3 work (Ahmad et al., 2021). For aperiodic boundaries, StencilFFT-A combines a periodic interior solve with recursive boundary correction, achieving

$w_{p,q}$4

work, where $w_{p,q}$5 is the number of boundary cells (Ahmad et al., 2021). This is a genuine algorithmic change: the final grid is evolved for many time steps at once rather than one local update at a time.

A different reformulation comes from matrix-capable execution units. Stencil Matrixization derives 2D and 3D box and star stencils from the scatter view and expresses them as sums of vector outer products accumulated into matrix registers. The central object is the coefficient-line decomposition, and the resulting in-core implementation reports speedups up to 4.71× for 2D box stencils and 4.14× for 3D star stencils in favorable cases (Zhao et al., 2023). This suggests that matrix hardware can be exploited without forcing the problem into GEMM if the formulation itself is changed.

At the opposite end of the hardware spectrum, QPU micro-kernels reinterpret an explicit convex-sum stencil update as a local expectation estimated by repeated quantum measurements. The Bernoulli realization encodes branch values as single-qubit probabilities with shot allocation proportional to stencil weights; the branching realization uses selector qubits and leaf-addressed rotations. The resource footprint is fixed and independent of the global grid, and on IBM Brisbane single-step diffusion tests the Bernoulli realization shows lower errors than branching at equal shot budgets (Markidis et al., 16 Nov 2025). This is not a replacement for the classical time loop; it is a local sampling accelerator plugged into that loop.

6. Stencil lithography, stencil growth, and nanoscale pattern transfer

In nanofabrication, “stencil” denotes a physical mask that blocks incoming material except through apertures. Molecular-dynamics simulation of Cu deposition through a stencil aperture models stencil growth by confining the incoming flux to a 6 nm diameter circle above a Cu(111) substrate. Under this constrained flux, the deposited structure becomes a localized nanorod rather than a thin film, reaching a maximum height of 105.72 Å compared with 60.05 Å without a stencil, and a surface area of 232.704 nm$w_{p,q}$6 compared with 176.839 nm$w_{p,q}$7 without a stencil (Kateb, 2020). The same study attributes roughness reduction to merging of adjacent surface irregularities and argues that close mask–substrate proximity preserves feature dimensions.

A more advanced fabrication use is on-chip stencil lithography for superconducting qubits. An inorganic bilayer mask consisting of 300 nm SiO$w_{p,q}$8 and 100 nm Si$w_{p,q}$9N$B_{i,j}$0 is fabricated on c-plane sapphire, released by 1% aqueous HF, used for double-angle Al shadow evaporation at $B_{i,j}$1, and then removed by vapor HF. The mask survives aggressive cleaning and temperatures up to $B_{i,j}$2, and the resulting Al/AlO$B_{i,j}$3/Al transmons reach average $B_{i,j}$4 values of approximately $B_{i,j}$5 for one device and $B_{i,j}$6 for a second device (Hanna et al., 22 Jul 2025). The fabrication geometry is governed in part by the hole-blocking relation

$B_{i,j}$7

which limits access-hole size so that oblique deposition does not leak through the removal grid (Hanna et al., 22 Jul 2025). In this literature, stencil denotes a fabrication mask rather than a numerical neighborhood, but the common theme is still localized transfer of structure.

7. Proper-name systems and terminological extension

A distinct proper-noun usage of “Stencil” appears in machine learning. The generative-model framework Stencil addresses subject-driven text-to-image generation by combining a lightweight personalized diffusion model with a large frozen model that supplies contextual priors during inference. It fine-tunes the lightweight model for 100 steps, uses a Cross-Attention Guided Loss during personalization, and applies context guidance through DDIM inversion and early-step null-text injection at inference. On DreamBench, it reports 0.671 subject consistency, 0.328 text alignment, and 0.1 GPU hours, outperforming the compared open-source methods in that table (Chen et al., 21 Sep 2025). This usage is semantically separate from both structured-grid stencil computation and stencil lithography, but it illustrates how the term has expanded into a family of framework names associated with context-constrained or pattern-constrained transformation.

Across these literatures, “stencil” therefore names three related but technically distinct ideas: a fixed local neighborhood update in numerical computing, a mask-mediated local transfer in fabrication, and a proper noun for systems that emphasize structured, localized guidance or transformation. The computational meaning remains the dominant one in arXiv-scale research, where stencil structure continues to drive work on discretization, hardware mapping, compiler design, formal lifting, and accelerator-specific execution models.