A superconducting surface-code processor with lattice-surgery logical operations

Abstract: Fault-tolerant logical operations are fundamental for scalable quantum computation. Here, we report the experimental realization of lattice-surgery operations between a pair of distance-three surface-code logical qubits on a planar superconducting processor. During repeated syndrome extraction cycles, the logical qubits exhibit per-cycle error rates of $0.0365(2)$ and $0.0282(1)$, respectively, after leakage events are rejected. By leveraging joint initialization and lattice splitting, we deterministically prepare a logical Bell state, confirming genuine bipartite entanglement via the error-corrected logical state fidelity. We further execute a two-qubit Deutsch-Jozsa algorithm at the logical level to demonstrate algorithmic utility in a fault-tolerant framework. Finally, to achieve universal control, we implement magic-state injection and gate teleportation to realize continuous non-Clifford rotations about the logical $X$ axis. For the logical $R_{X}(π/4)$ gate, we achieve a logical gate fidelity of $0.943_{-9}^{+10}$ conditioned on the absence of detected errors. These results establish lattice surgery as a practical and versatile paradigm for logical computation in near-term surface-code architectures, representing a critical milestone toward scalable fault-tolerant quantum advantage in superconducting circuits.

• The paper presents a comprehensive experimental demonstration of fault-tolerant lattice-surgery operations, achieving logical error rates as low as 0.028 per cycle after error mitigation.
• It employs a 125-qubit superconducting architecture with optimized control and readout, enabling robust logical state manipulation via merge and split protocols.
• The work validates universal quantum computation by executing the Deutsch-Jozsa algorithm and realizing high-fidelity non-Clifford gates through magic-state injection and gate teleportation.

Superconducting Surface-Code Processor with Lattice-Surgery Logical Operations

Introduction

This paper presents a comprehensive experimental demonstration of fault-tolerant logical operations between two distance-three surface-code logical qubits on a planar superconducting quantum processor (2606.06598). The key achievement is the execution of lattice-surgery protocols for logical state manipulation, entanglement generation, algorithm execution, and non-Clifford logical rotations, all within the surface-code framework—an architecture central to scalable, error-corrected quantum computation. Lattice surgery, involving code-patch merging and splitting, provides the essential primitive for universal and fault-tolerant logical gates in two-dimensional superconducting circuits, which lack non-local connectivity.

Experimental Architecture and Device Performance

The processor comprises a two-dimensional array of 125 superconducting transmon qubits, partitioned into data qubits and X/Z-type syndrome qubits to implement two disjoint $d = 3$ surface-code patches (L1, L2). Connectivity is optimized for surface-code stabilizer measurements. Qubit control and readout performance set a lower bound on feasible logical error rates and gate fidelities.

Figure 1: Device topology, logical qubit layout, lattice-surgery primitives (merge/split), and characterization of gate/readout infidelities, with logical memory performance quantified via repeated stabilizer cycles.

The logical $X$ and $Z$ operators are defined on patch boundaries, with merge/split operations mediated by ancillary qubits. The physical-layer characterization reveals median one-qubit/two-qubit gate fidelities of $0.9995/0.996$, and readout assignment errors of $0.025$–$0.049$. Logical memory benchmarks yield per-cycle logical error rates of $0.0365(2)$ and $0.0282(1)$ after leakage event rejection, establishing baseline reliability for logical operations.

Lattice Surgery: Entanglement and Logical State Preparation

Demonstrating the central primitives of lattice surgery, the experiment realizes deterministic logical Bell state generation via a lattice-split protocol. The protocol relies on initializing the merged code patch (L3) in a logical $\ket{0}_{\mathrm{L3}}$ state, then splitting into two entangled logical qubits (L1, L2), with post-processing to address Pauli frame corrections determined by measured stabilizer outcomes.

Figure 2: Logical Bell state generation via lattice split, circuit details for stabilizer-encoded state initialization, and measured logical Pauli operator values/Fidelity for raw, decoded, and post-selected syndromes.

State characterization employs logical measurements of $X_{\mathrm{L1}} X_{\mathrm{L2}}$, $X$0, and $X$1. A belief-matching decoder produces a decoded fidelity lower bound of $X$2—confirming error-corrected bipartite logical entanglement. The strongest result, from detected-error-free post-selection, yields a logical Bell fidelity of $X$3, limited primarily by measurement non-idealities and non-fault-tolerant $X$4-basis readout.

Algorithmic Demonstration: Logical Deutsch-Jozsa Protocol

To showcase non-trivial logical computation, the two logical qubits are leveraged to implement the two-qubit Deutsch-Jozsa (DJ) algorithm utilizing lattice-surgery-based logical gates. In this realization, the quantum oracle $X$5 is constructed by conditionally applying lattice surgery, with measurement at the logical level providing algorithmic output.

Figure 3: Logical circuit for DJ algorithm, accuracy for constant/balanced oracles, and the effect of various post-selection procedures on accuracy and data efficiency.

Raw logical accuracy for the balanced version is $X$6, improved to $X$7 with error decoding. For detected-error-free post-selection, accuracy reaches $X$8, albeit with only $X$9 of experimental runs retained for the balanced function, illustrating the trade-off between logical performance and efficiency. The efficiency-accuracy landscape is further navigated using sophisticated post-selection (argument reweighting and complementary gap thresholds), indicating robustness and flexibility of error-mitigation strategies at the logical level.

Universal Control: Magic-State Injection and Gate Teleportation

Universal quantum logic necessitates non-Clifford gates, which are introduced via magic-state injection and gate teleportation circuits. Initialization exploits deterministic preparation of logical magic states on individual surface-code patches, with gate teleportation instantiated via fault-tolerant $Z$0 measurement (lattice-merge/split) between logical qubits and conditioned feed-forward operations.

Figure 4: Magic-state initialization protocol; logical rotation via lattice-surgery gate teleportation; measured logical Pauli expectation values as a function of rotation angle; and quantum process tomography (PTM) of the logical $Z$1 gate for various decoding strategies.

Successful logical $Z$2 rotations are observed, with logical $Z$3 and $Z$4 operators exhibiting extracted amplitudes reflecting both implementation-specific noise and the intrinsic limitations of non-fault-tolerant tomography. Quantum process tomography of the $Z$5 reveals a detected-error-free logical gate fidelity of $Z$6, manifesting high-fidelity universal gates in the lattice-surgery paradigm.

Discussion and Outlook

This work provides a definitive demonstration of lattice surgery as a versatile and practical architecture for logical computation in superconducting surface code quantum processors. Core logical operations—including syndrome-extracted entanglement, algorithm execution, and non-Clifford rotations—are performed with error-mitigation via decoding and post-selection, validating the use of merge/split lattice-surgery primitives.

Practical implications include:

• Scalable surface-code logic: The demonstrated merge/split protocols cement the viability of surface-code-based modular quantum computing.
• Error-mitigation strategies: The comparison of decoders and post-selection approaches highlights future directions for balancing fidelity and overhead.
• Universal gate realization: High-fidelity logical magic-state gates pave the way for magic-state distillation and complex algorithmic implementations.
• Architectural scaling: Results motivate future increases in code distance, improved hardware coherence, real-time decoding/feedback, and the extension of these techniques to quantum communication and more complex logical subroutines (e.g., randomized benchmarking, state distillation).

Theoretically, the scaling behavior of logical gate fidelity with code distance remains a critical open question for demonstrating true fault tolerance. Real-time syndrome decoding, active correction of detected errors, and hardware improvements to reduce leakage and readout errors will underpin the transition from post-selected experiments to scalable, autonomous logical processors.

Conclusion

This paper establishes that lattice-surgery operations on superconducting quantum processors enable robust logical state entanglement, high-fidelity algorithm execution, and universal gate synthesis, all within a fault-tolerant framework. The presented results represent a critical milestone for the modular, planar implementation of scalable quantum computation, and outline an experimentally validated pathway toward fault-tolerant quantum advantage with superconducting circuits.