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A Resource-Efficient Variational Quantum Framework for the Traveling Salesman Problem

Published 1 May 2026 in quant-ph | (2605.00739v1)

Abstract: The Traveling Salesman Problem (TSP) is a prototypical combinatorial optimization problem, but its quantum implementation is limited by the O(n2)-qubit overhead of standard one-hot encodings. Here, we propose a resource-efficient variational quantum framework based on compact binary-register encoding, a permutation-preserving problem-inspired ansatz, and a complementary divide-and-conquer execution strategy. The compact encoding reduces the data-qubit requirement to O(n log n), while the divide-and-conquer formulation lowers the number of qubits required in each local hardware execution to the size of the largest subsystem. Numerical simulations on TSP instances with 4, 5, and 6 cities achieve best average success rates of 100%, 100%, and 95.5%, respectively. A local two-qubit implementation of the divide-and-conquer approximation is further evaluated for a 5-city TSP instance on SpinQ Gemini Pro and SpinQ Triangulum II NMR quantum computers. Taken together, the results indicate how compact encoding and divide-and-conquer execution with classical post-processing can be used to study small combinatorial optimization instances on resource-constrained quantum hardware.

Authors (3)

Summary

  • The paper introduces a resource-efficient variational quantum framework for the TSP by leveraging a compact binary-register encoding and a permutation-preserving ansatz.
  • It demonstrates significant qubit and gate reductions with high success rates, achieving 100% on smaller instances and 95.5% on larger ones.
  • A divide-and-conquer strategy enables execution on constrained NISQ hardware, validated experimentally on NMR processors using advanced error mitigation techniques.

Resource-Efficient Variational Quantum Algorithms for the Traveling Salesman Problem

Introduction

The Traveling Salesman Problem (TSP) constitutes a canonical NP-hard COP, underpinning critical challenges in logistics, scheduling, and network design. The exponential growth of the solution space with increasing nn renders classical exact algorithms computationally intractable for moderate-nn instances, while heuristic and metaheuristic methods scale suboptimally and often require substantial parameterization. Quantum computing, particularly hybrid variational quantum algorithms (VQAs) in the NISQ regime, has been explored extensively for such discrete optimization tasks, with notable frameworks including VQE and QAOA. However, the practical quantum implementation of TSP remains restricted by the quadratic qubit overhead and constraint complexity of the standard one-hot QUBO encoding.

The paper "A Resource-Efficient Variational Quantum Framework for the Traveling Salesman Problem" (2605.00739) addresses this bottleneck, proposing a compact binary-register encoding with permutation-preserving subspace ansatz and a divide-and-conquer optimization protocol, enabling execution on contemporary resource-constrained quantum hardware. The authors present rigorous numerical and experimental analyses demonstrating substantial qubit and gate reductions, high success rates, and robust performance under realistic noise conditions.

Compact Binary-Register Encoding and Hamiltonian Construction

The authors introduce a symmetry-reduced binary-register encoding for the TSP, leveraging cyclic symmetry to fix one city as the start and thus condense the representation to M=n1M=n-1 city registers. Each register encodes city labels via k=log2Mk=\lceil\log_2 M\rceil qubits, yielding a total qubit count of Mlog2MM\lceil\log_2 M\rceil for the data registers, plus one auxiliary qubit for ansatz operations. The Hamiltonian is constructed with three projector-based penalty terms: repeated-city, invalid-code, and the tour length. The diagonal structure of the Hamiltonian facilitates efficient measurement and mitigates nontrivial constraint complexity.

Permutation-Preserving Problem-Inspired Ansatz

A primary technical innovation is the permutation-preserving ansatz. It utilizes ancilla-assisted parameterized register-wise SWAP operations, maintaining the variational state strictly within the feasible permutation subspace—a design that enables omission of repetition and invalid-code penalties from the objective. The ansatz is efficiently parameterized: each layer executes a sequence of controlled register SWAPs mediated by rotations on the auxiliary qubit. Repeated application of adjacent transpositions guarantees connectivity within the space of valid permutations, and circuit depth modulation provides tunable expressibility.

Divide-and-Conquer Framework for Extreme Hardware Constraints

To extend applicability to hardware with severe qubit limitations, the paper formulates a divide-and-conquer strategy, factorizing the global variational state into independent subsystem states, each prepared by a hardware-efficient local circuit. The global Hamiltonian expectation value H\langle H \rangle is reconstructible via classical aggregation of local measurement outcomes, requiring retention of constraint penalties due to product-state approximation. This protocol reduces the quantum execution to the maximum subsystem size, albeit with increased classical postprocessing and potential lack of inter-subsystem entanglement.

Benchmarking and Numerical Performance

Simulation benchmarks on randomly generated n=4,5,6n=4,5,6 city TSP instances validate the efficacy and expressibility of the proposed ansatz. The success rate, defined as the fraction of runs correctly identifying the optimal tour, is shown to scale favorably with circuit depth and instance size. Notably, the best average success rates reach 100%100\% for n=4n=4 and n=5n=5, and nn0 for nn1. Figure 1

Figure 1: Success rate as a function of circuit depth for the proposed problem-inspired ansatz in TSP instances, demonstrating circuit expressibility and reliability.

In comparison to prior one-hot feasible-subspace ansatzes [matsuo2023enhancing], the binary-register ansatz exhibits superior average and minimum success rates, particularly for larger instances, attributed to both the encoding and the feasible-subspace parameterization. Figure 2

Figure 2: Performance comparison between the binary-register ansatz and prior one-hot feasible-subspace methods, highlighting significant improvements in success rate and error robustness.

The resource analysis underscores a reduction in qubits from nn2 in one-hot to nn3 in the binary-register scheme, with tunable parameter counts and compact gate overhead.

Experimental Validation on NMR Quantum Hardware

The divide-and-conquer framework is experimentally demonstrated on SpinQ Gemini Pro and Triangulum II NMR quantum processors for a symmetry-reduced 5-city TSP. The instance is partitioned into four two-qubit subsystems, each prepared with a hardware-efficient circuit, and local measurements are classically aggregated. Optimization is performed with SPSA, and measurement-error mitigation is applied using both iterative Bayesian unfolding (IBU) and matrix inversion calibration. Figure 3

Figure 3

Figure 3: Loss trajectories on SpinQ Gemini Pro, illustrating performance under raw, IBU-mitigated, matrix inversion-mitigated, and ideal simulation protocols.

Figure 4

Figure 4

Figure 4: Loss trajectories on Triangulum II, demonstrating IBU's stability and high target-state probability relative to standard mitigation.

The hardware experiments reveal consistent identification of the optimal tour, strong mitigation of readout noise with IBU, and robust optimization trajectories despite device-level imperfections. The final target-state probabilities under IBU approach nn4 (Gemini Pro) and nn5 (Triangulum II), with mitigated loss values closely tracking noise-free reference, validating the practical viability of the protocol on current NISQ hardware.

Implications and Prospects

The proposed framework significantly advances resource efficiency for quantum TSP optimization in two distinct hardware regimes. For systems supporting larger register circuits, the permutation-preserving ansatz maintains feasibility and achieves strong numerical performance. For ultra-limited hardware, divide-and-conquer allows execution of TSP instances exceeding native qubit counts, at the cost of neglecting inter-subsystem correlations. The approach is modular, enabling hybrid quantum-classical computation with classical postprocessing and measurement error mitigation.

The theoretical implications extend to generalized COPs with permutation constraints, suggesting that compact encodings and feasible-subspace circuit design are critical to scaling VQAs in the NISQ era. Practical developments may involve further optimization of the CSWAP-based ansatz, advanced measurement-error mitigation, and integration with distributed quantum compute clusters [hasanzadeh2025distributed, khait2023distributed]. Future analyses should interrogate trainability and expressibility in higher-nn6 instances, especially with respect to barren-plateau phenomena [mcclean2018barren], and benchmark against quantum-gradient-based optimization frameworks [Chen2024PureQuantumGradient].

Conclusion

This paper establishes a resource-efficient variational quantum framework for the TSP, combining symmetry-reduced binary encoding, permutation-subspace ansatz, and a divide-and-conquer execution protocol. The methodology achieves substantial qubit and gate reductions, outperforms prior feasible-subspace methods on benchmark instances, and is validated experimentally on NMR quantum computers with robust error mitigation. The proposed approach delineates a viable route for permutation-constrained optimization in the NISQ regime and motivates future investigations into scalable, hardware-aware quantum algorithms for combinatorial optimization.

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