Reference Architecture of a Quantum-Centric Supercomputer

Abstract: Quantum computers have demonstrated utility in simulating quantum systems beyond brute-force classical approaches. As the community builds on these demonstrations to explore using quantum computing for applied research, algorithms and workflows have emerged that require leveraging both quantum computers and classical high-performance computing (HPC) systems to scale applications, especially in chemistry and materials, beyond what either system can simulate alone. Today, these disparate systems operate in isolation, forcing users to manually orchestrate workloads, coordinate job scheduling, and transfer data between systems -- a cumbersome process that hinders productivity and severely limits rapid algorithmic exploration. These challenges motivate the need for flexible and high-performance Quantum-Centric Supercomputing (QCSC) systems that integrate Quantum Processing Units (QPUs), Graphics Processing Units (GPUs), and Central Processing Units (CPUs) to accelerate discovery of such algorithms across applications. These systems will be co-designed across quantum and classical HPC infrastructure, middleware, and application layers to accelerate the adoption of quantum computing for solving critical computational problems. We envision QCSC evolution through three distinct phases: (1) quantum systems as specialized compute offload engines within existing HPC complexes; (2) heterogeneous quantum and classical HPC systems coupled through advanced middleware, enabling seamless execution of hybrid quantum-classical algorithms; and (3) fully co-designed heterogeneous quantum-HPC systems for hybrid computational workflows. This article presents a reference architecture and roadmap for these QCSC systems.

• The paper introduces a reference architecture unifying QPUs and classical HPC for advanced hybrid quantum-classical workflows.
• The paper details a three-phase roadmap from offload integration to full co-design, emphasizing low-latency, high-bandwidth coupling.
• The study demonstrates large-scale applications in Hamiltonian simulation and optimization, highlighting advanced error mitigation techniques.

Reference Architecture of a Quantum-Centric Supercomputer: Technical Analysis and Implications

Introduction and Motivation

The paper "Reference Architecture of a Quantum-Centric Supercomputer" (2603.10970) systematically formulates a comprehensive reference architecture for the tightly integrated operation of Quantum Processing Units (QPUs) and classical High-Performance Computing (HPC) systems, aiming to accelerate computational discovery in domains such as quantum chemistry, materials science, optimization, and quantum machine learning. It addresses the fragmentation of current quantum-classical workflows and articulates a phased roadmap for the co-design and progressive integration of quantum and classical computational infrastructure, emphasizing the technical and operational requirements for large-scale, application-driven quantum-centric supercomputing (QCSC).

Figure 1: The QCSC roadmap delineates three technical phases, each marked by increasing integration, coherence, and workload maturity across quantum and classical HPC components.

QCSC Application Drivers and Workload Patterns

The motivation for QCSC rests on hybrid quantum-classical use cases that cannot be efficiently supported in isolated environments. Three dominant application classes are highlighted:

• Hamiltonian Simulation: Algorithms such as Sample-based Quantum Diagonalization (SQD), SKQD, and SqDRIFT delegate the generation of rich quantum samples to the QPU, while classical resources perform configuration recovery, subspace projection, and large-scale diagonalization [robledo2024chemistry, piccinelli2025quantum, yu2025quantum]. These workflows have demonstrated molecular simulations beyond exact diagonalization, such as for the $N_2$ molecule and $[4Fe-4S]$ cluster, at circuit depths >10,000 gates and qubit counts exceeding 70.
• Combinatorial Optimization: Quantum Approximate Optimization Algorithm (QAOA) variants are being explored in hybrid pipelines, with classical systems preprocessing/encoding QUBO/HUBO problems and postprocessing quantum-sampled candidate solutions [koch2025qoblib, kotil2025moo, Romero2025hubo]. Hybridized warm-start and iterative refinement techniques have shown the potential to outperform purely quantum or classical approaches for certain nontrivial instances at 150+ qubit scale [sachdeva2026integratedpipeline].
• Quantum Machine Learning: Techniques such as quantum kernel methods and quantum-enabled feature map construction are natural candidates for division of labor: QPUs generate high-complexity distributions and kernels, while classical HPC resources perform model training, inference, and evaluation [glick2024kernels, candelori2026learning].

Workflows involving intensive error mitigation (e.g., tensor network and Pauli propagation methods) and hierarchical quantum error correction further reinforce the need for exceptionally tight quantum-classical interoperability.

Quantum-Classical Integration Patterns

The architecture is guided by a set of hybrid patterns characterized by temporal and spatial coupling requirements:

1. Batch-time, loosely coupled (e.g., standard SQD workflows): QPUs and classical supercomputers need not be co-located; jobs execute independently and communicate through high-latency channels.
2. Batch-time, tightly coupled (e.g., closed-loop SQD, iterative quantum-classical feedback): Quantum and classical systems must be co-located, with coordinated job scheduling and low-latency, high-bandwidth interconnect, as required to support iterative algorithms.
3. Near-/real-time, tightly coupled (e.g., error correction research, outer code decoding): Quantum and classical resources are physically proximate, often within the same data center rack, and high-performance interconnects enable low $\mu$s-level feedback.

   Figure 2: The SQD (left) and closed-loop SQD (right) workflows, illustrating data and control flow between quantum and classical processing nodes; closed-loop operation requires iterative circuit optimization informed by classical post-processing.

These patterns are instantiated in real workloads, e.g., large-scale coupled electronic structure computations that, for the first time, consume tens of thousands of Fugaku supercomputer nodes in tandem with an IBM Heron QPU, exceeding the computational regime and accuracy of classical full configuration interaction.

Technical Architecture of QCSC

The reference architecture is conceptualized as a layered stack:

• Hardware Infrastructure: Contains QPUs, quantum system classical runtimes (control FPGAs/ASICs/CPUs), co-located accelerator-rich scale-up CPUs/GPUs, and scale-out supercomputing resources. QPU-to-classical coupling spans low-latency intra-rack links (e.g., NVQLink, ROCE, proprietary links) to high-bandwidth wide-area fabrics.
• System Orchestration: Manages resource allocation, job submission, and scheduling across classical and quantum domains. The Quantum Resource Management Interface (QRMI) extends resource managers such as Slurm to natively handle QPU discovery, allocation, and acquisition, interfacing directly with quantum system APIs.
• Application Middleware: Supports orchestrated workflows where quantum circuit execution nodes and classical tensor compute graphs are integrated into composite directed acyclic graphs (TCGs); semantic interoperability is enabled for hybrid error mitigation, encoding, and application postprocessing modules.
• Applications Layer: Domain-specific solvers (chemistry, optimization, ML) are quantum-enabled by embedding quantum subroutines, backed by libraries for encoding, error mitigation, and postprocessing.

  Figure 3: Architecture and workflow orchestration between quantum and classical systems, with scale-up GPUs and FPGAs dedicated to outer code research and intensive postprocessing.

Cross-cutting concerns include: cloud-native software orchestration (Kubernetes/OpenShift integration), unified system management and observability (telemetry for QPU/CPU/GPU co-optimization), and end-to-end security through Confidential Code and Data Encapsulation (CDE).

Architectural Evolution: Three-Phase Roadmap

The paper delineates a concrete three-phase evolutionary trajectory:

1. Phase 1: Quantum accelerators are integrated as offload engines, with basic data exchange and job submission through high-bandwidth Ethernet or similar infrastructure. Existing deployments at RIKEN and RPI exemplify this mode.
2. Phase 2: Heterogeneous, tightly coupled systems with dedicated scale-up infrastructure and ultra-low latency/bandwidth interconnects enable near/real-time feedback, supporting sophisticated hybrid workloads (e.g., error mitigation, decoding, closed-loop optimization).
3. Phase 3: Full co-design: QPUs become first-class citizens in unified hardware and system architectures. Programming models expose high-level hybrid constructs, and multi-tenant secure operation is the norm. Seamless interoperation and division of labor between QPUs, CPUs, GPUs, and dedicated AI accelerators.

   Figure 4: Hierarchical error correction stack, with inner code error correction (real-time, hardware-integrated) complemented by outer code research and advanced logical decoding running on co-located classical resources.

At each phase, orchestration infrastructure, monitoring, and security evolve toward deeper integration, unified telemetry, and formal compartmentalization.

Architectural Strengths, Claims, and Contrasts

• Validated by Large-Scale Demonstrations: The architecture facilitates jointly running quantum-classical workloads on scales up to $>$70 qubits/10,000 gates and thousands of classical nodes; e.g., the simulation of complex metal-sulfur clusters—heretofore classically intractable—was achieved with SQD tightly coupled to Fugaku supercomputing resources.
• Explicit Classification of Integration Patterns: The taxonomy of batch-/near-/real-time, loose vs. tight coupling—mapped to temporal and spatial coupling—yields a prescriptive template for subsequent system deployments.
• Emphasis on Unified Middleware and Observability: Recognizes that next-generation workloads necessitate a quantum-classical aware software stack (QRMI, system-wide telemetry, workload-aware resource management).
• Security and Data Governance: Advocates for compartmentalized, formally verified code/data management and policy-driven access enforcement across classical and quantum subsystems, acknowledging the unique threat vectors in integrated QCSC.

Implications and Future Directions

The architecture’s successful deployment would shift the landscape of scientific HPC by enabling quantum advantage to be realized not merely at the hardware level but at the workflow and application scale. The explicit three-phase roadmap aligns with classical trends in accelerator integration (CPUs $\rightarrow$ GPUs $\rightarrow$ QPUs/AI accelerators) [arie04], forecasting a convergence toward unified programming models supporting quantum-classical heterogeneity.

Key implications and open research directions include:

• Algorithm-Architecture Co-Design: Efficient hybrid quantum-classical algorithms will need to be co-designed with awareness of latency, bandwidth, and resource locality constraints, especially as (near-)real-time workflows become routine.
• Fault-Tolerance and Hierarchical Error Correction: As hardware matures, outer and inner error correction layers, each mapped to hardware-appropriate decoding/classical inference modalities, will drive both system design and software abstractions.
• Unified Programming and Monitoring Models: Continued standardization (QRMI, container-based microservices, cross-layer observability) is a prerequisite for scalable, portable, and auditable hybrid workloads.
• Secure Multi-tenancy and Confidential Computing: As QCSCs become multi-user, research on formal methods for security, low-overhead compartmentalization, and dynamic policy enforcement will become central to production deployments.

Conclusion

The QCSC reference architecture provides a rigorous design, validated by high-impact experimental results, delineating the technical principles and system engineering roadmap for the integration of quantum and classical HPC systems. By cataloging workload patterns, integration challenges, and technical requirements across the system stack, it charts a feasible path for the broad adoption of quantum acceleration in large-scale scientific and AI workflows. Engagement with the wider HPC and quantum communities on standardization, interoperability, and application codesign is essential to realize the envisioned QCSC future.

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References

• (2603.10970) Reference Architecture of a Quantum-Centric Supercomputer.