Helios: A 98-qubit trapped-ion quantum computer (2511.05465v1)

Abstract: We report on Quantinuum Helios, a 98-qubit trapped-ion quantum processor based on the quantum charge-coupled device (QCCD) architecture. Helios features $^{137}$Ba$^{+}$ hyperfine qubits, all-to-all connectivity enabled by a rotatable ion storage ring connecting two quantum operation regions by a junction, speed improvements from parallelized operations, and a new software stack with real-time compilation of dynamic programs. Averaged over all operational zones in the system, we achieve average infidelities of $2.5(1)\times10^{-5}$ for single-qubit gates, $7.9(2)\times10^{-4}$ for two-qubit gates, and $4.8(6)\times10^{-4}$ for state preparation and measurement, none of which are fundamentally limited and likely able to be improved. These component infidelities are predictive of system-level performance in both random Clifford circuits and random circuit sampling, the latter demonstrating that Helios operates well beyond the reach of classical simulation and establishes a new frontier of fidelity and complexity for quantum computers.

• The paper introduces a 98-qubit trapped-ion quantum computer that scales QCCD architecture through advanced ion trap and multi-zone design.
• It reports 1Q gate infidelity of 2.5×10⁻⁵ and 2Q gate errors near 8×10⁻⁴, underscoring precise control and minimal crosstalk.
• The system demonstrates full pipelined operation and real-time compilation, paving the way toward fault-tolerant, large-scale quantum computing.

Helios: Architecture and Performance of a 98-Qubit Trapped-Ion Quantum Computer

Introduction

The Helios trapped-ion quantum processor represents a significant scale-up of the quantum charge-coupled device (QCCD) architecture, bringing together innovations in atomic qubit choice, trap design, and software architecture to achieve a 98-qubit programmable platform. This paper details the hardware and software advances enabling Helios, comprehensively benchmarks its operation at both component and full-system levels, and analyzes its position in the state of current quantum computing.

Helios Hardware: Ion Species and Trap Design

Helios is differentiated by its use of $^{137}$Ba$^+$ as the ion qubit, defining the $\ket{F=1, m_F=0}$ and $\ket{F=2, m_F=0}$ hyperfine ground states as the computational basis. This choice leverages optical transitions in the visible spectrum, offering high laser stability and scalability advantages over earlier architectures using, for example, $^{171}$Yb$^+$. The qubit operations employ co-propagating and intersecting 515 nm Raman beams; 1Q gates are effected with phase-stable co-propagating beams, while 2Q Mølmer-Sørensen gates use cross-beams aligned to the multi-ion crystal axis, with optical phase insensitivity removed via wrapper pulses.

Cooling and sympathetic recooling is achieved by interleaving $^{171}$Yb$^+$ ions (with similar mass and well-understood cooling transitions) as coolant, allowing mid-circuit cooling via 369 nm lasers. State preparation and measurement (SPAM) protocols use narrow-band optical pumping and multi-wavelength shelving schemes, enhanced by selective 1762 nm transitions, including options for “protected” and “ternary” measurement to mitigate crosstalk and diagnose leakage.

The underlying QCCD surface trap implements spatially separated memory and operation regions interconnected via a four-way “X” junction. Major qubit storage regions—ring, leg, and cache—are connected through segmented DC electrodes with broadcasted voltages, minimizing signal overhead. Active quantum logic occurs in up to 16 qubits per batch across 8 dedicated operation zones with individual lasers, parallelizing key operations and establishing efficient optical resource sharing.

QCCD Operation and Software Stack

The device operates in a pipelined fashion: qubits are extracted from ring memory, loaded into quantum logic zones via cache and leg memory, and subjected to quantum operations and ground-state cooling before results are measured and qubits re-stored. Ion motion (shift, split/combine, rotate, and junction transport) is orchestrated to support arbitrary qubit pairings for 2Q operations, maintaining all-to-all connectivity.

Helios’s software stack includes a novel runtime for real-time compilation, mapping high-level program “virtual qubits” to physical qubits dynamically, handling complex allocation/deallocation, mid-circuit measurement feedback, and generic classical control flow. Multiple gate-level languages and programming abstractions are supported via QIR intermediate representation. The runtime’s real-time sort algorithms minimize transport operations and enable parallel sorting with gate/cooling cycles for efficient execution.

Performance Bottlenecks

The device achieves an average “depth-1” time (i.e., time per logical layer of arbitrary 1Q/2Q gates) of 55 ms for 98-qubit fully connected circuits. Ring rotations and global ion shifts are current bottlenecks; architectural changes and compiler optimizations are identified as the likely paths for future reduction.

Benchmarking: Component and System Performance

Extensive characterization is performed at both component and system levels, reporting strong performance metrics:

Operation	Average Error / Infidelity
1Q gates	$2.5(1)\times10^{-5}$
2Q gates	$7.9(2)\times10^{-4}$ (RB), $8.1(2)\times10^{-4}$ (CB)
SPAM (standard)	$4.8(6)\times10^{-4}$
Transport idle	$5(1)\times10^{-4}$ (linear)
MCMR crosstalk	$4.8(1)\times10^{-5}$ (global)

Notably, no evidence of correlated errors or significant crosstalk was detected between subsystems in simultaneous RB analysis (detection limit: ~10% of total error for 2Q gates, ~50% for 1Q gates).

Detailed Component Characterization

• 1Q Gate Benchmarking: Clifford RB with leakage detection via ternary measurement yields an average 1Q infidelity of $2.5(1)\times10^{-5}$, with leakage rate $1.12(6)\times10^{-5}$. Error budgets match physical noise model predictions.
• 2Q Gate Benchmarking: Mølmer-Sørensen-based $R_{ZZ}(\pi/2)$ gate achieves $7.9(2)\times10^{-4}$ (RB, including leakage). Cycle benchmarking reveals dominant $IZ$ and $ZI$ errors.
• Memory Error under Transport: Linear/quadratic dependencies quantified, with leakage dominating the linear term.
• Mid-circuit Measurement and Reset (MCMR): Crosstalk is strongly localized, with “protected measure” effectively suppressing errors for full batches.

System-Level Capability

• Random Clifford Circuits (BiRB/QIRB): 98-qubit layers including arbitrary 2Q gates and mid-circuit measurement invoked. Fitted effective 2Q error $\epsilon_{\rm eff,2Q} = 2.0(3)\times10^{-3}$ and effective MCMR error per qubit $\epsilon_M (n_m=16) = 1.0(7)\times 10^{-3}$, consistent with component-level predictions.
• Random Circuit Sampling (RCS) with Mirroring: 98-qubit RCS circuits performed at depths inaccessible to classical contraction-based simulation. Fitted gate counting model yields effective 2Q errors $\epsilon_{\rm eff,2Q} = 2.00(6)\times 10^{-3}$ matching Clifford data. Classical sampling cost at Helios circuit parameters is several orders of magnitude beyond leading supercomputer resources even under optimistic memory slicing.

Architectural and Practical Implications

Helios’s architecture demonstrates the scalability potential of QCCD-based trapped-ion processors, particularly when combined with parallelization and memory/logic regionalization. The four-way junction scheme sets a clear path for further scaling—both in physical qubit number and in interconnectivity, critical for future fault-tolerant logical qubit activation. Use of visible-wavelength ions, together with mature commercial lasers, reduces the technical overhead for scaling up, both optically and electronically.

The real-time software stack, with support for dynamic program compilation and low-level control optimization, is essential for efficient execution of both static and adaptive circuit workloads central to quantum error correction, variational algorithms, and quantum networking.

In benchmarking, Helios is well beyond the reach of classical simulation for full-system behavior, satisfying fundamental benchmarks of “beyond classical” quantum computation via RCS. The system’s per-gate infidelities suggest it is within reach of fault-tolerant error correction when combined with further improvements in memory error mitigation and multi-zone parallelization.

Future Developments

Potential avenues for improvement are clear:

• Further reduction of gate error (specifically for 2Q gates) via calibration refinement, pulse shaping, and dynamic error suppression, as error analyses indicate existing errors are not limited by fundamental sources.
• Clock speed enhancement through transport operation optimizations and increased parallelism in logic/cooling regions.
• More advanced compiler strategies and transport schedules to lower program latency and overhead.

Architecturally, the demonstrated four-way junction enables efficient scaling towards larger QCCD arrays without a commensurate increase in control line complexity. This is critical for encoding scalable, transversal logic, and efficient magic state distillation for practical fault tolerance.

The implications extend to quantum simulation (notably, recent use in quantum simulations of condensed matter and cryptographic randomness certification) and foundational studies of error correction at scale. The platform is also suitable for exploration of high-efficiency code layouts, transversal gates, and advanced error correction protocols.

Conclusion

Helios establishes a new scale and fidelity milestone for ion-based QCCD quantum computing, demonstrating 98 integer-addressable qubits, high-fidelity operations, parallelized architecture, and real-time compilation. Its performance aligns with and validates detailed error models and positions the trapped-ion QCCD architecture for prospective scaling to fault-tolerant, algorithmically relevant quantum computers. The platform further substantiates the experimental feasibility of circuits and tasks beyond classical reach, and provides a solid experimental foundation for future algorithmic, architectural, and theoretical exploration in quantum information science.