Nonvolatile Memory Cells Based on MoS2/Graphene Heterostructures

Abstract: Memory cells are an important building block of digital electronics. We combine here the unique electronic properties of semiconducting monolayer MoS2 with the high conductivity of graphene to build a 2D heterostructure capable of information storage. MoS2 acts as a channel in an intimate contact with graphene electrodes in a field-effect transistor geometry. Our prototypical all-2D transistor is further integrated with a multilayer graphene charge trapping layer into a device that can be operated as a nonvolatile memory cell. Because of its band gap and 2D nature, monolayer MoS2 is highly sensitive to the presence of charges in the charge trapping layer, resulting in a factor of 10000 difference between memory program and erase states. The two-dimensional nature of both the contact and the channel can be harnessed for the fabrication of flexible nanoelectronic devices with large-scale integration.

• The paper demonstrates novel fabrication of nonvolatile memory cells using MoS₂/graphene heterostructures achieving a memory window exceeding 8 V and a program/erase current ratio >10⁴.
• The device employs a monolayer MoS₂ channel with multilayer graphene electrodes separated by a 6 nm tunneling oxide to enable efficient charge trapping via Fowler-Nordheim tunneling.
• This work paves the way for flexible, high-density electronics by overcoming scaling challenges and advancing the integration of 2D materials in semiconductor technology.

Nonvolatile Memory Cells Based on MoS₂/Graphene Heterostructures

The integration of novel materials in the development of electronic components has been an area of significant interest in recent years, primarily due to their potential in overcoming existing technological limitations. This paper presents a compelling study on the fabrication of nonvolatile memory cells leveraging two-dimensional (2D) MoS₂ and graphene heterostructures. The research is set within the framework of addressing challenges associated with scaling in conventional flash memory technology, both in lateral and vertical directions.

Heterostructure Design and Fabrication

The proposed device architecture utilizes monolayer MoS₂ as the semiconducting channel in field-effect transistor (FET) geometry, interfaced with graphene electrodes. This arrangement benefits from the outstanding electronic properties of MoS₂, such as its band gap and 2D sensitive nature, which allow for substantial modulation of electronic states based on charge presence. The heterostructure is augmented with a multilayer graphene charge-trapping layer serving as a floating gate in a nonvolatile memory cell setup.

Several fabrication steps are employed, including chemical vapor deposition (CVD) of graphene and transfer of MoS₂ flakes, to achieve a functional architecture. The prototype integrates a floating gate consisting of multilayer graphene (MLG), separated from the MoS₂ channel by a 6 nm thick tunneling oxide, which facilitates charge storage.

Device Performance and Characteristics

The device's electrical performance was characterized by measuring the transfer and output characteristics of the floating gate transistor. An important result is the manifestation of a large hysteresis in the transfer characteristics, indicating effective charge trapping in multilayer graphene floating gates, with a memory window exceeding 8 V. This provides a stable and distinct difference in the program and erase states, with a program/erase current ratio surpassing 10⁴, which is crucial for clear state discrimination in data storage applications.

The application of voltages to the control gate results in effective Fowler-Nordheim tunneling, contributing to this robust memory window. The work documents programmable states using successive voltage sweeps, demonstrating the multilevel storage potential of the device, an essential aspect for expanding memory density in future applications.

Practical and Theoretical Implications

The implications of this work are multifaceted. Practically, the utilization of 2D materials like MoS₂ and graphene could advance the miniaturization capabilities of electronic components, circumventing some of the scaling issues faced with traditional materials. The prospect of 2D materials forming the core components of flexible and high-density electronic circuits presents exciting opportunities, particularly in the field of flexible electronics and large-scale integration technologies.

From a theoretical perspective, the integration of 2D materials in complex devices advances our understanding of their interface phenomena and charge dynamics, contributing to the field of nanoelectronics and materials science. The study underscores the potential for further research into optimizing charge retention and diminishing charge impurities, aiming to enhance device performance over timescales relevant to consumer electronics.

Future Outlook

This research posits a foundation for leveraging 2D material heterostructures in nonvolatile memory technology, projecting future developments in flexible electronics involving liquid-scale processing or roll-to-roll manufacturing methods. Key areas for continued exploration include the engineering of the dielectric layers and the fine-tuning of material interfaces to maximize performance and stability. This work opens pathways for incorporating diverse 2D materials, potentially broadening the range of applications and efficiency of future electronic devices.