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Determine yield and maximum coherence of window-junction qubit fabrication

Determine the fabrication yield and the maximum coherence achievable by superconducting qubits fabricated using the silicon dioxide scaffold-assisted window junction (WJ) process, which forms Josephson junctions via a sub-micron SiO2 window and removes the scaffold with vapor HF etching.

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Background

The paper introduces a lift-off-free silicon dioxide scaffold-assisted window junction (WJ) process for fabricating Josephson junctions in superconducting qubits, aiming for compatibility with industrial tools and minimized surface damage. The authors validate the process through junction inspection, electrical measurements, and resonator quality-factor comparisons, reporting qubit relaxation times up to 57 microseconds for devices fabricated with PVD SiO2 and shorter times for PECVD SiO2 due to residual dielectric loss.

Despite these demonstrations, the authors note that their experiments were conducted on a limited number of lots. They explicitly state that they do not yet have conclusions regarding the fabrication yield or the maximum coherence achievable with the WJ process, highlighting a key unresolved question that requires further systematic paper.

References

The experiments were performed on a limited number of lots, and we have not yet drawn conclusions on qubit yield or the maximum coherence that this fabrication process can achieve.

Scaffold-Assisted Window Junctions for Superconducting Qubit Fabrication (2503.11010 - Ke et al., 14 Mar 2025) in Results and Discussion, Qubit Characterization (final paragraph)