Handling ISA-defined unpredictable behavior

Develop a mechanism for representing or isolating ISA-defined unpredictable outputs in SLEIGH specifications, while accounting for the fact that no single correct hardware behavior exists.

Background

The paper identifies discrepancies arising from instructions whose ISA specifications permit undefined or unpredictable outputs. Such behavior may vary across hardware implementations, making it difficult to define one authoritative result for differential testing. The authors therefore classify this issue as unresolvable under the current SLEIGH rules and motivate language support that can explicitly mark or isolate these outputs for analysis and comparison.

References

A number of discrepancies for , AArch64, and ARM/Thumb came from defined unpredictable outputs in their related ISA specifications. However these currently cannot be fixed as there is no single correct behavior.

— InSPECtor: Improving SLEIGH Processor Specification Veracity via Proxy  (2608.13042 - Chesser et al., 13 Aug 2026) in Section “Unresolvable Issues,” Circled I-13, “Unpredictable behavior”