Feasibility of giga-scale memristor-based neuromorphic chips with billions of neurons and on-chip self-learning

Determine whether memristor-based nanoelectronic devices can be engineered to realize truly giga-scale compact neuromorphic chips containing billions of neuron-equivalent units on a single die and supporting self-learning algorithms directly in hardware.

Background

Neuromorphic computing seeks energy-efficient, event-driven hardware inspired by biological neural systems. While CMOS-based platforms like Loihi and TrueNorth demonstrate large-scale spiking capabilities, achieving orders-of-magnitude higher integration densities with emerging devices is a central goal.

The authors explicitly raise uncertainty about the practical scalability of memristor and other nanomaterial devices to billions of neurons and whether such systems can support robust self-learning algorithms entirely on-chip, highlighting a key open feasibility question for future neuromorphic architectures.