Determine the general complexity of circuit equivalence

Determine the computational complexity of the circuit equivalence problem in general, beyond the known quasi-polynomial-time upper bound obtained by embedding the Circuit Equivalence (CE) case into graph isomorphism.

Background

The paper studies three equivalence-checking problems for circuits represented as terms in symmetric monoidal categories: Circuit Equivalence (CE), Permutation Circuit Equivalence (PCE), and Simplified Permutation Circuit Equivalence (SPCE). Circuit equivalence asks whether two circuit terms can be transformed into one another using the coherence equations.

The authors state that the complexity of the circuit equivalence problem has not been established in general. They additionally observe that, for the CE case, equivalence can be embedded into graph isomorphism, which yields a quasi-polynomial-time placement. Thus, the unresolved issue is a general complexity characterization or classification of the circuit equivalence problem.

References

To our knowledge, the complexity of the circuit equivalence problem has not been established in general. However, in the CE case, the problem can be embedded into graph isomorphism, placing it in the quasi-polynomial time class.

Challenging Benchmarks for Diagrammatic Equivalence of Circuits in TPTP and SMT-LIB  (2608.27087 - Cailler et al., 27 Aug 2026) in Remark following the definition of Simplified Permutation Circuit Equivalence, Section 2, “Problem Description,” subsection “Challenging Equivalence Checking Problems”