Efficient hardware-deployable neural architecture design for edge AI

Establish methods for designing neural architectures that simultaneously achieve high accuracy, computational efficiency, and deployability on resource-constrained edge-AI hardware without relying on manual trial and error across combinatorial architectural choices.

Background

The paper situates Neural Architecture Search (NAS) within the broader challenge of deploying deep-learning models on edge devices, where computing, memory, power, privacy, and latency constraints must be considered simultaneously. Although NAS automates parts of neural model design, the authors state that efficiently identifying architectures suitable for edge deployment remains unresolved. The challenge involves navigating a combinatorial architecture space while balancing predictive accuracy, computational cost, and compatibility with heterogeneous hardware platforms.

References

However, it is still an open challenge, especially when it comes to edge AI deployment.

NAS-Driven Hardware Accelerator Exploration for Edge AI and Quantization Effects on the Pareto Space  (2608.13293 - Mylonas et al., 13 Aug 2026) in Section I, Introduction

The newer methods reduce several older weaknesses, but they often shift the trade-offs rather than eliminating them completely. Benchmark accuracy and efficiency continue to improve, yet the gap between strong general-purpose results and dependable real-world AV performance remains open.

One-Stage Object Detectors in Autonomous Driving  (2608.19014 - Roman et al., 19 Aug 2026) in Section 8, “Open Challenges in One-Stage Detection for AVs,” subsection “Emerging Trends and Research Gaps”

While deep learning has advanced plant disease recognition substantially, deploying high-accuracy models on the resource-constrained edge devices typical of agricultural settings remains an open problem.