Detailed numerical benchmarking of larger code‑surgery gadgets
Develop detailed numerical simulations for the larger ancilla‑based code‑surgery gadgets described in Extended Data Table S5—particularly those measuring high‑weight logical operators on the LP processor code [[1122, 148, ≤20]] and the LP memory codes [[4350, 1224, ≤20]] and [[5278, 1480, ≤24]]—to quantify logical error rates under the circuit‑level depolarizing noise model and validate that their performance matches the observed behavior on the smaller gadget.
References
We expect similar behavior for the larger gadgets in Extended Data Table~\ref{tab:surgery}, and leave detailed simulations to future work.
The use of the same underlying lattice surgery primitives in the routing of Figure~\ref{Fig:Nearest_Neighbor_lCNOT} and Figures~\ref{Fig:Single_lCNOT} and~\ref{Fig:Dual_lCNOTs} suggests that a comparable logical-error performance may be achievable for the fault-tolerant nearest neighbor routing deformation schedule. The numerical results of this work are restricted to the explicitly simulated routing constructions, and so the testing of this expectation for the nearest neighbor arrangement remains to be quantified in future work.
Furthermore, creating a fast detector annotator that can accurately annotate the non-trivial lattice surgery structures that use Bell pairs at the seam is an open problem. In this research, we algebraically annotate our construction, and was not substantially expensive for the distances simulated here. But our detector annotation method could be computationally expensive for larger distances. So, creating a fast detector annotator for such seam constructions is clearly a non trivial task, and creating a proper algorithm to do it fast can be pursued as a future research.