Papers
Topics
Authors
Recent
Search
2000 character limit reached

TurboMPC: Accelerated MPC Systems

Updated 4 July 2026
  • TurboMPC is a label that encompasses high-performance, domain-specific model predictive control systems using GPU acceleration, embedded computing, and formal cryptographic methods.
  • The GPU-native differentiable TurboMPC solver uses a sequential quadratic programming outer loop with an ADMM-based inner solver to efficiently manage constraints and achieve 15–58× speedups in robotics applications.
  • TurboMPC extends to energy and thermal management through an embedded multi-core MPC engine and a cryptographic proof framework that delivers concrete, polynomial-time security bounds.

TurboMPC is a research label used for several technically distinct systems. In robotics and control, it most prominently denotes a differentiable model predictive control solver that runs entirely on the GPU and supports state and control inequality constraints, implicit integrators, cross-time-coupled costs, and slack variables (Bravo-Palacios et al., 23 Jun 2026). The same label is also used for a hardware-software co-designed embedded MPC engine for energy and thermal management of many-core HPC processors (Ottaviano et al., 10 Oct 2025), and for a tool-supported framework for simulation-based MPC security that computes concrete, polynomial-time security bounds in Maude (Sojakova et al., 30 Jul 2025). In adjacent fast-MPC literature, the term is also used informally for a broader family of acceleration strategies, including transformer-based active-constraint prediction, neural explicit MPC, data-driven offline-to-online policies, horizon-parallel ADMM, and robust tube-based decompositions (Zinage et al., 2024, Wu et al., 9 Sep 2025, Castellano et al., 17 Nov 2025, Wu et al., 20 Jan 2026, Sieber et al., 2024).

1. Terminological scope and disambiguation

In the cited literature, MPC denotes model predictive control in control and robotics papers, and multi-party computation in cryptography papers. Accordingly, “TurboMPC” does not denote a single canonical algorithm across fields; it denotes several domain-specific systems built around acceleration, scalability, or mechanization.

Usage of “TurboMPC” Domain Defining description
TurboMPC Robotics and control Fast, scalable, differentiable MPC on the GPU
TurboMPC HPC systems control Embedded multi-core MPC engine for energy and thermal management
TurboMPC Cryptographic verification Tool-supported proof framework for concrete security bounds of MPC protocols
“TurboMPC-style” methods Fast MPC literature Transformer, explicit, data-driven, ADMM, and tube-based acceleration schemes

The control-oriented usages share a recurring objective: reducing the computational burden of solving or approximating receding-horizon optimal control problems online. The cryptographic usage is different in substance: it concerns proof automation and concrete security bounds for simulation-based proofs of MPC protocols. This suggests that “TurboMPC” functions less as a stable taxonomic term than as a label for high-performance or mechanized infrastructure in two different MPC literatures (Bravo-Palacios et al., 23 Jun 2026, Ottaviano et al., 10 Oct 2025, Sojakova et al., 30 Jul 2025, Zinage et al., 2024, Wu et al., 9 Sep 2025, Castellano et al., 17 Nov 2025, Wu et al., 20 Jan 2026, Sieber et al., 2024, Subramanian et al., 2020).

2. GPU-native differentiable TurboMPC for robotics

In its most direct contemporary sense, TurboMPC is a differentiable, GPU-native model predictive control solver designed for modern robotics and learning pipelines (Bravo-Palacios et al., 23 Jun 2026). It solves the finite-horizon problem

$\min_{(x,u,\xi)} \sum_{t=0}^{N-1}\ell_t \left( \begin{bmatrix}x_t\u_t\end{bmatrix}, \begin{bmatrix}x_{t+1}\u_{t+1}\end{bmatrix} \right) + \ell_N\left( \begin{bmatrix}x_N\u_N\end{bmatrix} \right) + \tfrac{\gamma_\xi}{2}\sum_{t=0}^{N}\|\xi_t\|_2^2$

subject to

x0=xinit,ft(xt,ut,xt+1,ut+1)=0,x_0=x_{\rm init}, \qquad f_t(x_t,u_t,x_{t+1},u_{t+1})=0,

and

gtgt(xt,ut)+δξξtgt.\underline g_t \le g_t(x_t,u_t)+\delta_\xi\xi_t \le \overline g_t.

This formulation supports state and control inequality constraints, implicit dynamics / implicit integrators, cross-time-coupled costs such as control-rate penalties, slack variables for recursive feasibility, differentiability, and batched execution on GPU.

The solver architecture combines sequential quadratic programming (SQP) in the outer loop with a custom alternating direction method of multipliers (ADMM) inner solver. At each SQP iteration, the nonlinear optimal control problem is approximated by a structured QP,

min(x,ξ)12xPx+qx+γξ2ξ2\min_{(x,\xi)} \quad \tfrac12 x^\top P x + q^\top x + \tfrac{\gamma_\xi}{2}\|\xi\|^2

subject to

Cx=c,GGx+δξξG.Cx=c,\qquad \underline G \le Gx+\delta_\xi\xi \le \overline G.

The paper emphasizes the resulting sparsity pattern: PP is block-tridiagonal, CC is block-bidiagonal, and GG is block-diagonal. Those structures are central because the ADMM Schur complement,

S=P+σI+AρA,S = P+\sigma I + A^\top \rho A,

remains block-tridiagonal.

A distinctive practical contribution is the handling of slack variables without enlarging the QP linear system. The solver rewrites the QP with auxiliary variables zz and solves a proximal projection problem in which the inequality block is updated either by interval projection or, when slacks are enabled, by the weighted operator

x0=xinit,ft(xt,ut,xt+1,ut+1)=0,x_0=x_{\rm init}, \qquad f_t(x_t,u_t,x_{t+1},u_{t+1})=0,0

This preserves feasibility restoration capability while avoiding a larger KKT system.

TurboMPC is differentiable through the converged solution by implicit differentiation of the KKT system rather than by backpropagating through all SQP and ADMM iterations. With x0=xinit,ft(xt,ut,xt+1,ut+1)=0,x_0=x_{\rm init}, \qquad f_t(x_t,u_t,x_{t+1},u_{t+1})=0,1, the sensitivity is

x0=xinit,ft(xt,ut,xt+1,ut+1)=0,x_0=x_{\rm init}, \qquad f_t(x_t,u_t,x_{t+1},u_{t+1})=0,2

The implementation is co-designed across a JAX frontend, a CUDA backend, and a C++ FFI bridge. The frontend supplies the outer SQP loop, automatic differentiation of x0=xinit,ft(xt,ut,xt+1,ut+1)=0,x_0=x_{\rm init}, \qquad f_t(x_t,u_t,x_{t+1},u_{t+1})=0,3, and batching via vmap; the backend fuses the ADMM inner loop into CUDA kernels; and the solver uses cuDSS as a shared sparse direct factorization primitive for both forward and backward linear solves. An earlier version that kept ADMM in JAX and delegated only linear solves to CUDA had too much kernel-launch overhead; fusing the entire ADMM loop into CUDA gave 4–8× speedup at batch sizes 256–512 (Bravo-Palacios et al., 23 Jun 2026).

3. Empirical behavior, scaling, and applications of the GPU solver

The empirical program for TurboMPC spans constrained planning, reinforcement learning, imitation learning, and autonomous racing (Bravo-Palacios et al., 23 Jun 2026). In the paper’s abstract, TurboMPC achieves up to x0=xinit,ft(xt,ut,xt+1,ut+1)=0,x_0=x_{\rm init}, \qquad f_t(x_t,u_t,x_{t+1},u_{t+1})=0,4 and x0=xinit,ft(xt,ut,xt+1,ut+1)=0,x_0=x_{\rm init}, \qquad f_t(x_t,u_t,x_{t+1},u_{t+1})=0,5 speedups over state-of-the-art CPU and GPU differentiable solvers, respectively. In the linear-system RL scaling benchmark, at tolerance x0=xinit,ft(xt,ut,xt+1,ut+1)=0,x_0=x_{\rm init}, \qquad f_t(x_t,u_t,x_{t+1},u_{t+1})=0,6, the paper reports up to 14.6× speedup over mpc.pytorch in the forward pass and up to 9.4× speedup in the backward pass. At tolerance x0=xinit,ft(xt,ut,xt+1,ut+1)=0,x_0=x_{\rm init}, \qquad f_t(x_t,u_t,x_{t+1},u_{t+1})=0,7, it reports up to 15× speedup over acados and up to 58× speedup over mpc.pytorch. The advantage grows with batch size, horizon length, and problem dimension, and the solver remained functional on all tested sizes.

On the constrained drone obstacle-avoidance task, TurboMPC produced closed-loop trajectories around three circular obstacles while supporting state inequalities, control bounds, and slack variables. The paper notes that slack variables improved convergence but increased constraint violation, as expected. On the humanoid imitation-learning task, using 100 expert demonstrations and 20 random initializations, the reported performance at step 1000 includes median weight recovery error x0=xinit,ft(xt,ut,xt+1,ut+1)=0,x_0=x_{\rm init}, \qquad f_t(x_t,u_t,x_{t+1},u_{t+1})=0,8, 19/20 runs below 1.0, a best run of 0.080, median imitation loss x0=xinit,ft(xt,ut,xt+1,ut+1)=0,x_0=x_{\rm init}, \qquad f_t(x_t,u_t,x_{t+1},u_{t+1})=0,9, and best loss gtgt(xt,ut)+δξξtgt.\underline g_t \le g_t(x_t,u_t)+\delta_\xi\xi_t \le \overline g_t.0. The recovered weights produced a controller that successfully balanced in MuJoCo.

The neural-network cost-function experiment used a gtgt(xt,ut)+δξξtgt.\underline g_t \le g_t(x_t,u_t)+\delta_\xi\xi_t \le \overline g_t.1 network, batch size 4, horizon 8, and 500 Adam steps. Closed-loop tracking RMSE dropped from gtgt(xt,ut)+δξξtgt.\underline g_t \le g_t(x_t,u_t)+\delta_\xi\xi_t \le \overline g_t.2 initially to gtgt(xt,ut)+δξξtgt.\underline g_t \le g_t(x_t,u_t)+\delta_\xi\xi_t \le \overline g_t.3, showing that the solver can support differentiable training with expressive learned cost functions.

The most operationally significant deployment is full-scale autonomous racing on a Lexus LC500. The racing MPC includes state and control bounds, cross-time costs on control rate, slack variables, implicit dynamics, and a minimum-time objective. TurboMPC was used for GPU-batched Bayesian optimization with Optuna TPE. Reported throughput was about 150 trials/hour or 24 s/trial on GPU versus about 21 trials/hour or 171 s/trial on CPU, a speedup of about 7.12×. With batch size 1024, throughput increased to about 1029 trials/hour or 3.5 s/trial, about 6.9× faster than 8-batch GPU runs and about 50× faster than CPU. The tuned controller drove significantly faster than the hand-tuned baseline, with average speed increased by 2.44 m/s. On long-horizon planning, the SQP+OSQP baseline became slower as horizon increased; at gtgt(xt,ut)+δξξtgt.\underline g_t \le g_t(x_t,u_t)+\delta_\xi\xi_t \le \overline g_t.4 it lost control of the vehicle, while TurboMPC maintained control and scaled to horizons of more than 8000 knot points (Bravo-Palacios et al., 23 Jun 2026).

4. Embedded TurboMPC for energy and thermal management

A second control-oriented use of the term appears in the design of an on-chip controller for energy and thermal management (ETM) of many-core HPC processors (Ottaviano et al., 10 Oct 2025). Here TurboMPC denotes a co-designed, embedded, multi-core MPC engine that must operate with deterministic latency, low memory footprint, and low power. The target regime is unusually demanding: the controller must solve an optimization problem online at roughly 1 kHz control bandwidth, and computational and memory demands scale with processing-element count.

The control problem is a centralized constrained MPC with state vector gtgt(xt,ut)+δξξtgt.\underline g_t \le g_t(x_t,u_t)+\delta_\xi\xi_t \le \overline g_t.5 representing temperatures and control input gtgt(xt,ut)+δξξtgt.\underline g_t \le g_t(x_t,u_t)+\delta_\xi\xi_t \le \overline g_t.6 representing power allocated to each PE:

gtgt(xt,ut)+δξξtgt.\underline g_t \le g_t(x_t,u_t)+\delta_\xi\xi_t \le \overline g_t.7

For ETM, the constraints include per-PE temperature limits, per-PE power limits, total chip power budget, and per-domain power budgets:

gtgt(xt,ut)+δξξtgt.\underline g_t \le g_t(x_t,u_t)+\delta_\xi\xi_t \le \overline g_t.8

The optimizer is OSQP with the direct QDLDL solver, warm start, fixed-iteration termination, and a KKT solve based on sparse forward elimination and backward substitution.

The hardware platform is ControlPULP, an open-source 32-bit RISC-V controller with a single-core manager domain running FreeRTOS and an eight-core Snitch PMCA for acceleration. The on-chip memory hierarchy comprises 128 KiB L2 SPM for the manager domain and 1 MiB L1 SPM for the PMCA in the main configuration. The PMCA includes frep hardware loop support, SSR/SSSR streaming registers, a shared 32-bank SPM, and a DMA core. These architectural details are used to accelerate the sparse triangular systems arising in QDLDL.

Two reduction techniques dominate the design. The first is Discrete Model Pruning (DMP), which removes low-magnitude thermal couplings while keeping temperature prediction error within ±0.5°C. The selected threshold is 0.005 for all evaluated problems, and the paper states that model complexity drops from gtgt(xt,ut)+δξξtgt.\underline g_t \le g_t(x_t,u_t)+\delta_\xi\xi_t \le \overline g_t.9 to min(x,ξ)12xPx+qx+γξ2ξ2\min_{(x,\xi)} \quad \tfrac12 x^\top P x + q^\top x + \tfrac{\gamma_\xi}{2}\|\xi\|^20, with up to 27× fewer nonzeros for P12×12_H4. The second is HYPT / ParSPL, an ahead-of-time scheduling strategy for sparse triangular solves that organizes work into levels, tiles, and shards, then maps shards across the 8 PMCA cores. The scheduling pipeline includes partial level scheduling, graph-based tiling, kernel assignment, as-late-as-possible scheduling, and intra-shard parallelization.

The reported system-level results are concrete. The controller manages up to 144 PEs with sub-millisecond latency at 500 MHz. For P9×9_H2 with max_iter = 15, the triangular-solver component takes about 307k cycles, dense vector operations are reduced from 2490k cycles to 37k cycles, and total latency is 0.69 ms. The optimized controller achieves 33× lower latency and 7.9× higher energy efficiency than a single-core baseline, operates within less than 1 MiB memory footprint, consumes as little as 325 mW, and occupies less than 1.5% of a typical HPC processor’s die area. The best reported FPU utilization is 56.6%, about 43× higher than single-core vanilla OSQP and about 6× higher than naive 8-core parallelization (Ottaviano et al., 10 Oct 2025).

5. TurboMPC as a cryptographic proof framework

In cryptography, TurboMPC refers not to control but to a tool-supported proof framework for concrete security bounds for simulation-based proofs of MPC protocols (Sojakova et al., 30 Jul 2025). Its purpose is to let users prove simulation-based MPC security and automatically obtain concrete, polynomial-time security bounds rather than only asymptotic negligible guarantees. The framework is built on IPDL-style equational reasoning, a cost-aware semantics for protocols and adversaries, a Maude implementation, and a DSL that hides low-level rewriting details.

The proof method rewrites a real protocol min(x,ξ)12xPx+qx+γξ2ξ2\min_{(x,\xi)} \quad \tfrac12 x^\top P x + q^\top x + \tfrac{\gamma_\xi}{2}\|\xi\|^21 into an ideal protocol min(x,ξ)12xPx+qx+γξ2ξ2\min_{(x,\xi)} \quad \tfrac12 x^\top P x + q^\top x + \tfrac{\gamma_\xi}{2}\|\xi\|^22 through exact and approximate equalities, while explicitly accounting for runtime overhead when a program context is absorbed into the adversary. The resulting security statement is a bound on

min(x,ξ)12xPx+qx+γξ2ξ2\min_{(x,\xi)} \quad \tfrac12 x^\top P x + q^\top x + \tfrac{\gamma_\xi}{2}\|\xi\|^23

A central technical device is the absorption lemma, which controls the cost of transforming an adversary against the protocol into an adversary against an underlying cryptographic assumption. The framework encodes IPDL protocols on a Turing Machine tape, analyzes interpreter runtime, and uses the resulting cost as the reduction overhead. A notable derived polynomial bound is

min(x,ξ)12xPx+qx+γξ2ξ2\min_{(x,\xi)} \quad \tfrac12 x^\top P x + q^\top x + \tfrac{\gamma_\xi}{2}\|\xi\|^24

This is the reduction-overhead bound used in the concrete-security analysis.

The Maude implementation provides a rewrite-based proof engine for exact and approximate IPDL reasoning rules, a DSL for concise proof scripts, automatic compilation of high-level proof commands into low-level Maude strategies, and automatic computation of concrete security bounds. Typical commands include subst fam OkMsgAdvId into fam Out, use assumption enc-dec-correctness, use approx assumption cpa, and fold fam Enc into fam LeakCtxtNetAdv. The paper presents four case studies: Authenticated-to-secure channel, Diffie-Hellman key exchange to one-time pad, Multi-party coin flipping, and Multi-party GMW MPC. The most prominent result is the first fully mechanized formal verification of the GMW MPC protocol over min(x,ξ)12xPx+qx+γξ2ξ2\min_{(x,\xi)} \quad \tfrac12 x^\top P x + q^\top x + \tfrac{\gamma_\xi}{2}\|\xi\|^25 parties with concrete security bounds. For the GMW case, the number of times the OT assumption is used is on the order of

min(x,ξ)12xPx+qx+γξ2ξ2\min_{(x,\xi)} \quad \tfrac12 x^\top P x + q^\top x + \tfrac{\gamma_\xi}{2}\|\xi\|^26

for min(x,ξ)12xPx+qx+γξ2ξ2\min_{(x,\xi)} \quad \tfrac12 x^\top P x + q^\top x + \tfrac{\gamma_\xi}{2}\|\xi\|^27 circuit wires, and the context bound is on the order of min(x,ξ)12xPx+qx+γξ2ξ2\min_{(x,\xi)} \quad \tfrac12 x^\top P x + q^\top x + \tfrac{\gamma_\xi}{2}\|\xi\|^28.

A major practical result is proof-size reduction. The Coin Flip case study is reduced from 1905 LoC in prior work to 256 LoC, a 72% reduction. Another example reported in the abstract reduces a prior case study from 2019 LoC to 567 LoC. Runtime also improves: for the Coin Flip case study, the paper reports about 5 seconds versus a few minutes in the earlier Coq-based implementation. This work extends a broader line of computer-aided proofs for cryptographic MPC. An earlier EasyCrypt formalization proved security of Maurer’s MPC protocol against a malicious adversary, formalized additive and replicated secret sharing, and introduced the NI-style active-security notion of input independence (Haagh et al., 2018).

Around the core GPU and embedded usages, the literature contains several methods that are described as “TurboMPC-style,” “in the same spirit,” or “closest” to TurboMPC in the sense that they reduce online optimization cost while preserving some combination of feasibility, scalability, and structure.

A first lineage is learning-augmented online MPC. TransformerMPC learns, offline, a mapping from MPC problem parameters—initial state, reference trajectory, and related problem data—to the active constraint set, and uses a second transformer for warm-start initialization (Zinage et al., 2024). The constraint classifier is written as min(x,ξ)12xPx+qx+γξ2ξ2\min_{(x,\xi)} \quad \tfrac12 x^\top P x + q^\top x + \tfrac{\gamma_\xi}{2}\|\xi\|^29, and the warm-start predictor as Cx=c,GGx+δξξG.Cx=c,\qquad \underline G \le Gx+\delta_\xi\xi \le \overline G.0. The method removes predicted inactive constraints online, verifies the reduced solution against the original constraints offline, and falls back to the full MPC problem if a removed constraint would be violated. The paper reports up to Cx=c,GGx+δξξG.Cx=c,\qquad \underline G \le Gx+\delta_\xi\xi \le \overline G.1 average solve-time reduction on a wheeled biped for qpOASES, Cx=c,GGx+δξξG.Cx=c,\qquad \underline G \le Gx+\delta_\xi\xi \le \overline G.2 on a quadrotor for CVXOPT, and Cx=c,GGx+δξξG.Cx=c,\qquad \underline G \le Gx+\delta_\xi\xi \le \overline G.3 on an Atlas humanoid balancing task for CVXOPT, with the abstract stating up to 35x improvement in runtime without any loss in performance.

A second lineage is neural explicit MPC. TransMPC formulates the MPC policy as an encoder-only Transformer with bidirectional self-attention, mapping the current state and future reference trajectory directly to the whole open-loop control sequence in a single forward pass (Wu et al., 9 Sep 2025). It alternates between a sampling phase and a learning phase, trains directly on the true finite-horizon MPC cost by automatic differentiation through the system rollout, and uses random horizon sampling with a replay buffer to improve generalization across varying states and horizon lengths. The paper claims order-of-magnitude speedup over classical online MPC solvers, reports that TransMPC is consistently more accurate than the neural explicit-MPC baselines, and states that computation time is stable across horizon lengths and does not require retraining when Cx=c,GGx+δξξG.Cx=c,\qquad \underline G \le Gx+\delta_\xi\xi \le \overline G.4 changes. The same paper also notes that it is still a learned approximate policy and provides no hard guarantee of optimality.

A third lineage is offline data reuse with guarantees. The paper “Data-driven Acceleration of MPC with Guarantees” constructs a nonparametric policy from offline conservative MPC solutions (Castellano et al., 17 Nov 2025). Its online rule is

Cx=c,GGx+δξξG.Cx=c,\qquad \underline G \le Gx+\delta_\xi\xi \le \overline G.5

which can be viewed as a lookup-like greedy policy over a certified upper bound. Under sufficient coverage of the offline data, the policy is recursively feasible and admits a provable, bounded optimality gap. The abstract reports that the policy is between 100 and 1000 times faster than standard MPC, with only a modest hit to optimality.

A fourth lineage is solver-side structural acceleration. Cx=c,GGx+δξξG.Cx=c,\qquad \underline G \le Gx+\delta_\xi\xi \le \overline G.6MPC is a parallel-in-horizon and construction-free NMPC algorithm based on ADMM, a new variable-splitting scheme, and a velocity-based system representation (Wu et al., 20 Jan 2026). It operates directly on local system matrices without explicit MPC-to-QP construction, executes stagewise updates in parallel, and reduces all ADMM substeps to small matrix inversions, projections, and vector operations. In the nonlinear CSTR example with horizon Cx=c,GGx+δξξG.Cx=c,\qquad \underline G \le Gx+\delta_\xi\xi \le \overline G.7, the paper reports median times per MPC step of 1.891 s for OSQP total, including 1.073 s construction time, versus 0.526 s for Cx=c,GGx+δξξG.Cx=c,\qquad \underline G \le Gx+\delta_\xi\xi \le \overline G.8MPC. In random linear-system scalability tests, Cx=c,GGx+δξξG.Cx=c,\qquad \underline G \le Gx+\delta_\xi\xi \le \overline G.9MPC on GPU has nearly constant computation time across tested scales.

A fifth lineage is robust and tube-based decomposition. Filter-based system level tube-MPC (SLTMPC) optimizes an online disturbance tube and tube controller for uncertain linear systems with additive disturbances and polytopic model uncertainty, and provides receding-horizon recursive feasibility and ISS through a new terminal design (Sieber et al., 2024). It also introduces an asynchronous computation scheme that separates expensive tube optimization from fast nominal trajectory optimization; in the VTOL example, the full SLTMPC median runtime is about 719.8 ms, while the primary process median runtime is about 16.6 ms. Tube-enhanced multi-stage MPC combines multi-stage scenario trees up to a robust horizon PP0 with tube propagation beyond PP1, thereby yielding linear growth of problem size beyond the robust horizon and no growth with respect to small-magnitude uncertainties handled by an offline invariant tube (Subramanian et al., 2020). Dynamic Tube MPC goes further by optimizing the tube geometry itself online through the tube-thickness dynamics

PP2

and the paper states that its sequential convex programming optimization converged in about 3–4 iterations in simulation (Lopez et al., 2019).

Taken together, these methods show that “TurboMPC” in the control sense is best understood as a family resemblance rather than a single mechanism. Some methods preserve exact online optimization while reducing its burden by constraint prediction or structural parallelism; others replace online optimization with explicit, learned, or nonparametric inference; and robust variants shift complexity into offline tube design, asynchronous decomposition, or adaptive tube geometry. The common thread is the attempt to make receding-horizon control compatible with real-time hardware and, increasingly, with GPU-native learning workflows.

Topic to Video (Beta)

No one has generated a video about this topic yet.

Whiteboard

No one has generated a whiteboard explanation for this topic yet.

Follow Topic

Get notified by email when new papers are published related to TurboMPC.