Tensor-Network Quantum Circuits

• Tensor-network-bridged quantum circuits are a hybrid method that maps quantum circuits onto tensor networks, enabling efficient simulation and verification.
• They utilize structures like Tensor Decision Diagrams and partitioning techniques to reduce computational complexity and manage resource usage.
• Applications include circuit design automation, error detection, and formal verification, supporting scalable and robust quantum hardware development.

Tensor-network-bridged quantum circuits are a class of representations and methodologies that combine the formalism and efficiency of tensor networks (TNs) with the operational semantics of quantum circuits. These approaches aim to address the exponential complexity of quantum circuit simulation, design, and verification, leveraging the rich structure and scalable manipulation of TNs. The resulting frameworks enable efficient simulation, compact circuit representation, and sophisticated hybrid classical-quantum workflows across quantum information processing, design automation, and quantum many-body physics.

1. Foundational Principles of Tensor-Network-Bridged Quantum Circuits

Tensor networks, such as Matrix Product States (MPS), Tree Tensor Networks (TTN), Projected Entangled Pair States (PEPS), and Multi-scale Entanglement Renormalization Ansatz (MERA), were originally developed to efficiently represent and contract high-dimensional tensors arising in many-body quantum systems. A quantum circuit can be mapped, at the algebraic level, to a network of tensors, with each gate and qubit represented as low-rank tensors whose contractions yield amplitudes or probabilities.

Bridging quantum circuits with TNs involves:

• Recasting the unitary (or quantum channel) evolution as a tensor network, where tensors correspond to gates and the circuit’s connectivity defines contraction topology (Nguyen et al., 2021, Brennan et al., 2021, Hong et al., 2020).
• Developing data structures (such as Tensor Decision Diagrams (TDDs)) that provide canonical forms for arbitrary tensorial representations of circuits, supporting efficient manipulation, partitioning, and contraction (Hong et al., 2020).
• Embedding and decomposing known TN states into quantum circuits, thus facilitating the design of variational quantum circuits that inherit expressiveness and compactness from the TN representation (Haghshenas et al., 2021, Rudolph et al., 2022, Sugawara et al., 31 Jan 2025, Dubey et al., 23 Apr 2025).

Quantum circuit tensor networks also extend to hybrid classical-quantum architectures and variational ansätze where local circuit blocks correspond to building tensors in established TN forms.

2. Key Data Structures and Algorithms

Tensor Decision Diagrams (TDDs)

TDDs are rooted, weighted directed acyclic graphs encoding tensors based on a recursive Boole–Shannon expansion. Each nonterminal node is labeled by a decision variable (qubit index), with two outgoing edges (“low” and “high”) corresponding to the possible binary values. The value at a node is recursively constructed: $$(v) = w_0 \cdot \overline{x} \cdot (low(v)) + w_1 \cdot x \cdot (high(v))$$ for variable $x$ at node $v$, with complex weights $w_0, w_1$ (Hong et al., 2020).

To ensure a canonical (i.e., unique up to variable ordering) and compact format:

• Normalization rules (NR1, NR2) and reduction rules (RR1–RR4) are used to unify and eliminate redundant or zero nodes.
• The canonicity theorem guarantees that reduced, ordered TDDs uniquely represent a tensor.

Core Operations: Addition and Contraction

Operations essential for circuit simulation (sum, contraction/product) are implemented by extending the Boole–Shannon expansion to TDDs:

• Addition involves recursively combining corresponding branches of two TDDs, matching variable orderings.
• Contraction (which combines tensors along shared indices) is managed by recursively summing over the possible values of contracted variables, using slicing and summation schemes. For tensors $ℱ$ and $𝒢$ sharing variables $V$: $$\text{cont}(ℱ, 𝒢, V) = \sum_{c \in \{0,1\}} \text{cont}(ℱ|_{x=c}, 𝒢|_{x=c}, V \setminus \{x\})$$ if $x \in V$, else the branching continues with each case (Hong et al., 2020).

Circuit Partitioning and Efficient Simulation

Partitioning a circuit before building its full TDD representation allows for local contraction and parallelization. Two schemes are described:

• Partition Scheme I: horizontal or vertical circuit cuts group gates/qubits, with TDDs for each group contracted at the end.
• Partition Scheme II: tailored cuts through controlled operations or logical blocks. These reduce intermediate TDD sizes and peak memory usage, as confirmed by experimental ratios of intermediate to final diagram size ($\sim$1.25–1.28 with partitioning vs. 2.46 without) (Hong et al., 2020).

3. Efficiency, Scaling, and Benchmark Results

Decision diagram and tensor-network-based methods provide memory and computational advantages:

• Memory: Unlike explicit $2^n \times 2^n$ matrix representations (which become unmanageable beyond $\sim$15 qubits), DD/TN-based representations (TDDs, QMDDs) scale with the circuit’s algebraic redundancy and structure, enabling simulation of circuits with $21$ or more qubits, and even up to $100$ qubits for highly structured circuits such as Bernstein–Vazirani (Hong et al., 2020).
• Performance: On small circuits, explicit matrix operations or standard tensor-network libraries (e.g., TensorNetwork, QuTiP) may outperform DD-based simulations, but for larger and deeper circuits, the DD/TN approach becomes superior, both in time and space.
• Comparisons with QMDDs indicate TDDs have roughly twice as many nodes in the worst-case but similar numbers of edges; empirical memory consumption matches that of QMDDs, and with partitioning, TDDs can outperform QMDDs due to smaller intermediate structures.

Relevant experimental findings include:

• Simulation of 16-qubit quantum Fourier transform circuits requires $\sim$64 GB in explicit matrix representation, but TDD and other DD-based approaches handle 21+ qubits using orders-of-magnitude less memory.
• Partition-based TDD contraction schemes yielded up to 2× smaller peak intermediate diagram sizes compared to non-partitioned approaches.
• Time-to-solution for DD-based approaches improves relative to matrix-based methods as qubit count and depth increase, retaining reasonable simulation times where others fail due to memory or timeouts.

4. Applications in Quantum Circuit Design Automation

TDD-based and TN-bridged quantum circuits are suited for a range of design automation and formal verification tasks:

• Equivalence Checking: Canonical representations ensure that functionally equivalent circuits map to isomorphic TDDs, enabling rigorous unitary equivalence verification.
• Error Detection: Comparing TDDs of compiled or synthesized circuits with reference or specification TDDs efficiently highlights discrepancies or synthesis bugs.
• Synthesis and Optimization: Compact, manipulable TDD intermediate forms support subcircuit analysis, redundancy detection, and targeted optimization workflows during logical and physical circuit layout.
• Simulation and Trace Computation: TDD contraction algorithms efficiently yield circuit output statistics, measurement probabilities, and traces (for e.g., fidelity estimates, trace distance, and approximate equivalence).
• Verification for Dynamic Circuits: TDDs support representation of circuits with classical control and measurement, accommodating both static and adaptive/dynamic quantum programs.

5. Limitations, Trade-offs, and Implementation Considerations

While TDDs and tensor-network-bridged circuits provide significant efficiency advantages, several trade-offs and limitations are observed:

• Variable Ordering: The efficiency and compactness of TDDs are sensitive to the choice of variable (qubit) ordering. Poor orderings can increase diagram size and computational cost.
• Redundancy Exploitation: TDD advantage arises only when the circuit or tensor admits sufficient structure or redundancy—random circuits or those with maximal entanglement typically yield large TDDs.
• Worst-Case Complexity: Theoretical bounds indicate that, in the worst case, TDDs may require twice as many nodes as QMDDs; however, this does not translate into worse practical memory usage due to the edge count and redundancy reduction by normalization.
• Implementation Language: State-of-the-art QMDD tools are commonly written in C++ for efficiency, while proof-of-concept TDD implementations in Python show competitive performance but may benefit from low-level optimization for large-scale deployment.

6. Historical Developments and Connections to Broader Research

Tensor-network-bridged quantum circuits draw from multiple lines of research:

• Decision Diagrams: Techniques such as ROBDDs for Boolean functions and QMDDs for quantum matrix representation established the value of DD canonicity and manipulation.
• Tensor Networks in Physics: Decades of work on MPS, PEPS, and related TNs in many-body quantum physics demonstrated the scalability and flexibility of low-rank tensor representations.
• Quantum Verification and Simulation: The growing gap between quantum hardware scale and simulation capability on classical devices has led to adoption of TN methods by quantum software libraries and design automation toolchains.

This approach is being integrated into advanced verification, simulation, and optimization frameworks for quantum hardware and software, as evidenced by benchmarks on standard quantum algorithms (QFT, Bernstein–Vazirani, Quantum Volume).

7. Outlook and Future Directions

The development of TDDs and tensor-network-bridged quantum circuits points toward broadening the scope of scalable quantum design automation. Potential directions include:

• Hybrid Methods: Integrating TDD/TN-based simulation with circuit partitioning, dynamic slicing, and distributed simulation to handle larger and more entangled circuits.
• Automated Variable Ordering: Employing heuristic and optimization-based ordering strategies to minimize TDD size and contraction cost.
• Hardware Integration: Leveraging compact TDD and TN representations for in-hardware deployment, enabling formal verification and error detection close to the hardware layer.
• Generalized Tensor Structures: Expansion into higher-dimensional and nonbinary variable spaces for qudits and continuous-variable quantum circuits.

The formalism of tensor-network-bridged circuits and diagrammatic representations continues to underpin much of the progress in quantum hardware verification and simulation, offering a methodological bridge between the representational power of tensor networks and the operational requirements of practical quantum circuit design (Hong et al., 2020).