Vertical SIS Josephson Junctions

• Vertical SIS Josephson junctions are layered structures where superconducting electrodes sandwich a nanometric insulating barrier, enabling out-of-plane supercurrent tunneling.
• Advanced fabrication techniques such as vdW stacking and microcleave-and-stack ensure pristine interfaces and enable precise control over barrier uniformity.
• Device performance is characterized by key metrics like Ic, Rn, and phase shifts, highlighting the interplay of tunneling dynamics, magnetic effects, and topological features.

A superconductor–insulator–superconductor vertical Josephson junction is a layered weak-link structure in which two superconducting electrodes are stacked across an insulating barrier and the supercurrent flows perpendicular to the layers. In contemporary practice, this category includes conventional tunnel junctions, van der Waals tunnel junctions, magnetic-insulator junctions, high-$T_c$ c-axis trilayers, and twist-controlled cuprate interfaces; it also borders closely related vertical $S$–barrier–$S$ architectures in which the barrier is not insulating but still defines a vertical Josephson weak link (Navarro et al., 2020, Idzuchi et al., 2020, Lee et al., 2021, Kim et al., 5 Feb 2026).

1. Structural archetypes and vertical geometry

Vertical SIS junctions are defined first by geometry rather than by a single material system: the active region is a stack, the transport direction is out of plane, and the Josephson coupling is established across a barrier whose thickness is typically nanometric. In high-$T_c$ perovskite trilayers, the canonical example is GdBa$_2$Cu$_3$O$_{7-\delta}$/BaTiO$_3$/GdBa$_2$Cu$_3$O$S$0, with $S$1 nm GBCO electrodes and a 1–3 nm BaTiO$S$2 barrier sputtered on (100) SrTiO$S$3; the CuO$S$4 planes lie parallel to the substrate, so the current flows along the c-axis through the trilayer (Navarro et al., 2020).

Van der Waals implementations replace amorphous tunnel oxides by crystalline atomically thin barriers. In NbSe$S$5/Cr$S$6Ge$S$7Te$S$8/NbSe$S$9, the barrier is a ferromagnetic insulating vdW crystal, with devices reported for 1, 2, and 6 monolayers of Cr$S$0Ge$S$1Te$S$2. The resistance–area product follows

$S$3

with $S$4 nm and $S$5, which is identified as the hallmark of an SIS tunnel junction (Idzuchi et al., 2020).

Twisted cuprate junctions realize a distinct vertical SIS form. In microcleave-and-stack Bi$S$6Sr$S$7CaCu$S$8O$S$9, the artificial interface is formed between two cleaved BiO-terminated surfaces, producing a BiO–BiO “quadruple layer” and a center-to-center CuO$T_c$0 bilayer spacing of $T_c$1 nm across the interface, larger than the intrinsic $T_c$2 nm spacing of bulk intrinsic Josephson junctions. The resulting device is still a c-axis SIS junction, but with a twist angle $T_c$3 as an additional control parameter (Lee et al., 2021).

A closely related but explicitly non-SIS architecture is the vertical Nb/multilayer graphene/Nb membrane junction. There the stack is Nb / multilayer graphene / Nb across a lithographically defined through-hole in a freestanding 200 nm SiN$T_c$4 membrane. The barrier is 5–6 layer graphene, so the device is an $T_c$5–$T_c$6–$T_c$7 weak link rather than an $T_c$8–$T_c$9–$_2$0 tunnel junction; however, it is directly relevant because it establishes a deposition-compatible vertical geometry for oxidation-sensitive Nb without ambient exposure of buried interfaces (Kim et al., 5 Feb 2026).

2. Barrier materials, tunneling, and weak-link regimes

The defining physics of a vertical SIS junction is set by the barrier. In conventional language, the Josephson effect begins from

$_2$1

with a nonmagnetic insulating barrier and a ground state at $_2$2. In vertical vdW magnetic-insulator junctions, this can generalize to

$_2$3

so that the barrier itself contributes an intrinsic phase shift (Idzuchi et al., 2020).

Barrier composition determines whether the junction is truly SIS, $_2$4–$_2$5–$_2$6, or merely SIS-like. Cr$_2$7Ge$_2$8Te$_2$9 is insulating and ferromagnetic, so NbSe$_3$0/Cr$_3$1Ge$_3$2Te$_3$3/NbSe$_3$4 is a vertical $_3$5–$_3$6–$_3$7 tunnel junction with exponential thickness dependence and underdamped Josephson dynamics. By contrast, multilayer graphene in vertical Nb/graphene/Nb behaves as a semi-metallic weak link: the devices show nonzero subgap conductance, multiple Andreev reflection structures, and $_3$8, which is identified as typical of short SNS-type weak links with moderate transparency rather than a low-transparency tunnel barrier (Idzuchi et al., 2020, Kim et al., 5 Feb 2026).

In high-$_3$9 GBCO/BaTiO$_{7-\delta}$0/GBCO junctions, BaTiO$_{7-\delta}$1 functions as an ultrathin insulating barrier only over a narrow thickness window. Josephson coupling is observed for 1 nm and 2 nm BTO barriers, with Josephson coupling temperatures $_{7-\delta}$2 K and $_{7-\delta}$3 K, respectively, whereas 3 nm barriers show no long-range Josephson coupling. The same data are used to emphasize a trade-off: the critical barrier thickness for ferroelectric effects is usually higher than 2 nm, so the thickness range that supports c-axis Josephson tunneling is also the range in which ferroelectricity is strongly suppressed (Navarro et al., 2020).

Twisted Bi-2212 shows that the “insulator” in a vertical SIS junction may be structurally simple yet electronically anisotropic. The Josephson coupling is maximal at $_{7-\delta}$4 and $_{7-\delta}$5, rapidly decreases toward $_{7-\delta}$6, and disappears at $_{7-\delta}$7. The paper attributes this quantitatively to the $_{7-\delta}$8-wave order parameter, the tight-binding Fermi surface of Bi-2212, and finite tunneling incoherence described by a Gaussian tunneling matrix element with best-fit $_{7-\delta}$9 (Lee et al., 2021).

3. Fabrication strategies and interface control

The fabrication problem in vertical SIS research is not only barrier definition but preservation of the relevant interfaces. In freestanding membrane Nb/graphene/Nb devices, the process begins with a Si wafer carrying $_3$0 nm SiN$_3$1 on both sides; a KOH backside etch creates a freestanding SiN$_3$2 membrane, top-side circular apertures of diameter 1–3 $_3$3m are opened by e-beam lithography and CF$_3$4/Ar RIE, multilayer graphene is suspended across these apertures, and Nb/Au is sputtered from the bottom side and then from the top side. The architectural advantage is explicit: no buried Nb surface is ever exposed to ambient, because the vdW layer acts as an intrinsic capping layer during double-sided processing (Kim et al., 5 Feb 2026).

Van der Waals tunnel junctions use different interface-preservation strategies. NbSe$_3$5 and Cr$_3$6Ge$_3$7Te$_3$8 are exfoliated in an inert Ar glovebox and stacked by polymer-based dry transfer with maximum processing temperatures of 60–80 °C; the crystallographic alignment is within roughly 2–5 degrees. Twisted Bi-2212 employs a microcleave-and-stack process performed entirely in an Ar-filled glovebox, so the two surfaces that meet were never exposed to polymers or air; the assembled stack is then annealed at 350 °C in O$_3$9 to clean the surface and form low-resistance Ag/Au contacts (Idzuchi et al., 2020, Lee et al., 2021).

NbS$_2$0/NbS$_2$1 vdW Josephson junctions illustrate a third approach. Exfoliation and stacking are performed in a nitrogen-filled glove box with O$_2$2 and H$_2$3O below 1 ppm, PDMS substrates are cleaned with isopropanol, SiO$_2$4/Si wafers with pre-patterned Ti/Au contacts are cleaned by acetone, IPA, deionized water, and O$_2$5 plasma, and the sequential all-dry transfer is carried out at room temperature to minimize degradation of NbS$_2$6 (Zhao et al., 2022).

A recurrent materials issue is contamination at the active interface. In the Nb/graphene/Nb membrane platform, cross-sectional HAADF-STEM and EDS on a nonfunctional device reveal an 8-layer graphene spacer, a $_2$7 nm carbon-rich region above the graphene at the top interface, and a $_2$8 nm C–O–Nb interfacial layer where oxygen and Nb overlap; the bottom interface is clean. The interpretation given is that top-side e-beam lithography leaves polymer residues that trap oxygen and suppress Josephson coupling. The authors therefore suggest stencil-mask or resist-transfer methods to avoid direct resist contact on the active barrier region (Kim et al., 5 Feb 2026).

4. Josephson electrodynamics and experimental diagnostics

Electrical characterization of vertical SIS junctions relies on a compact set of observables: $_2$9, $_3$0–$_3$1, $_3$2, $_3$3, and, when available, subgap spectroscopy. In GBCO/BTO/GBCO, the 1 nm and 2 nm barriers show a zero-voltage branch up to a critical current, switching to a finite-voltage branch with hysteresis, characteristic of underdamped SIS junctions. The characteristic voltages at 12 K are $_3$4 mV for 1 nm BTO and $_3$5 mV for 2 nm BTO, and the temperature dependence of $_3$6 is analyzed with the Ambegaokar–Baratoff expression

$_3$7

Their $_3$8 data show a Fraunhofer-like pattern with minima spaced by $_3$9 Oe, corresponding to an effective total thickness $S$00 nm, but the minima do not go to zero because of structural inhomogeneities in the barrier (Navarro et al., 2020).

The Nb/multilayer graphene/Nb devices emphasize how the same diagnostics separate SIS from short $S$01–$S$02–$S$03 behavior. For a representative device at 2 K, $S$04A, $S$05, and $S$06 mV. Using $S$07 meV, the ratio $S$08, and fitting $S$09 with the short-junction KO-1 and KO-2 limits, the paper concludes that the junction lies in the short-junction regime with moderate transparency. The Stewart–McCumber parameter estimated from $S$10 fF is $S$11, consistent with overdamped, non-hysteretic transport. Its magnetic interference is set by the circular aperture and follows the Bessel-form envelope

$S$12

with $S$13 mT and an extracted effective magnetic thickness $S$14 nm (Kim et al., 5 Feb 2026).

NbS$S$15/NbS$S$16 junctions sit closer to SIS phenomenology. The superconducting transition temperature is $S$17 K, the critical current density reaches $S$18 A/cm$S$19 at 2 K, and the 2 K $S$20–$S$21 curve is strongly hysteretic, with $S$22 mA, $S$23 mA, and $S$24. The junction is analyzed with the Stewart–McCumber parameter

$S$25

yielding $S$26, and the temperature dependence of $S$27 is fit by Ambegaokar–Baratoff theory with $S$28 meV. A Fraunhofer-like modulation under in-plane magnetic field gives $S$29 mT and, through

$S$30

an estimated London penetration depth $S$31 nm (Zhao et al., 2022).

In twisted Bi-2212, SIS behavior is established by a zero-voltage supercurrent branch, suppressed subgap current, and Shapiro steps at $S$32 under $S$33 GHz microwave irradiation. The characteristic voltage of 0° devices, $S$34 mV, matches typical intrinsic Josephson values in bulk Bi-2212, showing that an artificial vdW SIS junction can reproduce intrinsic c-axis Josephson coupling when the twist angle is favorable (Lee et al., 2021).

5. Magnetic, phase-biased, and topological extensions

Once the barrier is allowed to carry internal magnetic or topological structure, a vertical SIS junction is no longer constrained to a conventional 0-junction. In NbSe$S$35/Cr$S$36Ge$S$37Te$S$38/NbSe$S$39, the ferromagnetic insulating barrier produces a generalized phase-shifted Josephson relation and a doubly degenerate non-trivial junction phase. Using a SQUID built from one magnetic-insulator junction and one reference NbSe$S$40/NbSe$S$41 junction, the extracted phases are

$S$42

which are neither $S$43 nor $S$44. The interpretation is that magnetic domains and domain walls in Cr$S$45Ge$S$46Te$S$47 create parallel 0-like and $S$48-like junction segments, whose spatial average produces a $S$49-junction energy landscape with two nontrivial minima (Idzuchi et al., 2020).

Related vdW ferromagnetic Josephson junctions with NbSe$S$50/Cr$S$51Ge$S$52Te$S$53/NbSe$S$54 show hysteretic and oscillatory $S$55 driven by the remanent magnetic moment of the barrier, and some thicker devices display a central minimum of critical current, interpreted as evidence for coexistence of 0 and $S$56 phase coupling in the junction region. The paper describes these as vertical $S$57–$S$58–$S$59 junctions whose magnetic barrier acts simultaneously as an insulator and a phase-control element (Ai et al., 2021).

Theoretical work on high-$S$60 superconductor/ferromagnetic-insulator/high-$S$61 superconductor c-axis stacks pushes the phase engineering further. For HTSC/LBCO/HTSC, the Josephson current is obtained from Andreev bound states and reduces in the high-barrier limit to $S$62, but the sign of $S$63 alternates as the ferromagnetic-insulator thickness $S$64 is increased by a single atomic layer. The origin is a spin-dependent phase shift in the ferromagnetic insulator, yielding an atomic-scale 0–$S$65 transition (Kawabata et al., 2011).

A still more elaborate topological generalization appears in the theoretical SC/QAHI/NI/QAHI/SC vertical Josephson junction. Here the stack is a genuine vertical SIS geometry whose “insulator” is a QAHI–NI–QAHI sandwich. The two QAHI layers carry opposite Chern numbers and are proximitized by $S$66-wave superconductors with phases $S$67 and $S$68. The phase difference $S$69 tunes the positions of Majorana corner states around the boundary of a circular or elliptic junction, and a protocol using three circular vertical junctions is proposed for braiding these corner states by time-dependent phase bias (Miao et al., 4 Sep 2025).

6. Integration, limitations, and design lessons

Vertical SIS junction research is increasingly driven by integration constraints as much as by equilibrium Josephson physics. The freestanding membrane Nb/graphene/Nb platform is presented as a scalable route to vertical superconducting electronics based on oxidation-sensitive elemental superconductors and van der Waals materials: the active region is aperture-defined rather than overlap-defined, top and bottom metals can be patterned independently, and the architecture is described as naturally suited for multi-layer superconducting circuitry, including vertical interconnects, 3D qubit architectures, SQUIDs, and Josephson arrays (Kim et al., 5 Feb 2026).

High-$S$70 vertical SIS trilayers emphasize a different systems-level advantage. In GBCO/BTO/GBCO, the $S$71 values of $S$72 mV and $S$73 mV at 12 K are presented as promising for Josephson junctions using high-$S$74 electrodes with energy gaps much higher than those usually present in conventional low-temperature superconductors. At the same time, the data make clear that this performance exists only within a narrow barrier-thickness window and is vulnerable to strain-induced suppression of the bottom-electrode $S$75 and to structural inhomogeneity in ultrathin perovskite barriers (Navarro et al., 2020).

Twisted Bi-2212 vertical SIS junctions show that interface cleanliness and crystallographic control can turn a mechanically assembled vdW interface into a Josephson element with intrinsic-junction-like strength. The maximum coupling at $S$76 and $S$77, the disappearance at $S$78, and the best-fit finite incoherence parameter $S$79 together imply that future vertical SIS design in anisotropic superconductors must include the full momentum structure of the order parameter rather than an isotropic tunneling model (Lee et al., 2021).

Several recurrent limitations also emerge across the literature. One common misconception is that any vertical $S$80–barrier–$S$81 stack is automatically SIS; the Nb/graphene/Nb work explicitly distinguishes short SNS-type weak-link behavior from tunnel-junction behavior and treats the architectural advance, not the barrier transparency, as the main result (Kim et al., 5 Feb 2026). Another is that an insulating barrier must be magnetically inert; Cr$S$82Ge$S$83Te$S$84 shows that a ferromagnetic insulator can imprint $S$85-segments, $S$86-junction phases, and bistable ground states directly into a vertical tunnel junction (Idzuchi et al., 2020). A further practical lesson is that atomically thin barriers do not eliminate fabrication disorder: BTO thickness fluctuations, graphene top-interface contamination, and vdW interface nonuniformity all leave direct fingerprints in $S$87, $S$88, and switching behavior (Navarro et al., 2020, Kim et al., 5 Feb 2026, Zhao et al., 2022).

Taken together, these studies define the modern vertical SIS junction as a family rather than a single device template. The common core is out-of-plane Josephson coupling across a nanometric barrier; the active variables are now barrier composition, magnetic texture, crystalline twist, proximity-engineered gap profile, and phase bias. This suggests that the distinction between “junction physics” and “materials platform” has become increasingly artificial: in vertical SIS research, the barrier is simultaneously the tunneling element, the symmetry filter, the magnetic phase shifter, and, in topological proposals, the host of non-Abelian boundary states (Idzuchi et al., 2020, Miao et al., 4 Sep 2025).