Quantum Gate-Based Echo State Networks

• Quantum gate-based echo state networks are reservoir computing models that encode classical temporal data into quantum circuits with fixed random architectures and readout-only training.
• They implement fading memory through engineered noise mechanisms such as amplitude damping and mid-circuit resets, ensuring effective echo-state behavior.
• Architectural designs balance measurement strategies, entangled multi-qubit states, and classical regression to enhance memory capacity and benchmark performance.

Searching arXiv for recent and foundational papers on quantum gate-based echo state networks and closely related quantum reservoir computing. Quantum gate-based echo state networks are reservoir-computing architectures that implement the core ideas of classical echo-state networks with digital, gate-based quantum circuits. In this family of models, the reservoir is fixed rather than trained, classical time-series inputs are encoded into quantum operations, and learning is delegated to a classical readout layer trained on measurement-derived features. Across recent formulations, the reservoir state is represented either as a multi-qubit state evolving under repeated gate blocks or as a density matrix updated by an input-dependent quantum channel; fading memory is produced by mechanisms such as mid-circuit measurement and reset, stochastic reset maps, or non-unital dissipation; and practical demonstrations have focused on temporal benchmarks including NARMA tasks, Mackey–Glass prediction, and chaotic-system reconstruction on superconducting hardware (Connerty et al., 2024, Monzani et al., 2024).

1. Classical ESN concepts and their quantum translation

A classical echo-state network consists of an input layer, a large fixed reservoir with random weights and nonlinear activations, and a trained readout layer. Its state update is commonly written as

$$\mathbf{r}_t = f\big(W_\text{res}\,\mathbf{r}_{t-1} + W_\text{in}\,x_t\big),$$

with fading memory ensured by the echo-state property. Gate-based quantum ESNs preserve this training philosophy: the reservoir remains fixed and random, while only the classical output layer is trained (Connerty et al., 2024).

In the gate-based quantum setting, the reservoir is replaced by a quantum circuit acting as a dynamical reservoir. One line of work encodes the hidden state in a multi-qubit quantum state and uses randomly initialized rotation angles and entangling parameters as the analogue of classical random reservoir weights. Another formulates the reservoir directly on density matrices,

$\begin{cases} \rho_{t+1} = \mathcal T(\rho_t, u_{t+1})\[4pt] y_{t+1} = h(\rho_{t+1}), \end{cases}$

so that the quantum ESN is an input–output causal filter in close analogy with the classical ESN formalism (Monzani et al., 2024).

Representative gate-based realizations fall into a small number of recurring patterns.

Model family	Core update mechanism	Distinctive control parameter
Stochastic unitary-plus-reset qESN	Apply $U_0$, $U_1$, or reset to $|0\rangle^{\otimes N}$ with input-dependent probabilities	Memory reset rate $\epsilon$ (Molteni et al., 2022)
Memory/readout-register QESN	Keep memory qubits unmeasured, measure and reset readout qubits each time step	Context window $c$, re-uploading blocks $r$, sparsity $\kappa$ (Connerty et al., 2024)
Fully measured noisy gate-based ESN	Apply input-dependent unitaries, noise channel, and mid-circuit measurements	Dissipation rate $\gamma$ and number of measured qubits $\begin{cases} \rho_{t+1} = \mathcal T(\rho_t, u_{t+1})\[4pt] y_{t+1} = h(\rho_{t+1}), \end{cases}$0 (Monzani et al., 2024)
Controllable-damping QESN	Add ancilla-assisted controlled rotations after measurement to induce non-unital damping	Damping angle $\begin{cases} \rho_{t+1} = \mathcal T(\rho_t, u_{t+1})\[4pt] y_{t+1} = h(\rho_{t+1}), \end{cases}$1 (Ricci et al., 20 Aug 2025)

This taxonomy shows that “quantum gate-based echo state network” names a design class rather than a single circuit. The invariant features are fixed reservoir dynamics, temporal processing through repeated quantum evolution, and readout-only training.

2. Architectural realizations and circuit primitives

A prominent architecture divides an even number $\begin{cases} \rho_{t+1} = \mathcal T(\rho_t, u_{t+1})\[4pt] y_{t+1} = h(\rho_{t+1}), \end{cases}$2 of qubits into a memory register of $\begin{cases} \rho_{t+1} = \mathcal T(\rho_t, u_{t+1})\[4pt] y_{t+1} = h(\rho_{t+1}), \end{cases}$3 qubits and a readout register of $\begin{cases} \rho_{t+1} = \mathcal T(\rho_t, u_{t+1})\[4pt] y_{t+1} = h(\rho_{t+1}), \end{cases}$4 qubits. The memory qubits are never measured mid-circuit and accumulate information over time, whereas the readout qubits are measured at every time step and then reset to $\begin{cases} \rho_{t+1} = \mathcal T(\rho_t, u_{t+1})\[4pt] y_{t+1} = h(\rho_{t+1}), \end{cases}$5. Inputs are not necessarily supplied as a single sample $\begin{cases} \rho_{t+1} = \mathcal T(\rho_t, u_{t+1})\[4pt] y_{t+1} = h(\rho_{t+1}), \end{cases}$6; one formulation uses a sliding context window

$\begin{cases} \rho_{t+1} = \mathcal T(\rho_t, u_{t+1})\[4pt] y_{t+1} = h(\rho_{t+1}), \end{cases}$7

mapped by a fully connected classical layer with

$\begin{cases} \rho_{t+1} = \mathcal T(\rho_t, u_{t+1})\[4pt] y_{t+1} = h(\rho_{t+1}), \end{cases}$8

into three Euler angles $\begin{cases} \rho_{t+1} = \mathcal T(\rho_t, u_{t+1})\[4pt] y_{t+1} = h(\rho_{t+1}), \end{cases}$9 for each qubit. The resulting data embedding compresses arbitrary $U_0$0-dimensional inputs into three angles per qubit and is repeated through a re-uploading scheme in which the same circuit block is applied $U_0$1 times with new data-dependent angles (Connerty et al., 2024).

The gate set used in that design is standard for digital quantum hardware. Single-qubit operations are

$U_0$2

and two-qubit operations include CNOT, CRY, CRX, and CRZ. Within each block, paired readout-memory qubits receive repeated data-dependent rotations interleaved with CNOT, CRY, and CRX, while memory-only pairs receive CRZ operations. A closely related hardware-oriented observer implementation uses a $U_0$3 angle embedding,

$U_0$4

motivated by the use of virtual $U_0$5 gates on IBM hardware, and organizes the reservoir into repeated nonlinear embedding layers controlled by a re-uploading count $U_0$6 and sparsity parameter $U_0$7 (Connerty et al., 11 May 2025).

Other gate-based constructions are more explicitly channel-theoretic. One seven-qubit model starts from the current density matrix $U_0$8, applies an input-dependent unitary $U_0$9, then a noise channel $U_1$0, then performs mid-circuit measurements on $U_1$1 qubits; the noisy pre-measurement state is

$U_1$2

and the post-measurement state becomes $U_1$3 (Monzani et al., 2024). An earlier IBM-oriented implementation instead uses a stochastic CPTP map

$U_1$4

where $U_1$5 and $U_1$6 are fixed gate circuits and $U_1$7 is the reset state $U_1$8 (Molteni et al., 2022).

These architectures differ in how they retain and erase information, but they are unified by a common pattern: random or fixed quantum evolution generates a high-dimensional temporal embedding, and classical regression is performed only after measurement.

3. Fading memory, echo-state behavior, and the role of dissipation

In quantum gate-based ESNs, fading memory is not inherited automatically from unitary evolution. One design introduces it through selective measurement of part of the system and deterministic reset of those qubits at every time step; the unitary dynamics are linear, but nonlinearity and fading memory arise from repeated measurement and reset. The memory qubits act as long-term memory, while readout qubits are refreshed each step, allowing continuous evolution of the quantum state without global reset (Connerty et al., 2024).

A more formal account is given in the channel-based literature. If the effective quantum channel $U_1$9 is strictly contractive in trace norm,

$|0\rangle^{\otimes N}$0

then the reservoir has the echo state property and fading memory. Within this framework, non-unital noise is pivotal. A unital channel satisfies $|0\rangle^{\otimes N}$1, whereas a non-unital channel does not. Repeated mid-circuit measurements tend to drive the state toward the maximally mixed state; a unital noise channel preserves that state and therefore makes the reservoir unresponsive, while non-unital amplitude damping moves the fixed point away from identity and maintains input separability (Monzani et al., 2024).

For amplitude damping, the single-qubit Kraus operators are

$|0\rangle^{\otimes N}$2

and the channel drives $|0\rangle^{\otimes N}$3 toward $|0\rangle^{\otimes N}$4. In a seven-qubit gate-based ESN, amplitude damping drastically improves the short-term memory capacity and expressivity of the network, with a best operating regime around $|0\rangle^{\otimes N}$5. In the same study, phase damping and depolarizing noise provide fading memory but deteriorate memory capacity and NARMA accuracy as $|0\rangle^{\otimes N}$6 increases (Monzani et al., 2024).

A distinct but related control knob is the explicit reset probability $|0\rangle^{\otimes N}$7. In the stochastic-unitary model, $|0\rangle^{\otimes N}$8 resets the reservoir at every step and eliminates temporal memory, while $|0\rangle^{\otimes N}$9 removes forgetting entirely. Intermediate values create fading memory, and the memory capacity is maximal for central values of the reset rate; for a five-qubit reservoir, $\epsilon$0 is almost constant and maximal for $\epsilon$1, and at $\epsilon$2 the measured capacities are $\epsilon$3 for three qubits, $\epsilon$4 for five qubits, and $\epsilon$5 for seven qubits (Molteni et al., 2022).

Theoretical work has also widened the underlying ESP vocabulary. Beyond the traditional ESP, quantum reservoir computing has been analyzed through non-stationary ESP and subspace/subset ESP, which are designed for non-stationary systems and for systems whose subsystems have ESP. This is directly relevant to gate-based QESNs because some architectures rely on only part of the register—such as a damped subsystem or a measured register—to provide effective fading memory (Kobayashi et al., 2024).

A common misconception is that noise is uniformly detrimental. The current literature instead distinguishes sharply between noise types: amplitude damping and reset-like processes can be functional components of the reservoir, whereas unital channels such as depolarizing and phase damping tend to erase useful structure (Monzani et al., 2024).

4. Readout features, observables, and training protocols

The defining training property of the gate-based QESN family is that the quantum reservoir is fixed. In the memory/readout-register architecture, the circuit with random $\epsilon$6, $\epsilon$7, and entanglement weights is never trained; training is performed only in a classical readout via elastic net regularization after a washout length $\epsilon$8 (Connerty et al., 2024). In the stochastic-unitary implementation, the design matrix is built from measured $\epsilon$9 values and the readout is trained by the Moore–Penrose pseudoinverse (Molteni et al., 2022).

Feature extraction is itself a major design choice. One route uses expectation values of Pauli-$c$0 on the measured qubits,

$c$1

estimated from shots. Another uses the full probability distribution over the measured register. If the readout register has $c$2 qubits, the probability-distribution feature vector has dimension $c$3, whereas expectation values provide only $c$4 features. In the Lorenz experiments of the gate-based QESN literature, the full probability distribution leads to significantly better prediction performance than expectation values (Connerty et al., 2024).

The measured observables need not be restricted to single-qubit marginals. In the controllable-damping formulation, the readout vector can include $c$5, $c$6, and higher-order $c$7-correlators, all inferred from the same computational-basis measurements because the observables commute. That study shows that multi-qubit correlators unlock quantum degrees of freedom that are invisible to single-site marginals, and that including two-qubit observables boosts memory capacity for two-qubit encoding, while three-qubit observables further enhance memory capacity for three-qubit encoding (Ricci et al., 20 Aug 2025).

Hardware-oriented practice has introduced additional empirical design rules. In the IBM Marrakesh observer implementation, step, ramp, and sinusoid responses were used to tune sparsity and re-uploading; lower condition numbers of the feature matrix were associated with richer, less redundant features, and moderate sparsity improved those condition numbers relative to full connectivity. In that study, $c$8 sparsity removed effective memory, while odd re-uploading counts, especially $c$9, increased nonlinearity and feature richness (Connerty et al., 11 May 2025).

Across implementations, therefore, training remains classically simple but feature engineering is not. The effective computational capacity of the reservoir depends strongly on which qubits are measured, whether one reads out expectation values or full distributions, and whether correlated observables are retained.

5. Benchmarks, performance, and hardware demonstrations

Chaotic-system prediction has become a principal benchmark for gate-based QESNs. In one simulation study on the Lorenz system with parameters

$r$0

the dataset contains 9900 points, divided into 6900 training and 3000 test samples, with only $r$1 fed into the QESN and $r$2 and $r$3 predicted from the resulting reservoir features. For qubit counts from 4 to 16, probability-distribution features yield much lower RMSE than expectation-value features. At 16 qubits, noiseless distribution features achieve Training RMSE $r$4 and Test RMSE $r$5; under the IBM Fez noise model, the same feature choice gives Training RMSE $r$6 and Test RMSE $r$7. Under a comparison in which a classical ESN has reservoir size equal to the number of readout qubits, the QESN consistently achieves lower test loss than the classical ESN (Connerty et al., 2024).

A subsequent NISQ hardware realization cast the same general architecture as a quantum observer for the Lorenz system. On ibm_marrakesh, the implementation used 12 qubits, divided into 6 memory and 6 readout qubits, with approximately 27 gates per time step after transpilation and overall depth $r$8 gates. Each time step used 60,000 shots, and the circuit ran continuously for 2000 time steps without reinitialization of the full register. The reported train RMSE was $r$9 and test RMSE $\kappa$0, and the circuit operated more than 100 times longer than the median $\kappa$1 and $\kappa$2 of the device, whose medians were $\kappa$3 and $\kappa$4 (Connerty et al., 11 May 2025).

Reservoir-computing benchmarks beyond chaos have concentrated on memory and nonlinear autoregressive tasks. In the non-unital-noise study, a seven-qubit gate-based ESN was evaluated on NARMA-$\kappa$5 with $\kappa$6. Amplitude damping improved both short-term memory capacity and NARMA performance relative to the noiseless case, with exact optima $\kappa$7 for NARMA2, $\kappa$8 for NARMA5, and $\kappa$9 for NARMA8 in one experiment. Under realistic IBM-like noise, NARMA2 and NARMA5 could still be learned reasonably well on IBM-Brisbane with reduced sequence length $\gamma$0, while NARMA8 deteriorated (Monzani et al., 2024).

The reset-rate study benchmarked three nonlinear maps with fading memory on simulator and IBM hardware. For a five-qubit reservoir on simulator, Tasks I and II achieved lowest error at $\gamma$1, while Task III achieved lowest error at $\gamma$2. On ibmq_casablanca with $\gamma$3, the reported MSEs were $\gamma$4 for Task I, $\gamma$5 for Task II, and $\gamma$6 for Task III, compared with $\gamma$7, $\gamma$8, and $\gamma$9 in the earlier $\begin{cases} \rho_{t+1} = \mathcal T(\rho_t, u_{t+1})\[4pt] y_{t+1} = h(\rho_{t+1}), \end{cases}$00 implementation used for comparison (Molteni et al., 2022).

The controllable-damping line extended the benchmark suite to Mackey–Glass forecasting and NARMA on a different gate-based architecture. There, the damping parameter $\begin{cases} \rho_{t+1} = \mathcal T(\rho_t, u_{t+1})\[4pt] y_{t+1} = h(\rho_{t+1}), \end{cases}$01 induced a trade-off between memory and stability, with an optimal region around $\begin{cases} \rho_{t+1} = \mathcal T(\rho_t, u_{t+1})\[4pt] y_{t+1} = h(\rho_{t+1}), \end{cases}$02 for a seven-qubit reservoir, and the resulting QESN achieved credible performance up to NARMA-5 on IBM Heron (TORINO) while also producing reasonable one-step-ahead prediction on Mackey–Glass data (Ricci et al., 20 Aug 2025).

These results establish empirical feasibility rather than settled superiority. The literature reports lower loss than matched classical ESN baselines in some settings and successful long-horizon execution on superconducting hardware, but it also repeatedly notes that noise, shot cost, and scaling remain limiting factors.

6. Theoretical status, limitations, and developing directions

The theoretical footing of gate-based QESNs is uneven but improving. Some architectures explicitly state that they do not provide a formal theorem of echo-state property and instead define fading memory operationally through measurement and reset. By contrast, work based on strictly contractive non-unital channels proves that families of gate-based quantum echo state networks subject to non-unital and strictly contractive channels form a universal approximator for fading-memory functionals, with conditions involving compact input space, fading memory and echo-state property from contractivity, input separability, and polynomial algebra structure via spatial multiplexing (Connerty et al., 2024, Monzani et al., 2024).

A second active direction is controlled dissipation. Hardware amplitude damping is beneficial in some gate-based ESNs but is not easily tunable. To address that, one proposal introduces digital, controllable damping through ancilla qubits and controlled $\begin{cases} \rho_{t+1} = \mathcal T(\rho_t, u_{t+1})\[4pt] y_{t+1} = h(\rho_{t+1}), \end{cases}$03 rotations, producing circuit-level amplitude amplification of the zero state and keeping the reservoir away from the maximally mixed state. Because the induced damping is implemented by gates rather than intrinsic hardware noise, the scheme is intended to be compatible not only with NISQ hardware but also with fault-tolerant architectures (Ricci et al., 20 Aug 2025).

Several limitations recur across the literature. Sampling cost is high: 60,000 shots per time step were used for probability-distribution features in Lorenz experiments. Realistic noise degrades performance relative to noiseless simulation. Hardware constraints force compromises in circuit depth, qubit count, sequence length, and number of jobs. Theoretical feature-space scaling is exponential in the number of measured qubits when full distributions are used, but practical scalability remains limited by noise and hardware capacity. The current evidence does not establish a definitive quantum advantage over classical reservoir computing (Connerty et al., 2024, Connerty et al., 11 May 2025, Molteni et al., 2022).

Current open directions are explicit rather than speculative. They include noise engineering for non-unital, contractive dynamics; error mitigation aimed specifically at unital noise components; scaling studies for larger reservoirs; extension to more diverse temporal tasks, including chaotic systems and control; and hybrid classical–quantum designs. This suggests that the central research question has shifted from whether gate-based QESNs can be formulated to how their memory, nonlinearity, and dissipation can be co-designed for useful temporal computation on realistic hardware (Monzani et al., 2024).

Quantum gate-based echo state networks therefore occupy a distinctive position within quantum machine learning. They inherit the readout-only training simplicity of classical reservoir computing, but they realize the reservoir as a quantum dynamical system whose useful operation depends on a nontrivial balance between entanglement, measurement, reset, and dissipation. The field now contains concrete digital-circuit blueprints, hardware demonstrations, and partial universality results, yet it also remains defined by unresolved questions about resource efficiency, formal ESP criteria for specific architectures, and comparative advantage at scale (Connerty et al., 11 May 2025, Kobayashi et al., 2024).