One-Step Majority-Logic Decoder
- One-step majority-logic decoding is a symbol-wise hard-decision method that recovers each coordinate directly through a majority vote over carefully structured parity checks.
- It leverages combinatorial designs and geometric constructions, such as Grassmann and Schubert codes, to ensure controlled overlap and robust error correction up to ⌊J/2⌋ errors.
- The approach decouples error-correction performance from decoder complexity by selecting incidence structures that guarantee orthogonality without iterative message passing.
Searching arXiv for recent and foundational papers on one-step majority-logic decoding. One-step majority-logic decoding is a symbol-wise hard-decision decoding paradigm for linear codes in which each coordinate is recovered from a single majority vote over a preconstructed family of parity checks containing that coordinate. In the classical formulation, the decisive structural requirement is the existence, for every coordinate, of a sufficiently large family of parity checks that are orthogonal on that coordinate: every chosen check contains the target symbol, while every other coordinate appears in at most one of those checks. Under this condition, the decoder decides each symbol directly in one stage, without iterative message passing or multi-level recursion. Across the coding-theoretic literature, this framework appears in combinatorial-design codes, finite-geometry and Grassmannian codes, Schubert codes, and more recently in binary locally recoverable codes, while related but distinct iterative generalizations also appear for LDPC and nonbinary LDPC decoding (Cruz et al., 2019, Beelen et al., 2020, Singh, 2020, Ly et al., 13 Jan 2026).
1. Classical definition and decoding principle
For a linear code with dual , a parity-check equation is a dual codeword , giving
If a received word is , then each parity check containing coordinate can be solved for , producing one estimate of the -th symbol. One-step majority-logic decoding uses many such estimates and decides by majority vote (Cruz et al., 2019).
In the orthogonal-parity-check formulation used by Massey and adopted explicitly for Schubert codes, a set of parity checks is orthogonal on coordinate 0 if the 1 matrix whose rows are those checks has every entry in column 2 equal to 3, while every other column has Hamming weight at most 4. Equivalently, every chosen check contains the target coordinate, and any other coordinate appears in at most one of them. Under this condition, the corresponding majority-logic decoder corrects up to
5
errors (Singh, 2020).
This structure is the canonical meaning of “one-step majority logic” in the coding literature. The term emphasizes that each symbol is decided from a single majority vote over local parity relations, in contrast with multi-step majority decoding for Reed–Muller-type families or iterative majority/bit-flipping procedures for LDPC codes. A plausible implication is that the core object is not a specific code family but a reusable local decision mechanism defined by orthogonality, controlled overlap, and direct coordinatewise estimation.
2. Design-theoretic formulation and historical development
A major classical route to one-step majority-logic decodability uses combinatorial designs. In the design-based setting described in "Majority-logic Decoding with Subspace Designs" (Cruz et al., 2019), one starts from a design 6, forms its block-point incidence matrix 7, and uses the rows of 8 as parity checks over 9. If 0 is a 1 incidence matrix of rank 2, then
3
For one-step majority decoding, the relevant design parameters are the replication number 4, the number of blocks through a point, and the pair parameter 5, the number of blocks through a pair of points (Cruz et al., 2019).
The paper attributes the original one-step design-based decoder to Rudolph (1967). For a 6-7 design, the quoted classical result is that one-step majority-logic decoding corrects
8
errors (Cruz et al., 2019). The decoder uses, for each coordinate, the 9 parity checks containing that coordinate, plus one additional equation. The complexity is dominated by 0, so decreasing the number of checks through each coordinate directly reduces implementation cost.
The same paper situates one-step decoding within a broader hierarchy. Reed’s original majority-logic decoder is a multi-step procedure; Peterson and Weldon later developed a two-step majority-logic decoder correcting the same number of errors as Reed’s multi-step decoder for the relevant geometric-code setting (Cruz et al., 2019). This distinction is fundamental: one-step decoding acts directly on symbols, whereas two-step or multi-step procedures first estimate larger geometric aggregates and only then individual coordinates.
Subspace designs provide a 1-analog refinement of the classical design route. A 2-3 subspace design on a 4-dimensional vector space 5 over 6 is a collection 7 of 8-dimensional subspaces such that every 9-dimensional subspace lies in exactly 0 blocks. The induced combinatorial designs then yield parity-check matrices suitable for one-step majority logic (Cruz et al., 2019). The key conclusion there is that the error-correction capability is essentially the same as for the corresponding geometric-design codes, but the decoder complexity can be drastically improved because one can use subspace designs with much smaller 1, hence many fewer parity checks through each symbol. This suggests that one-step majority-logic performance and one-step majority-logic complexity can be decoupled to some extent through incidence-structure choice.
3. Orthogonality, overlap control, and error-correction guarantees
The decisive combinatorial fact behind one-step majority logic is that each channel error can corrupt only a controlled number of the parity checks used for a given target coordinate. In a 2-design, if a fixed point lies in 3 blocks and every other point co-occurs with it in exactly 4 blocks, then an error at any other coordinate contaminates at most 5 of the 6 local votes. Therefore, if the total number of errors is sufficiently small, more than half of the 7 votes remain correct, and majority vote succeeds (Cruz et al., 2019).
The ideal case is 8, which the same paper identifies as orthogonal check equations: each coordinate pair appears in exactly one check equation (Cruz et al., 2019). This is the strongest overlap control available in the design-based formulation and is operationally equivalent to the Massey orthogonality condition used in later geometric-code work (Singh, 2020).
In more geometric formulations, orthogonality is realized through supports of low-weight dual codewords that intersect pairwise only in the target coordinate. For Schubert codes 9, the supports of minimum-weight codewords of the dual Schubert code lie on lines in the corresponding Schubert variety, and any three points on such a line support a minimum-weight parity check (Singh, 2020). By choosing disjoint pairs of points on lines through a fixed point 0, one obtains a family of weight-1 parity checks whose supports intersect only at 2. The paper states Massey’s theorem in this context and uses it to derive a one-step majority-logic decoder correcting up to 3 errors when 4 orthogonal checks are available at each coordinate (Singh, 2020).
The same principle appears in Grassmann codes, although the construction is more elaborate. "Point-line incidence on Grassmannians and majority logic decoding of Grassmann codes" proves the existence of large families of parity checks orthogonal on each coordinate and then applies the classical majority-logic theorem of Massey (Beelen et al., 2020). The paper sometimes phrases the result more cautiously as a “majority decoding algorithm,” but the decoder is coordinatewise majority logic in the classical sense because each symbol is decided from one majority vote over a preconstructed orthogonal family of checks (Beelen et al., 2020). The novelty is geometric organization rather than deviation from the one-step model.
A common misconception is that any decoder using a majority gate is automatically a one-step majority-logic decoder. The literature distinguishes sharply between genuine one-step schemes, where the symbol is decided from one majority vote over an orthogonal or otherwise controlled family of checks, and iterative or multi-step algorithms that merely reuse majority operations internally (Bertram et al., 2013, Xiong et al., 2014, Brkic et al., 2015).
4. Geometric realizations: Grassmann and Schubert codes
For Grassmann codes, the geometric substrate is the Grassmannian
5
where 6, identified with its Plücker embedding. In the 2020 paper on Grassmann codes, the central innovation is geometric: point-line incidence on the Grassmannian, together with a canonical path between a fixed point and any other point once a complete flag is chosen, is used to organize many dual minimum-weight parity checks into sets orthogonal on a chosen coordinate (Beelen et al., 2020). The result is a majority decoder built from geometric incidence rather than the more elementary cyclic-code constructions often associated with classical majority logic.
This use of a canonical path is structurally important. The paper shows that for two points of the Grassmannian there exists a canonical path once a complete flag is fixed, and these paths are then used to construct large sets of orthogonal checks (Beelen et al., 2020). This suggests that one-step majority-logic decodability can emerge from global geometric navigation rules, not only from local block-design symmetry.
For Schubert codes, the geometric mechanism is more explicit at the level of minimum-weight dual codewords. The Schubert variety
7
specializes for the decoding construction to 8, with 9, 0, and
1
The paper recalls that
2
It then proves that the support of each minimum-weight codeword of 3 lies on a line in 4, and conversely that any three points on a line determine such a dual codeword (Singh, 2020).
This makes the line the basic parity-check carrier. For every 5, the paper constructs a set 6 of weight-7 parity checks with pairwise intersection exactly 8, and further augments them by weight-9 checks in special cases to improve the number of orthogonal checks (Singh, 2020). In some special cases, the resulting majority-logic decoder can correct approximately up to 0 many errors (Singh, 2020). The qualifier “approximately” is part of the source characterization and reflects that the full correction radius depends on the constructed family size rather than an abstract equality with bounded-distance decoding for all parameters.
5. Extensions to affine Grassmann codes and locally recoverable codes
The one-step majority-logic paradigm has recently been extended from projective Grassmann settings to affine Grassmann codes over nonbinary fields. "Majority Logic Decoding of Affine Grassmann Codes Over Nonbinary Fields" constructs, for each coordinate, a large family of parity checks orthogonal on that coordinate by using sets of matrices of fixed rank together with the automorphism group of the code (González et al., 13 Jul 2025). The resulting decoder corrects up to
1
errors, where 2 is the number of orthogonal checks per coordinate, with asymptotic radius of order 3, matching the order obtained previously for Grassmann codes in 4 as cited in the paper (González et al., 13 Jul 2025).
The code family is defined by evaluating the 5-vector space 6 spanned by all minors of the generic 7 matrix
8
on the affine space of all 9 matrices over 0. The paper recalls the parameters
1
with
2
and
3
A key restriction result shows that for 4, the restricted code 5 has parameters 6, so the dual restriction is a one-dimensional single-parity-check code, yielding parity checks supported on 7 (González et al., 13 Jul 2025). This is then transported to every coordinate by automorphisms, producing a coordinatewise one-step majority-logic decoder.
A structurally different but operationally equivalent one-step realization appears for binary locally recoverable codes. In a binary 8-LRC, every coordinate 9 has 0 pairwise disjoint recovery sets 1 with 2 and
3
The corresponding decoder forms the local estimates
4
and then decides
5
This is genuinely one-step because each symbol is decided directly from its 6 local equations, with no iterative message passing and no dependence on previous symbol decisions (Ly et al., 13 Jan 2026).
The probabilistic analysis of that paper makes the one-step nature especially transparent. On the 7,
8
because decoding fails only if every recovery set contains an erasure. On the 9, a local vote is wrong iff an odd number of the 00 positions in a recovery set are flipped, so
01
with
02
Using independence from disjointness, the paper derives the bit-failure bound
03
and the block bound
04
If 05 is fixed and 06, then
07
The same work further proves that one-step majority-logic decoding can correct virtually all random error and erasure patterns of linear weight under suitable availability growth, highlighting a substantial gap between adversarial worst-case guarantees and typical stochastic performance (Ly et al., 13 Jan 2026).
6. Distinction from two-step and iterative majority decoders
The term “majority-logic decoding” is used across several decoder architectures that are not one-step in the strict classical sense. The distinction is not merely terminological; it concerns algorithmic depth, analytical framework, and hardware structure.
For binary Reed–Muller codes 08 with
09
the decoder proposed in "An Improved Majority-Logic Decoder Offering Massively Parallel Decoding for Real-Time Control in Embedded Systems" is explicitly not one-step (Bertram et al., 2013). The paper states that its algorithm “consists of two majority-logic steps.” It improves Chen’s two-step majority-logic decoder, which itself is a reduction of Reed’s original 10-step procedure. The code parameters are
11
so the bounded-distance error capability is
12
The decoder first decides whether suitable 13-flats are odd and then decides each symbol from the odd/even status of the 14-flats through that symbol (Bertram et al., 2013). Although every stage uses majority logic, the overall architecture is two-step, not one-step.
For regular binary LDPC codes, the one-iteration specialization of a majority/bit-flipping architecture is exactly a one-step majority-logic decoder in the paper "Majority Logic Decoding under Data-Dependent Logic Gate Failures" (Brkic et al., 2015). The code is a 15-regular binary LDPC code represented by a Tanner graph. The received vector 16 comes from a BSC with
17
At iteration 18, each variable sends
19
each check computes
20
and each variable performs majority logic on the 21 incoming estimates: 22 with (s\in{