Modular Horner Expansion Diagrams (M-HED)

• Modular Horner Expansion Diagrams (M-HED) are graph-based, canonical representations of integer-valued functions over Z_m that incorporate modular arithmetic for efficient datapath verification.
• They employ reduction rules like eliminating redundant nodes and merging isomorphic nodes to create compact diagrams that support swift arithmetic operations and structural matching.
• The iterative, segment-based equivalence checking approach of M-HED significantly improves memory usage and runtime performance in verifying complex, pipelined, and nested designs.

A Modular Horner Expansion Diagram (M-HED) is a canonical, compact, and graph-based representation of integer-valued functions of word-level variables over the finite ring $\mathbb{Z}_m$, where $m$ is typically $2^N$ for $N$-bit datapaths. M-HED extends the Horner Expansion Diagram (HED) by incorporating modular arithmetic, enabling equivalence reasoning for datapath designs, even in the presence of complex pipelining and nested loop behaviors. This construction plays a central role in scalable formal equivalence checking by reducing polynomial functions modulo $m$ and enforcing reduction rules to maintain a canonical form that efficiently supports arithmetic operations and structural matching.

1. Formal Definition and Structure

The M-HED represents a function $F(X_1,\ldots,X_k)$ over ordered word-level variables $Var = \{X_1 < X_2 < \cdots < X_k\}$ as a directed acyclic graph $G = (V, E)$. Each nonterminal node $v \in V$ is labeled with:

• $var(v)\in Var$ (the variable associated with the expansion),
• Two outgoing edges $e_0(v), e_1(v)\in E$ carrying weights $w_0, w_1 \in \mathbb{Z}_m$,
• $e_0$ points to the "^^^^0^^^^" child ($c = const(v)$), $e_1$ to the "^^^^1^^^^" child ($l = linear(v)$).

Two distinguished terminal nodes ("0" and "1") represent $0,1\in\mathbb{Z}_m$, often merged if $1\equiv 0\mod m$. The semantics of a node $v$ are:

$$v(X_1,\ldots,X_k) = w_0 \cdot c(X_1,\ldots,X_{i-1}) + X_i \cdot [w_1 \cdot l(X_1,\ldots,X_{i-1})] \quad (\text{arithmetic in }\mathbb{Z}_m)$$

Every M-HED is reduced to canonical form by:

• Eliminate Redundant Node: If $w_1 = 0 \mod m$, $v$ is replaced by its ^^^^0^^^^ child, and $w_0$ is multiplied into its incoming weights.
• Merge Isomorphic Nodes: Nodes $u, v$ with identical variable, child pointers (after normalization), and weights are merged.

Through bottom-up application of these rules, the reduced M-HED is unique for each polynomial in $\mathbb{Z}_m$.

2. Horner Expansion and Arithmetic in M-HEDs

Expansion in one variable $X$ follows:

$$F(X, Y, \ldots) = F(0, Y, \ldots) + X \cdot (F(1, Y, \ldots) - F(0, Y, \ldots)) = \text{const} + X \cdot \text{linear}$$

For multivariate polynomials, this expansion recurses on the highest-ordered variable. Arithmetic on HEDs is structured by variable alignment and node type, summarized as follows:

	Terminals	Terminal $\leftrightarrow$ Nonterminal	Both Nonterminals
Addition	$u+v \to$ new terminal	Add value $v$ into $u$'s $w_0$ ("const" branch)	Decompose around top variable $X$, combine
Multiplication	$u\cdot v \to$ new terminal	Multiply $u$'s $w_0, w_1$ by $v$ recursively	Decompose, cross-product four terms

Boolean bitwise ops are encoded as follows over $\mathbb{Z}_m$:

• $\lnot X \equiv 1 - X$
• $X \land Y \equiv X \cdot Y$
• $X \lor Y \equiv X + Y - X \cdot Y$

Bitwise shifts correspond to scalar multiplication or division by powers of two, modulo $m$.

3. Construction from Arithmetic or RTL Descriptions

An M-HED is constructed from single-assignment statements produced via symbolic simulation of either high-level C/SystemC or behavioral-synthesized RTL. The standard construction proceeds as follows:

1. Initialization: Set up a hash table ("nodeCache") for memoization.
2. Traversal: For each assignment $v := E(w, x, y, \ldots)$:
   • Recursively traverse $E$.
   • Map leaf variables/^^^^0^^^^s to terminals.
   • For operators (+, –, ·, $\ll$, $\gg$, $\land$, $\lor$, $\lnot$), invoke the appropriate three-way case logic, record and reduce via Rules 1–2, and cache.
   • The traversal yields an M-HED root node for each output variable.
3. Efficiency: Shared subgraphs represent common subexpressions, minimizing redundancy.
4. Edge Weights: All operations are over $\mathbb{Z}_m$; reductions through vanishing polynomials ensure weights $<2^N$.

As a result, every datapath expression, regardless of complexity, is mapped to a unique, minimized M-HED in $\mathbb{Z}_m$.

4. Segment-Based Equivalence Checking with M-HED

Equivalence checking leverages M-HED by partitioning designs into segments based on dynamic cut-points, thus maintaining resource scalability. The approach involves:

• Symbolic simulation produces flattened assignment lists for the high-level reference (LAASC) and pipelined RTL (LAPRTL).
• Each iteration extracts segments of $\leq S_{max}$ lines and maps them to M-HEDs.
• Equivalence checking between M-HEDs of the current segments proceeds via pointer equality of their root nodes—indicative of exact polynomial equivalence modulo $m$.
• Matching outputs are removed along with all purely local nodes feeding them, replaced by "trusted" primary inputs. Remaining segments are updated accordingly.
• If equivalence is blocked, "internal equivalence" is tested by making internal nodes output roots and matching again.
• Iteration continues until all outputs are matched or a non-equivalence is established.

This iterative reduction ensures that at every stage, only a midsize M-HED need be maintained. Equivalence is reduced to trivial pointer comparisons, circumventing combinatorial explosion typical in nested, pipelined loop verification.

5. Illustrative Example

Consider an unrolled loop body in C:

tmp1 = A[i] – B[i]; tmp2 = A[i] + B[i]; out[i] = tmp1 * tmp2;

Symbolic unrolling for $i=0$ yields assignments:

t1 := A0 - B0 t2 := A0 + B0 y := t1 * t2

Under $m=2^N$:

• $t_1$: $H_1(X=A0, B0) = A0 + (-1)\cdot B0 \to$ node with $var=B0$, $w_0=A0$, $w_1=-1$.
• $t_2$: $H_2(X=A0, B0) = A0 + 1\cdot B0 \to$ node with $var=B0$, $w_0=A0$, $w_1=1$.
• $y$: $H_3 = H_1 \cdot H_2$ is recursively combined and reduced, representing $y = (A0-B0)\cdot(A0+B0) = A0^2-B0^2$ modulo $2^N$.

The root nodes of M-HEDs for two equivalent segments from different descriptions (e.g., C and RTL) will be pointer-identical if and only if the functions are equivalent modulo $2^N$, including any vanishing polynomial factors.

6. Properties, Advantages, and Scalability

• M-HED extends HEDs with modular arithmetic, ensuring that expressions differing only by a multiple of $2^N$ reduce to the same canonical graph in $\mathbb{Z}_m$.
• Shared subgraphs enable compact encoding of very large expressions.
• Segment-based reduction and the iterative scheme allow verification to scale to complex, pipelined, and nested loops.
• Empirical results show an average of $16.7\times$ memory reduction and $111.9\times$ runtime improvement compared to SMT- and SAT-based equivalence checking in large synthesized designs.
• Equivalence checking is reduced to a pointer equality test, in contrast to symbolic simulation or SAT-solving, which typically scale poorly.
• This methodology accommodates the verification of behaviorally synthesized designs, avoiding the state-space blow-up that can result from direct input/output symbolic comparison.

This suggests that M-HED-based equivalence checking enables formal methods to scale in application areas that are otherwise intractable for classical combinational equivalence or bit-level model checking approaches.