Intelligent Array Designs Overview

• Intelligent array designs are architectures that integrate reconfigurability, advanced signal processing, and optimized hardware to enhance DOF, SINR, and agility.
• They employ methodologies like distributed intelligence, sparse sensor geometries, and joint optimization techniques to achieve scalable, energy-efficient performance.
• Applications span radio astronomy, wireless ISAC, radar, and hardware accelerators, with innovations such as DIAT systems and active RIS enhancing system functionality.

Intelligent array designs encompass a broad set of architectures, algorithms, and hardware strategies developed to maximize the spatial, spectral, and functional capabilities of array-based sensing and communication systems. Modern intelligent arrays leverage reconfigurability, advanced signal processing, and optimized physical configurations to enhance performance metrics such as degrees of freedom (DOF), signal-to-interference-plus-noise ratio (SINR), estimation accuracy, agility, and hardware efficiency. These designs are foundational across radio astronomy, wireless infrastructure, radar, ISAC (integrated sensing and communication), and signal-processing hardware accelerators.

1. Reconfigurable Architectures and Distributed Intelligence

Several intelligent array approaches focus on reconfigurability and distributed decision-making at the hardware level. In large sensor networks or multi-aperture systems, distributing local intelligence across array elements or subunits is critical for scalability and data reduction:

• Distributed Intelligent Array Trigger (DIAT) systems deploy lightweight hardware logic (e.g., FPGAs) at each physical node, exchanging reduced metadata (centroid vectors, timestamps) with neighbors to realize sub-microsecond global event filtering. DIAT autonomously computes geometric discriminants such as parallax width to distinguish gamma-ray-initiated events from background, dramatically lowering readout rates and improving sensitivity, as implemented in the Cherenkov Telescope Array (Dickinson et al., 2015).
• In wireless communications, dynamic array partitioning is proposed for monostatic ISAC architectures, where each array element can be rapidly reconfigurable as transmit or receive to minimize direction-of-arrival (DOA) errors under communication SINR constraints. Optimization frameworks combine alternating direction methods, majorization-minimization, and penalty relaxations to handle mixed-integer nonconvexity inherent in such partitioning (Liu et al., 2024, Liu et al., 18 Mar 2025).
• Sub-connected active RIS architectures reduce the hardware complexity of reconfigurable intelligent surfaces by grouping elements into sub-arrays, each sharing a single amplifier but retaining per-element phase control. This enables significant reductions in static/dynamic power while retaining high performance when the amplifier count is judiciously chosen and optimized jointly with beamforming (Zhu et al., 2022).

2. Advanced Sparse Array Geometries and Virtual Arrays

Sparse physical placement inspired by number theory and combinatorics is a hallmark of recent intelligent array designs seeking to push DOF beyond conventional bounds:

• Planar coprime arrays using Chinese Remainder Theorem (CRT) over quadratic fields create two sparse subarrays based on prime-ideal lattice embeddings, yielding $\mathcal O(p^2)$ virtual sensors with only $\mathcal O(p)$ physical elements. The Eisenstein-integer (hexagonal lattice) design achieves the densest possible 2D aperture with maximal DOF-per-area, enabling dense, hole-free virtual coarrays essential for subspace estimation without mutual coupling penalties (Li et al., 2018).
• Multilevel prime arrays (MLPA) generalize coprime concepts by designing multiple co-prime ULA subarrays, optimizing their lengths and spacings via exhaustive-search and number-theoretic constraints to maximize both unique and consecutive lags (DOFs). MLPA yields explicit closed-form formulas for array placements, aperture size, and DOF, leading to rapid design cycles and efficient mutual-coupling mitigation (Alawsh et al., 2021).
• Fourth-order hierarchical arrays (FOHA) exploit multiple fourth-order cumulant pathways to construct hole-free, high-DOF virtual arrays. By hierarchically adding subarrays and jointly leveraging sum-difference and difference-sum lag forms, FOHA can further suppress mutual coupling and redundancy compared to previous fourth-order coarray schemes (Wang et al., 27 Aug 2025).
• Rectangular coprime planar arrays (RCPA) use the outer product of coprime 1D index sets to generate large contiguous 2D coarrays. This construction yields significantly higher virtual DOFs and reduces the number of coarray holes compared to classical coprime and generalized coprime arrays (Goel et al., 2022).

3. Optimization-Driven Beamforming and Partitioning

Joint optimization of physical partitioning, digital/analog beamforming, and operational objectives (sensing, communications, interference suppression) lies at the core of intelligent array design:

• DOA estimation-optimized joint partitioning and beamforming frames the array design as minimizing RMSE in DOA estimation under SINR and hardware constraints. This yields nonconvex, mixed-integer programs where advanced techniques such as Dinkelbach's transform, ADMM, and MM are employed, and tractable surrogates are derived for both fractional radar objectives and SINR constraints (Liu et al., 2024).
• Bayesian Cramér-Rao bound (BCRB) based array partitioning integrates prior information about target locations and channel statistics, formulating joint transmit/receive optimization to minimize BCRB under communication and power constraints, solved by block-coordinate descent with semidefinite relaxation and penalty methods (Liu et al., 18 Mar 2025).
• Modular array design through combinatorial tiling (e.g., diamond-shaped tiles) enables rigorous partitioning of large planar/hexagonal apertures. An integer-coded genetic algorithm, grounded in surface-tiling theorems, searches solution spaces efficiently for joint tiling/topology and subarray-excitation synthesis under sidelobe and directivity constraints (Rocca et al., 2021).

4. Integration with Next-Generation Wireless and Sensing Hardware

The hardware realization of intelligent arrays spans from analog-digital hybrid beamformers to reconfigurable processing arrays:

• Hybrid analog-digital transceivers for mmWave cognitive networks factorize digital-only precoders into phase-only RF and low-rank digital blocks. Optimization targets mutual-information or Frobenius-norm objectives under power and interference constraints, solved using ADMM and projection methods. Hardware complexity and power consumption is sharply reduced with only minor spectral efficiency loss compared to full-digital solutions (Tsinos et al., 2016).
• Spatially agile, reconfigurable processor arrays ("spatial array" hardware cores) implement a 2D mesh of PEs with mode, buffer, and micro-programmable control. The architecture supports multiple wireless kernels (matmul, FIR, outer-product, etc.) and matches or surpasses HLS-specialized cores in latency and throughput for high arithmetic-intensity kernels, while offering one-chip support for heterogeneous workloads (Rasteh et al., 3 Dec 2025).
• Strassen multisystolic array architectures directly encode fast matrix multiplication algorithms into hardware, yielding a reduction in DSP multiplier count proportional to the recursion level while sustaining high utilization for small matrix blocks. This has direct impact for machine learning accelerators, supporting increased matrix-size efficiency and improved throughput per unit area (Pogue et al., 14 Feb 2025).
• Array-fed reflective intelligent surfaces (RIS) leverage a small active feed (e.g., 2×2 PEM-weighted array) in the near field of a large passive RIS with per-element phase control. Near-field coupling (captured via the principal eigenmode of the feed-RIS propagation matrix) is exploited for energy-efficient synthesis of flat-top beams with sharply controlled sidelobes, requiring only simple per-RIS-element phase settings and offering superior PA utilization compared to large active arrays (Tiwari et al., 12 Feb 2025).

5. Advanced RIS and Metasurface-Based Intelligent Arrays

Reconfigurable intelligent surfaces (RIS) and metasurfaces enable fine-grained environmental control and low-power, adaptive beamforming:

• Active (amplified) RIS with sub-connected architectures achieve near-fully-connected performance with a fraction of amplifiers. Joint sum-rate maximization/power-minimization is formulated and solved with a combination of fractional programming, block coordinate descent, majorization-minimization, and SOCP techniques. Hardware–energy trade-offs (DoF vs. amplifier count and power budget) are explicitly analyzed and optimized (Zhu et al., 2022).
• Reconfigurable Intelligent Metasurface Antennas (RIMSA) fuse metasurface technology and array theory. Joint digital/phase optimization via fractional programming and product manifold optimization achieves near-digital sum-rate with few RF chains, and can be extended to full MU-MIMO systems using a WMMSE+manifold framework (Wei et al., 23 Jun 2025).
• Irregular RIS ("IRIS") arrays deliberately place a fixed number of RIS elements on an expanded aperture rather than a regular grid, exploiting statistical spatial diversity for increased capacity without increasing pilot or hardware overhead. Tabu search and stochastic cross-entropy optimization yield practical joint solutions for element location (topology) and per-element phase, outperforming regular layouts especially when element count is limited (Su et al., 2021).
• RIS-aided array radar demonstrates that integrating a passive RIS as a communication/sensing partner to an active array receiver unlocks orders-of-magnitude interference mitigation capacities. Alternating Dinkelbach and Riemannian Newton methods enable efficient joint optimization of transmit, receive, and RIS coefficients under unimodular constraints, proving convergence and quantifying performance scaling with RIS size (Chen et al., 2024).

6. Methodological Trends and Design Principles

Across the spectrum of intelligent array designs, several common themes recur:

• Fully distributed control and data reduction at the edge, as seen in DIAT-like designs, enables large-scale sensor arrays to operate autonomously with negligible centralization or wideband data aggregation (Dickinson et al., 2015).
• Sparse array geometries efficiently trade-off aperture size, mutual coupling, and virtual DOF, with number-theoretic or combinatorial underpinnings ensuring optimal or near-optimal performance for DOA estimation, spectral estimation, and high-resolution sensing (Li et al., 2018, Goel et al., 2022, Alawsh et al., 2021, Wang et al., 27 Aug 2025).
• Hybrid digital–analog or microprogrammable hardware architectures, reconfigured in microseconds and optimized for hardware–workload balance, are favored for massive MIMO and large-scale ISAC where area, power, and agility are limiting factors (Tsinos et al., 2016, Rasteh et al., 3 Dec 2025, Pogue et al., 14 Feb 2025).
• Alternating optimization, fractional programming, manifold methods, and semidefinite relaxations enable tractable solutions in the highly nonconvex, high-dimensional design spaces of modern arrays (Zhu et al., 2022, Liu et al., 18 Mar 2025, Liu et al., 2024, Wei et al., 23 Jun 2025).
• Explicit consideration of hardware constraints (amplifier budgets, phase shifter bitwidths, mutual coupling, and RF chain count) informs both the pattern synthesis and physical implementation phases for sustainable and low-cost array solutions.

7. Future Directions and Generalization

Emergent intelligent array designs are likely to integrate:

• Real-time learning-based reconfiguration policies, adapting array partitioning and control sequences on-the-fly in response to changing channel, user, or environmental statistics (Liu et al., 18 Mar 2025).
• Multi-functional apertures, including joint communication, localization, and sensing arrays leveraging dynamic partitioning, RIS/metasurface integration, and collaborative architectures.
• Near-field, volumetrically distributed, or topology-adaptive arrays, extending beyond classical ULA and URA implementations to maximize spatial degrees in constrained, 3D, or irregularly accessible environments.
• Co-design with intelligent surfaces, reconfigurable meta-structures, and programmable hardware fabrics, seeking globally optimal trade-offs among performance, energy consumption, and physical resource constraints.

Collectively, these advances mark a paradigm shift toward arrays as programmable, collaborative, and context-adaptive platforms, merging mathematics, system-level optimization, and hardware–software co-design for next-generation connectivity and sensing.