Integrated Disordered Photonic Processor

• The paper demonstrates that integrated disordered photonic processors utilize engineered disorder—whether synthetic, structural, or fabrication-induced—as a computational resource for simulation, random projection, and secure key generation.
• They exploit programmable phase modulation and low-symmetry interferometric meshes to mimic static and dynamic disorder, enabling controlled quantum transport experiments and reservoir computing applications.
• Programmable disorder techniques offer high-fidelity performance with rapid reconfiguration and calibration, advancing applications in environment-assisted transport, analog preprocessing, and physical unclonable functions.

An integrated disordered photonic processor is best understood, in current literature, as an integrated photonic system in which disorder, low symmetry, multiple scattering, or fabrication-conditioned phase variation is not treated solely as parasitic error, but enters the processor function as a programmable variable, a computational substrate, a security primitive, or a phenomenon to be calibrated around. The term therefore spans several distinct but related device classes: programmable nanophotonic transport simulators that scan static and dynamic disorder coordinates electronically, low-symmetry moiré-quasicrystal interferometers with aperiodic and reconfigurable spectra, compact random-matrix generators built from dense fixed mixing interlaced with programmable phase layers, and reconfigurable interferometric meshes in which unavoidable fabrication disorder is either compensated numerically or exploited as a hardware fingerprint (Harris et al., 2015, Tarik et al., 9 Jul 2025, Zelaya et al., 15 Jan 2025, Sarantoglou et al., 16 May 2025, Mower et al., 2014).

1. Scope and defining characteristics

A useful synthesis is to distinguish three recurrent meanings of “disordered” in integrated photonic processors. In one meaning, disorder is synthetic and programmable: on-chip phases are randomized to emulate static and dynamic disorder landscapes, as in discrete-time transport simulators (Harris et al., 2015, Mower et al., 2014). In a second meaning, disorder is structural and low-symmetry: a deterministic but quasi-periodic or aperiodic scattering medium, together with fabrication-induced nanoscale variation, generates a rich, device-specific transfer function that resists compact analytic description (Tarik et al., 9 Jul 2025). In a third meaning, disorder is fabrication-conditioned uniqueness: waveguide roughness, passive phase offsets, and related imperfections create chip-specific analog responses that can be repurposed as physical unclonable functions or security tokens (Sarantoglou et al., 16 May 2025, Zhu et al., 2 Apr 2025).

This scope is narrower than “integrated photonic processor” in general. Several prominent integrated photonic processors are explicitly described as deterministic rather than disorder-based. The subset-sum processor is a reconfigurable combinatorial path-enumeration circuit, not a disorder-enabled computer (Xu et al., 2023). The programmable photonic Ising machine uses a general-purpose hexagonal interferometric mesh in which disorder appears as phase and coupling error, not as the computational resource (Rausell-Campo et al., 17 Nov 2025). The broadband blind-source-separation processor is a structured silicon-photonic microring weight bank, not a disordered medium (Zhang et al., 2022). The 20-mode universal quantum photonic processor is a calibrated low-loss Clements mesh designed to implement arbitrary target unitaries, with disorder treated as an imperfection to be compensated rather than a substrate to be exploited (Taballione et al., 2022).

2. Programmable disorder in transport and quantum-walk processors

The clearest experimental realization of programmable disorder as a processor variable is the programmable nanophotonic processor used for quantum transport simulations (Harris et al., 2015). The chip is a silicon photonic interferometric network containing 88 generalized beamsplitters implemented as Mach-Zehnder interferometers, together with 176 individually tunable thermo-optic phase shifters, 26 input modes, and 26 output modes, in a physical footprint of $4.9\,\mathrm{mm}\times 2.4\,\mathrm{mm}$. Each reconfigurable beamsplitter is described by

$$\hat{U}_{\mathrm{RBS}}= \begin{bmatrix} e^{i\phi}\sin\theta & e^{i\phi}\cos\theta\ \cos\theta & -\sin\theta \end{bmatrix},$$

so the mesh can realize arbitrary local $SU(2)$ rotations and, in aggregate, functions as a programmable linear-optical network. In the transport configuration, horizontal position is discrete time $\tau\in\{1,\dots,11\}$, vertical position is discrete space $i\in\{1,\dots,26\}$, and the staggered coupling pattern yields a nearest-neighbor discrete-time transport lattice. The processor is driven by a 240-channel, 16-bit biasing system, read out by a 32-channel detector array with 18-bit precision, and reconfigured on microsecond timescales because the thermo-optic phase shifters have a measured $3\,\mathrm{dB}$ bandwidth of $130.0\pm 5.59\,\mathrm{kHz}$, corresponding to up to $10^5$ full-chip reconfigurations per second (Harris et al., 2015).

In that platform, disorder is implemented entirely through programmable on-chip phases. For dynamic disorder, $\phi_i(\tau)$ is sampled independently for every site and time step from a uniform distribution over $[-\pi,\pi]$, scaled by a coefficient $$\hat{U}_{\mathrm{RBS}}= \begin{bmatrix} e^{i\phi}\sin\theta & e^{i\phi}\cos\theta\ \cos\theta & -\sin\theta \end{bmatrix},$$0. For static disorder, $$\hat{U}_{\mathrm{RBS}}= \begin{bmatrix} e^{i\phi}\sin\theta & e^{i\phi}\cos\theta\ \cos\theta & -\sin\theta \end{bmatrix},$$1 is sampled independently in space and then held constant over all time steps, with amplitude controlled by $$\hat{U}_{\mathrm{RBS}}= \begin{bmatrix} e^{i\phi}\sin\theta & e^{i\phi}\cos\theta\ \cos\theta & -\sin\theta \end{bmatrix},$$2. The operating point is the coordinate $$\hat{U}_{\mathrm{RBS}}= \begin{bmatrix} e^{i\phi}\sin\theta & e^{i\phi}\cos\theta\ \cos\theta & -\sin\theta \end{bmatrix},$$3. This distinction is physically central: static disorder generates localization-inducing coherent interference, while dynamic disorder emulates fluctuating environmental noise. A common misconception is that this realizes a literal open quantum system on chip. The paper instead states that each programmed realization is a deterministic unitary evolution, and the noisy-environment behavior is recovered by averaging an ensemble of realizations at fixed $$\hat{U}_{\mathrm{RBS}}= \begin{bmatrix} e^{i\phi}\sin\theta & e^{i\phi}\cos\theta\ \cos\theta & -\sin\theta \end{bmatrix},$$4 (Harris et al., 2015).

The experimental survey is unusually large. The full disorder map consists of 400 disorder coordinates, with $$\hat{U}_{\mathrm{RBS}}= \begin{bmatrix} e^{i\phi}\sin\theta & e^{i\phi}\cos\theta\ \cos\theta & -\sin\theta \end{bmatrix},$$5 and $$\hat{U}_{\mathrm{RBS}}= \begin{bmatrix} e^{i\phi}\sin\theta & e^{i\phi}\cos\theta\ \cos\theta & -\sin\theta \end{bmatrix},$$6 each taking values from 0 to 1 in increments of 0.05; at each coordinate the authors measure 100 independent disorder realizations, giving $$\hat{U}_{\mathrm{RBS}}= \begin{bmatrix} e^{i\phi}\sin\theta & e^{i\phi}\cos\theta\ \cos\theta & -\sin\theta \end{bmatrix},$$7 transport experiments for the map and 64,400 transport experiments in total. The output distributions reveal ballistic transport near $$\hat{U}_{\mathrm{RBS}}= \begin{bmatrix} e^{i\phi}\sin\theta & e^{i\phi}\cos\theta\ \cos\theta & -\sin\theta \end{bmatrix},$$8, Gaussian-like diffusive transport near $$\hat{U}_{\mathrm{RBS}}= \begin{bmatrix} e^{i\phi}\sin\theta & e^{i\phi}\cos\theta\ \cos\theta & -\sin\theta \end{bmatrix},$$9, and Anderson-localization-like suppression of transport near $SU(2)$0. At fixed strong static disorder $SU(2)$1, transport to a distant site $SU(2)$2 shows a non-monotonic dependence on dynamic disorder, with an observed $SU(2)$3 enhancement in transport efficiency. The paper identifies this as environment-assisted quantum transport and as the first evidence of ENAQT in a discrete-time system. Agreement with simulation is reported as a mean fidelity of $SU(2)$4, using the Bhattacharyya coefficient $SU(2)$5 for 1D distributions (Harris et al., 2015).

A closely related architectural argument was made earlier for a programmable quantum photonic processor implemented as a 2D lattice of reconfigurable MZIs on SOI (Mower et al., 2014). There, disorder appears in two forms simultaneously. Unwanted fabrication disorder is modeled through directional-coupler splitting-ratio variation and phase-shifter loss, while intentional disorder for quantum walks is introduced by sampling output phases from $SU(2)$6. The paper distinguishes time-independent disorder and time-dependent disorder, and proposes statistically robust studies of entangled-photon walks in disordered lattices. It also shows, under a pessimistic fabrication model, that post-fabrication nonlinear optimization of phase settings can raise median simulated fidelities from 94.52% to 99.99% for CNOT, from 92.22% to 99.99% for CPHASE, and from 82.63% to 99.77% for an iterative phase estimation circuit (Mower et al., 2014).

3. Low-symmetry scattering processors and programmable random operators

A different branch of the field treats low symmetry and fabrication-sensitive scattering as the source of processor expressivity. The quasicrystal interferometer is an integrated silicon photonic interferometer fabricated on a 220 nm silicon-on-insulator platform with oxide cladding and metal heaters, architecturally related to a Michelson–Gires–Tournois interferometer but with the “front mirrors” replaced by two 500 $SU(2)$7-long moiré quasicrystal waveguides (Tarik et al., 9 Jul 2025). Each arm includes a 150 $SU(2)$8 normal waveguide section and a loop mirror, and each quasicrystal is tuned by an integrated thermo-optic heater with resistance $SU(2)$9. The quasicrystal waveguide is a width-modulated single-mode silicon nanowire formed by superimposing gratings of periods 316 nm and 317 nm, yielding a moiré beat length of about 100 $\tau\in\{1,\dots,11\}$0. The resulting structure is deterministic and quasi-periodic rather than fully stochastic, but its delocalized transition region near 1550 nm is highly sensitive to fabrication-induced nanoscale disorder. Spectra are measured from 1480–1580 nm in 10 pm steps. The paper characterizes the device by auto mutual information, cross mutual information, analyticity breaking, and erasable mutual information, and reports that normalized mutual information between an original spectral fingerprint and a reconfigured one falls below 0.5 after only about 1.25 mW of applied heater power change (Tarik et al., 9 Jul 2025).

The processor interpretation is explicitly reservoir-inspired. A reservoir state is defined as

$\tau\in\{1,\dots,11\}$1

with $\tau\in\{1,\dots,11\}$2 the transmission at the $\tau\in\{1,\dots,11\}$3-th selected wavelength, and the device is viewed as implementing

$\tau\in\{1,\dots,11\}$4

Here $\tau\in\{1,\dots,11\}$5 is the inaccessible combination of designed structural details and fabrication-induced disorder. In the reported demonstration, $\tau\in\{1,\dots,11\}$6, $\tau\in\{1,\dots,11\}$7, and $\tau\in\{1,\dots,11\}$8 wavelengths are sampled over 1530–1540 nm. The paper reports that $\tau\in\{1,\dots,11\}$9 features are sufficient to achieve a total regression error below $i\in\{1,\dots,26\}$0 for winding numbers $i\in\{1,\dots,26\}$1, while performance degrades at $i\in\{1,\dots,26\}$2 and under wavelength-grid shifts of $i\in\{1,\dots,26\}$3. The same complexity supports reconfigurable PUF operation: a single device driven by one 0–15 V input can access about $i\in\{1,\dots,26\}$4 distinct optical keys, dual-input control expands this to about $i\in\{1,\dots,26\}$5 keys, and with 2048-bit key length the paper estimates about 20 Mb of total key material from one device (Tarik et al., 9 Jul 2025).

A complementary architecture pursues programmable randomness with much smaller active-control overhead. The integrated programmable random-matrix generator represents the optical transform as

$i\in\{1,\dots,26\}$6

where $i\in\{1,\dots,26\}$7 is a programmable diagonal phase mask and $i\in\{1,\dots,26\}$8 is a fixed passive mixing layer (Zelaya et al., 15 Jan 2025). The central result is that only two programmable random phase layers are sufficient to generate output signals with white-noise-like statistics, even for highly sparse inputs. The fabricated demonstration uses a 5-port silicon photonics circuit with thermo-optic phase shifters, a coupled waveguide array as the fixed mixer, and demultiplexing of a 100-dimensional input into 20 blocks of 5. The paper explicitly does not claim arbitrary-matrix programmability or Haar-random synthesis; instead, it shows that a dense fixed mixer plus minimal active control can realize useful randomizing transformations for whitening, random projection, and encryption-like tasks (Zelaya et al., 15 Jan 2025).

4. Disorder as a security primitive and dual-use hardware fingerprint

In several integrated processors, fabrication disorder is not the main transform engine but becomes operationally essential through hardware identity. The dual-purpose SmartLight demonstration is a clear example (Sarantoglou et al., 16 May 2025). A commercial reconfigurable silicon photonic chip based on a hexagonal mesh of Mach-Zehnder interferometers is programmed as a recurrent optical spectrum slicing receiver for equalization of a 32 Gbaud intensity-detected self-coherent QPSK signal after 25 km of transmission. Each node is an MZDI in a loop with 11.1 GHz bandwidth and 22.2 ps loop delay. The effective MZI phase is written as

$i\in\{1,\dots,26\}$9

where $3\,\mathrm{dB}$0 is user-programmed and $3\,\mathrm{dB}$1 is the passive fabrication-induced phase offset produced by waveguide roughness and refractive-index variation. The processor has 22.5 dB insertion loss, operates around 1550 nm, and feeds a 55-tap digital feed-forward equalizer after photodetection. Experimentally, configurations with 2 or more nodes achieve $3\,\mathrm{dB}$2, the best 2-node case reaches $3\,\mathrm{dB}$3, and 3 nodes improve to about $3\,\mathrm{dB}$4 (Sarantoglou et al., 16 May 2025).

The same analog response becomes a PUF because the hidden $3\,\mathrm{dB}$5 shifts alter the optimal equalizer weights. The response extraction pipeline uses 125 different phase configurations, 60 repeated evaluations per response, random projection to 5000 values, Gray-encoded quantization, and selection of 256-bit keys. For a representative case with 3 nodes, 3-bit precision, and phase threshold $3\,\mathrm{dB}$6, the paper reports

$3\,\mathrm{dB}$7

while the abstract states false positive and false negative probabilities below $3\,\mathrm{dB}$8. The same study shows that 3 nodes provide the best balance between computational usefulness and PUF robustness, whereas 2 nodes provide less entropy and 4 nodes accumulate more noise (Sarantoglou et al., 16 May 2025).

A related multifunctional silicon photonic processor, LightIn, also uses manufacturing randomness as a security primitive (Zhu et al., 2 Apr 2025). The chip is a $3\,\mathrm{dB}$9 square recirculating mesh with 40 programmable unit cells, 20 optical ports, 49 electrical pads, and a footprint of $130.0\pm 5.59\,\mathrm{kHz}$0. In its PUF mode, challenge bits are mapped to programming voltages in a rotationally symmetric structure, and response bits are generated by comparing paired output powers according to

$130.0\pm 5.59\,\mathrm{kHz}$1

The experimental inter-die Hamming distance for two dies and 128 challenges is 57.71%, the simulated inter-die value for 100 dies is 49.97%, and the experimental intra-die Hamming distance over 10 repeats is 2.55%. The simulation models initial arm-length differences in each MZI as $130.0\pm 5.59\,\mathrm{kHz}$2. The same platform is otherwise a versatile programmable processor for unitary transforms, non-unitary transforms, switching, and neural-network inference, so the PUF behavior is explicitly an exploitation of manufacturing randomness embedded in a broader reconfigurable photonic system (Zhu et al., 2 Apr 2025).

5. Calibration, compensation, and dynamic phase control

Large integrated photonic processors confront both static and dynamic disorder, and several papers emphasize that useful operation depends on calibration as much as architecture. In the programmable quantum photonic processor proposal, the fabrication model includes directional-coupler transmissivity variation with mean 50% and standard deviation 4.3%, and phase-shifter loss sampled from a non-negative Gaussian with mean 5.16% and standard deviation 2.84% (Mower et al., 2014). The optimization target is

$130.0\pm 5.59\,\mathrm{kHz}$3

normalized so that $130.0\pm 5.59\,\mathrm{kHz}$4. The paper’s central result is that post-fabrication numerical optimization of phase settings can compensate pessimistic SOI imperfections strongly enough to restore high-fidelity logic and simulation. In the experimental transport processor, thermal crosstalk is reported at about 1% between nearest neighbors and is compensated by linear matrix inversion for each programmed setting, contributing to the observed mean transport-map fidelity of $130.0\pm 5.59\,\mathrm{kHz}$5 (Harris et al., 2015).

Dynamic phase instability adds a separate control problem. The phase-instability study on an 8-mode configurable rectangular mesh of MZIs and tunable phase shifters models fluctuations by a Brownian random walk,

$130.0\pm 5.59\,\mathrm{kHz}$6

and by harmonic reconstruction from experimentally observed oscillating harmonics (Elmas et al., 23 Jun 2026). The experiment samples output powers at about 125 readings/s per channel over 300 s and validates the Brownian model against measured phase histograms and spectra, reporting discrepancies of about 9% and 12%, respectively. The same framework supports self-feedback control for input phase correction, with feedback activated after 60 s and a correction rate of 38 Hz. This study is explicitly about dynamic phase disorder rather than static fabrication disorder, but it clarifies that large photonic processors must separate one-time calibration of fixed imperfections from ongoing stabilization of time-dependent drift (Elmas et al., 23 Jun 2026).

The LightIn processor develops this calibration logic into a system workflow that does not use in-network monitoring photodetectors (Zhu et al., 2 Apr 2025). Its automated testing, compilation, and adjustment framework builds voltage-to-phase lookup tables by progressive characterization of all MZIs, selects and embeds task-specific topologies, and then mitigates manufacturing variations, $130.0\pm 5.59\,\mathrm{kHz}$7-phase ambiguity caused by intensity detection, thermal crosstalk, and environmental noises through digital-twin-assisted adjustment. The overlap-like objective is written as

$130.0\pm 5.59\,\mathrm{kHz}$8

with $130.0\pm 5.59\,\mathrm{kHz}$9 the measured response and $10^5$0 the simulated one. This approach is significant because it treats post-fabrication variability as a system-identification problem rather than assuming ideal devices.

6. Relation to adjacent processor classes and broader significance

Integrated disordered photonic processors are therefore adjacent to, but not identical with, several other processor families. The subset-sum processor is a deterministic reconfigurable integrated photonic circuit built from 1449 standardized integrated 3D devices/modules, where each optical path has an exact subset semantics; disorder would be harmful because exact branch semantics and port labeling are required (Xu et al., 2023). The programmable photonic Ising machine uses the Smartlight hexagonal waveguide mesh as a calibrated matrix engine for $10^5$1, with phase and coupling disorder treated explicitly as error sources that degrade success probability as problem size grows (Rausell-Campo et al., 17 Nov 2025). The microring-weight-bank processor for broadband blind source separation is a structured analog optical vector processor whose main control problem is weight precision, improved from 6.7 bits to 9.0 bits by dithering calibration (Zhang et al., 2022). The 20-mode universal quantum photonic processor is a benchmark low-loss Clements mesh in $10^5$2 with 190 unit cells, 380 thermo-optic tunable elements, average insertion loss 2.9(2) dB, $10^5$3, and $10^5$4; it is a reference architecture for calibrated universal interference rather than a disorder-native processor (Taballione et al., 2022).

The broader significance of the integrated disordered photonic processor lies in the fact that disorder can enter integrated photonics in mutually incompatible but technologically productive ways. In transport simulators, disorder is a controlled experimental axis that exposes ballistic, diffusive, localized, and environment-assisted regimes on a single chip (Harris et al., 2015). In low-symmetry quasicrystal interferometers, fabrication-sensitive scattering yields aperiodic spectral fingerprints, erasable mutual information, and compact reservoir-inspired feature maps (Tarik et al., 9 Jul 2025). In minimal randomizing processors, dense fixed mixing plus a few phase layers provides a practical middle ground between a fixed disordered medium and a universal MZI mesh (Zelaya et al., 15 Jan 2025). In hybrid programmable meshes, unavoidable disorder furnishes the entropy for PUFs while reconfiguration preserves useful computation (Sarantoglou et al., 16 May 2025, Zhu et al., 2 Apr 2025). Taken together, these developments suggest that “disorder” in integrated photonics is no longer a single concept: it can be engineered, emulated, calibrated, or harvested, depending on whether the processor is aimed at quantum transport, random linear transforms, analog preprocessing, or hardware security.