Coherent Homodyne Integrated Circuit

• Coherent homodyne integrated circuits are systems that mix a signal with a phase-referenced local oscillator on-chip, using balanced photodetection to extract phase-sensitive information.
• These circuits leverage various material platforms like lithium-niobate, silicon photonics, and Bi-CMOS to optimize performance in quantum key distribution, LiDAR, and high-speed communications.
• Advanced implementations integrate optical interferometry with electronic back-ends, enabling applications from continuous-variable quantum measurements to analog tensor processing and random number generation.

A coherent homodyne integrated circuit is an integrated photonic or electronic-photonic system in which a signal field interferes with a phase-referenced local oscillator on chip and the resulting outputs are processed by balanced photodetection to recover phase-sensitive optical information. In the recent literature, this class of circuit spans lithium-niobate continuous-variable quantum photonic chips, silicon-photonic balanced homodyne receivers, monolithic Bi-CMOS electronic-photonic quantum light detectors, coherent transceivers for sensing and LiDAR, silicon-plasmonic sub-THz receivers, and homodyne photonic crossbars for analog tensor processing (Lenzini et al., 2018, Tasker et al., 2023, Jia et al., 2023, Sandmann et al., 2023, Lukashchuk et al., 2023, Harter et al., 2018, Zhou et al., 20 Apr 2026). The unifying architectural motif is on-chip optical mixing followed by differential photocurrent extraction; the diversity lies in material platform, degree of monolithic integration, electronic co-design, and application domain.

1. Core definition and circuit constituents

The canonical coherent homodyne integrated circuit combines an optical interferometric front-end, matched photodetectors, and an electrical readout path. In balanced homodyne implementations, a strong coherent local oscillator and a weak signal interfere in a $2\times 2$ beam splitter or multimode-interference device, and the two output ports are detected and subtracted. In the monolithic Bi-CMOS detector, the balanced subtraction of the two photodiode currents suppresses classical intensity noise of the local oscillator and transfers quantum-limited shot noise to the amplifier input (Tasker et al., 2023). In silicon-photonic time-domain balanced homodyne detection, the differential output is explicitly written as $I_{\mathrm{diff}} = I_1 - I_2$ (Jia et al., 2023).

A second architectural family uses $90^\circ$ optical hybrids rather than a single $50{:}50$ splitter. In the integrated differential conjugate homodyne detector, a single 4-port MMI acts as a $90^\circ$ optical hybrid; its four outputs, denoted $X_1$, $X_2$, $P_1$ and $P_2$, lie on the complex unit circle at $0^\circ$, $I_{\mathrm{diff}} = I_1 - I_2$0, $I_{\mathrm{diff}} = I_1 - I_2$1 and $I_{\mathrm{diff}} = I_1 - I_2$2 relative to the local oscillator. Balanced subtraction of the two “X” ports yields the in-phase quadrature $I_{\mathrm{diff}} = I_1 - I_2$3, while balanced subtraction of the two “P” ports yields the in-quadrature $I_{\mathrm{diff}} = I_1 - I_2$4 (Carver et al., 2024). Dual-polarization coherent receivers and LiDAR engines extend the same principle with one $I_{\mathrm{diff}} = I_1 - I_2$5 hybrid per polarization or with a $I_{\mathrm{diff}} = I_1 - I_2$6 MMI plus balanced detection for beat-note extraction (Sandmann et al., 2023, Lukashchuk et al., 2023).

The electrical back-end ranges from off-chip photodiodes and measurement electronics to tightly co-integrated transimpedance amplifiers, buffers, phase-recovery loops, and FPGA post-processing. This range is not incidental. The literature does not restrict “integration” to a single-material or fully monolithic implementation: some chips integrate the generation, manipulation, and interferometric stage of homodyne detection but route outputs to off-chip photodiodes, some monolithically combine photonics and Bi-CMOS electronics, and others co-package PICs, TIAs, ASICs, and FPGAs (Lenzini et al., 2018, Tasker et al., 2023, Chugh et al., 2022).

2. Measurement physics and homodyne observables

For continuous-variable quadrature measurement, the standard operator is

$I_{\mathrm{diff}} = I_1 - I_2$7

In the lithium-niobate integrated quantum photonic platform, the photocurrent difference satisfies $I_{\mathrm{diff}} = I_1 - I_2$8, where $I_{\mathrm{diff}} = I_1 - I_2$9 is the local-oscillator power. By scanning $90^\circ$0 via an electro-optic phase shifter, one retrieves both $90^\circ$1 and $90^\circ$2 (Lenzini et al., 2018). The same work expresses squeezing as

$90^\circ$3

In coherent ranging and communications, the balanced detector outputs a beat current rather than a directly scanned quadrature trace. In the coherent LiDAR engine, after a $90^\circ$4 MMI and balanced subtraction, the intermediate-frequency photocurrent is

$90^\circ$5

with beat angular frequency $90^\circ$6 (Lukashchuk et al., 2023). In analog homodyne coherent reception for data-center interconnects, the $90^\circ$7 hybrid produces normalized balanced outputs $90^\circ$8 and $90^\circ$9, with $50{:}50$0; under homodyne conditions, $50{:}50$1 and the loop seeks to cancel the cumulative phase error (Chugh et al., 2022).

A common misconception is that homodyne detection necessarily addresses only one quadrature at a time. Integrated conjugate homodyne systems measure both conjugate quadratures simultaneously and can form the phase-independent observable

$50{:}50$2

which is used for quantum random number generation (Carver et al., 2024). A second extension replaces state readout by analog multiplication: in the homodyne photonic tensor processor, the differential photocurrent integrated by a TIA realizes $50{:}50$3, and summation over time bins yields the matrix product $50{:}50$4 (Zhou et al., 20 Apr 2026).

3. Material platforms and integrated architectures

Material choice determines the balance among nonlinearity, electro-optic tunability, propagation loss, bandwidth, and electronic co-integration. The lithium-niobate platform of Lenzini et al. uses Z-cut LiNbO$50{:}50$5, exploiting high $50{:}50$6 nonlinearity and strong electro-optic coefficients to combine squeezed-state generation, interferometric routing, and reconfigurable homodyne optics on a single 62 mm chip (Lenzini et al., 2018). Silicon photonics, by contrast, offers compact MMIs, Ge-on-Si photodiodes, PIN-based variable optical attenuators, polarization splitter-rotators, and compatibility with Bi-CMOS or SiGe electronics, which is central in the silicon time-domain balanced homodyne detector, the Bi-CMOS monolithic quantum light detector, the IC-TROSA coherent transceiver, and the analog EIC–PIC coherent receiver (Jia et al., 2023, Tasker et al., 2023, Sandmann et al., 2023, Chugh et al., 2022).

Other implementations deliberately hybridize multiple material systems. The coherent LiDAR engine combines a tunable Vernier laser in III–V/SiN, a 130 nm SiGe BiCMOS high-voltage arbitrary waveform generator, an erbium-doped SiN waveguide amplifier, and a silicon-Ge balanced detector (Lukashchuk et al., 2023). The sub-THz coherent receiver based on plasmonic internal photoemission detectors integrates Ti/Au plasmonic junctions, silicon waveguides, grating couplers, phase shifters, and transmission lines on SOI, enabling coherent detection up to 1 THz without III–V photoconductors (Harter et al., 2018). The tensor-processing architecture separates wafer-scale thin-film lithium-niobate transmitters from Si/SiN homodyne computing circuits and uses chip-to-chip coupling to assemble a large homodyne crossbar (Zhou et al., 20 Apr 2026).

The diversity of implementations is summarized below.

Implementation	Platform	Reported figures
Integrated CV quantum photonics (Lenzini et al., 2018)	Z-cut LiNbO$50{:}50$7 waveguide chip	62 mm chip; $50{:}50$8 dB squeezing; $50{:}50$9
Monolithic quantum light detector (Tasker et al., 2023)	250 nm Bi-CMOS electronic-photonic IC	$90^\circ$0; 19.8 GHz bandwidth; 15 dB shot-noise clearance
Silicon TBHD for CVQKD (Jia et al., 2023)	220 nm SOI silicon photonics	$90^\circ$1 optical part; 86.9 dB CMRR; 99.97 % fidelity
Differential conjugate homodyne QRNG (Carver et al., 2024)	Integrated photonics + 65 nm CMOS + FPGA	25.6 dB SNC; 69 dB CMRR; 8 Mb/s real-time throughput
Homodyne photonic tensor processor (Zhou et al., 20 Apr 2026)	TFLN transmitters + Si/SiN computing chip	256 × 256 units, each $90^\circ$2; 1,000–6,000 TOPS; up to 330 TOPS/W

These architectures show that the coherent homodyne function is not tied to a single device topology. It may appear as a single quadrature receiver, an IQ front-end, a dual-polarization coherent transceiver, a sub-THz down-converter, or an analog multiply-accumulate fabric.

4. Continuous-variable quantum implementations

The most direct quantum-information realization is the integrated photonic platform for continuous variables reported by Lenzini et al. Two periodically poled waveguides generate squeezed vacuum at $90^\circ$3 nm from a pump at $90^\circ$4 nm, directional couplers route and filter the fields, and tunable beam splitters plus phase shifters configure either separable or entangled outputs before balanced homodyne interference with local-oscillator beams. The platform measured a squeezing level of $90^\circ$5 dB, anti-squeezing of $90^\circ$6 dB at pump $90^\circ$7 mW per waveguide, and an internal squeezing of $90^\circ$8 dB after correction for Fresnel and filter losses. In the two-mode configuration, the measured minima were $90^\circ$9 dB and $X_1$0 dB, yielding the inseparability value $X_1$1 and satisfying the entanglement criterion by $X_1$2 (Lenzini et al., 2018). Because the same chip integrates sources, reconfigurable interferometers, and homodyne optics, it directly addresses the continuous-variable requirement for co-located state generation and measurement.

Silicon-photonic balanced homodyne detection has been developed for continuous-variable quantum key distribution and tomography. The time-domain balanced homodyne detector on a standard 220 nm SOI wafer uses a single $X_1$3 MMI, matched-length waveguides, and forward-biased PIN phase-modulator VOAs to equalize the optical powers at the two Ge photodiodes. A closed-loop search tunes the VOA voltages in “ring” loops until the difference signal drifts to zero; about 20 loops are needed from an arbitrary start, and the final shot-noise mean is locked to $X_1$4 mV. The reported common-mode rejection ratio is 86.9 dB. In a quantum tomography experiment, the density matrix and Wigner function of a coherent state were reconstructed with 99.97 % fidelity, and the work demonstrated feasibility in a GG02 continuous-variable QKD system (Jia et al., 2023).

Integrated random-number generation introduces a further variant. The differential conjugate homodyne QRNG realizes $X_1$5 and $X_1$6 with a $X_1$7 hybrid and a true differential TIA, then computes $X_1$8 on an FPGA or in offline post-processing. The measured shot-noise clearance reached 25.6 dB just below photodiode saturation and the measured CMRR was approximately 69 dB at 100 kHz. The randomness extractor uses a Toeplitz matrix with $X_1$9 bits/sample, $X_2$0 bits/output, and $X_2$1 samples per hash; for $X_2$2 and $X_2$3 mV, the min-entropy is $X_2$4 bits/sample. Real-time throughput was 8 Mb/s, the theoretical limit at 100 MHz TIA bandwidth was 800 Mb/s, and hashed $X_2$5, hashed $X_2$6, and hashed $X_2$7 each passed all NIST SP 800-22 tests at $X_2$8 (Carver et al., 2024). This makes explicit that an integrated coherent homodyne circuit can function as a calibrated quantum entropy source rather than only as a tomography instrument.

5. Electronic-photonic co-design, bandwidth, and noise engineering

Bandwidth scaling in homodyne ICs is dominated by the electrical interface between photodiodes and the first gain stage. The clearest demonstration is the monolithic Bi-CMOS electronic-photonic detector, where the subtraction current is routed via a 20 $X_2$9m metal trace with approximately 7 fF parasitic directly into an HBT-based common-emitter amplifier. The overall detector footprint is $P_1$0, the measured 3 dB bandwidth is $P_1$1 GHz, and the maximum shot-noise clearance is 15 dB at about 1 GHz. The work explicitly identifies on-chip suppression of overall capacitance as the central mechanism, contrasting the $P_1$2 fF trace with 20–100 fF from bondpads and wirebonds in hybrid designs, and states that the achieved bandwidth is more than $P_1$3 that of discrete wirebonded homodyne detectors in the 1–2 GHz class (Tasker et al., 2023).

Hybrid and co-packaged designs remain important when the optical and electronic functions cannot yet be merged into one process. Milovančev et al. reported a die-level balanced receiver with hybrid co-integration of a low-noise TIA and a balanced PIN photodiode array, using a glass-inscribed planar lightwave circuit as the $P_1$4 optical hybrid. The receiver features a 40 dB CMRR up to 1 GHz, a quantum-to-classical noise ratio of 26.8 dB at 12.3 mW of local-oscillator power, and a 3 dB bandwidth of approximately 750 MHz; 500 Mb/s QPSK transmission was accomplished with a sensitivity of $P_1$5 dBm (Milovančev et al., 2021). The 1.2 GHz balanced homodyne detector based on RF and integrated circuit technology provides a related reference point: 1.2 GHz bandwidth, transimpedance gain of 4.86 kV/A, quantum-to-classical noise ratio around 18 dB, and 57.9 dB CMRR (Zhang et al., 2018).

A distinct line of work couples homodyne optics to analog control electronics. In the analog EIC–PIC coherent receiver, a 220 nm SOI silicon-photonic integrated coherent receiver with Ge-on-Si balanced photodetectors and an on-chip thermo-optic phase shifter is closed with a 130 nm SiGe BiCMOS carrier-phase recovery chip in a cross-correlator loop. The phase detector is linear for phase error in $P_1$6 with $P_1$7 V/rad, the thermo-optic phase shifter has $P_1$8 V and tuning bandwidth $P_1$9 kHz, and the closed-loop demonstration stabilized a 2 Gbaud QPSK homodyne link over 10 m of fiber (Chugh et al., 2022). This architecture shows that coherent homodyne integration is not only a matter of photonic miniaturization; it is also a control problem involving phase tracking, loop bandwidth, and parasitic-aware RF packaging.

6. Applications, misconceptions, and scaling trajectories

The application space of coherent homodyne integrated circuits is broader than continuous-variable state measurement. In acoustic sensing, a single-chip coherent transceiver based on silicon photonics integrates a dual-polarization IQ modulator, coherent receiver, balanced photodiodes, and TIAs in an OIF IC-TROSA-compliant architecture. Using correlation-based optical time-domain reflectometry with coherent detection, it demonstrated sensing of an acoustic signal after a fiber span of 20 km and provided information on external dynamic events up to 1.75 kHz (Sandmann et al., 2023). In coherent FMCW LiDAR, the photonic-electronic integrated engine uses a tunable Vernier laser, a high-voltage SiGe BiCMOS waveform generator, an erbium-doped waveguide amplifier, and a balanced detector; the reported chirp was $P_2$0 GHz in a $P_2$1s up-ramp, the practical range resolution was approximately 11.5 cm, and the single-point depth precision was approximately 1.5 cm at 10 m (Lukashchuk et al., 2023). In silicon-plasmonic sub-THz systems, coherent detection up to 1 THz is achieved by PIPEDs that mix a received THz wave with a locally generated optical beat in the same nano-junction (Harter et al., 2018). In photonic computing, homodyne ICs are used not as receivers in the communications sense but as massively parallel analog MAC engines; the 256 × 256 homodyne-unit architecture reported throughput of 1,000–6,000 TOPS and up to 330 TOPS/W, with benchmarking on Qwen2.5-0.5 billion parameter models (Zhou et al., 20 Apr 2026).

Several recurring misconceptions are clarified by the present literature. First, “coherent homodyne integrated circuit” does not imply a fully monolithic single-die realization. The lithium-niobate continuous-variable chip integrates generation, manipulation, and interferometric homodyne stages but routes outputs to off-chip photodiodes; the Bi-CMOS detector is monolithic at detector scale; the QRNG combines integrated photonics, integrated analog circuits, and FPGA post-processing; and coherent sensing and LiDAR systems frequently keep the laser external or hybrid-integrated (Lenzini et al., 2018, Tasker et al., 2023, Carver et al., 2024, Sandmann et al., 2023, Lukashchuk et al., 2023). Second, high CMRR is not a passive guarantee of balanced topology. The literature repeatedly identifies MMI splitting-ratio error, photodiode responsivity mismatch, path-length imbalance, and parasitic capacitance as practical limits, with compensation via VOAs, MZMs, photodiode bias tuning, matched routing, or monolithic PD–TIA integration (Jia et al., 2023, Carver et al., 2024, Tasker et al., 2023). Third, high bandwidth and high quantum fidelity are coupled but not identical targets: quantum random-number generation values shot-noise clearance and min-entropy, communications values loop stability and sensitivity, LiDAR values chirp linearity and coherence length, and tensor processors value MAC accuracy and aggregate throughput.

Reported scaling directions are correspondingly heterogeneous. In continuous-variable LiNbO$P_2$2 photonics, on-chip anti-reflection coatings, improved directional-coupler design, longer interaction length, higher pump peak power, ridge lithium-niobate waveguides, and lower-capacitance electrodes are identified as routes toward stronger squeezing and faster reconfiguration (Lenzini et al., 2018). In silicon quantum and communications receivers, on-chip delay lines, integrated polarization management, flip-chip bonding, and tighter PIC–EIC coupling are recurrent themes (Jia et al., 2023, Chugh et al., 2022). In sensing and coherent transceivers, on-chip DSP co-integration and multi-channel coherent receiver arrays are explicit roadmaps (Sandmann et al., 2023). In homodyne computing, the proposed progression is toward fully integrated TFLN/SiN-on-Si chips and multi-chip modules tiling to larger systems (Zhou et al., 20 Apr 2026). This suggests that the coherent homodyne integrated circuit is evolving from a specialized quantum measurement block into a general-purpose interferometric compute-and-sense primitive whose essential operation—phase-referenced optical mixing followed by differential readout—remains constant across otherwise disparate technologies.