HyDe Hybrid Device Assignment

• HyDe is an optimization framework that jointly assigns and configures heterogeneous device resources to balance energy, area, latency, and reliability.
• It utilizes techniques such as multi-objective evolutionary algorithms and differentiable affinity optimization across domains like emergency communications, analog IMC, and SRAM arrays.
• The method integrates detailed device and channel modeling to enable practical trade-off analysis and achieve Pareto-optimal solutions for complex system designs.

Hybrid Device Assignment (HyDe) refers to a class of optimization frameworks that perform joint assignment and configuration of heterogeneous device resources to maximize efficiency and performance across distinct application domains such as communication networks, in-memory computing, and integrated memory arrays. HyDe frameworks systematically balance trade-offs among competing metrics such as energy, area, latency, and reliability through device selection, partitioning strategies, and assignment algorithms.

1. Formulations and Objectives across Domains

HyDe methodologies arise in several contexts:

• Hybrid Device-to-Device/Vehicle Assignment in Emergency Communications: Assignment focuses on partitioning ground devices (GDs) into clusters for device-to-device (D2D) links and designating temporary data caching centers (TDCCs), with unmanned aerial vehicles (UAVs) assigned for device-to-vehicle (D2V) data collection, jointly minimizing emergency response time (ERT) and energy consumption (EC) under signal, power, and resource constraints (Huang, 2021).
• Hybrid Device Search for Analog In-Memory Computing (IMC): Layer-by-layer device assignment for deep neural network (DNN) inference on crossbars, selecting among devices such as SRAM, PCM, FeFET to optimize for area, programming energy, and accuracy under device-level non-idealities (Bhattacharjee et al., 2023).
• Hybrid Cell Assignment/Sizing in SRAM Arrays: Per-cell assignment and sizing across wordlines using multiple cell geometries and threshold voltages to optimize the product of power, area, and delay (PAD) (Pasandi et al., 2019).

A commonality is jointly optimizing for a vector-valued utility function (e.g., ERT/EC, Area/Energy/Accuracy, PAD) subject to domain-specific constraints and models of device-level non-idealities.

2. Mathematical Models and Problem Decomposition

HyDe frameworks express assignment as constrained, often multi-objective, optimization problems. Domains differ in details but share these structural elements:

Emergency Communication (D2D/D2V) (Huang, 2021):

• Ground Layer: GDs scattered in a region form a D2D graph $G=(N,L,W)$, where $L=[\ell_{ik}]$ encodes outage-respecting links and $W=[w_{ik}]$ measures potential throughput.
• Clustering: Partition devices into $C$ clusters, select one TDCC per cluster. The optimal graph modularity objective $Q(\mathcal{C})$ is maximized:

$$Q(\mathcal{C}) = \frac{1}{W} \sum_{i,k\in N} (w_{ik} - \frac{w_{i\cdot} w_{\cdot k}}{W}) \cdot \delta(c_i,c_k)$$

under outage and SINR constraints on link feasibility and power allocation.

• Aerial Layer: UAVs' assignment to TDCCs is encoded in the variables $x_j^{(i)}$. Total response time and energy are minimized via multiobjective optimization, with multiobjective evolutionary algorithms (MOEA/D) producing a Pareto front $(F_1,F_2)$, where $F_1$ is maximum ERT and $F_2$ is total energy consumed.

Analog IMC Device Assignment (Bhattacharjee et al., 2023):

• Device-Aware Layers: Each DNN convolution is replaced by a composite (CompDC) layer containing sub-layers for each device type, governed by differentiable affinity parameters $L=[\ell_{ik}]$0.
• Joint Optimization: Modified loss

$L=[\ell_{ik}]$1

with $L=[\ell_{ik}]$2, $L=[\ell_{ik}]$3 integrates area and programming energy as differentiable regularizers. Final deterministic assignment is derived via argmax selection per layer.

SRAM Cell Array Assignment (Pasandi et al., 2019):

• Row Partitioning: Each row is partitioned into segments with distinct sizing and $L=[\ell_{ik}]$4 assignments. The PAD cost function is:

$L=[\ell_{ik}]$5

with sizing variables $L=[\ell_{ik}]$6 and cell library parameters determined via SPICE models. Decision variables are optimized under noise margin and delay constraints.

3. Algorithms and Solution Techniques

HyDe frameworks deploy a range of algorithmic strategies, tailored to the problem decomposition:

Domain	Assignment/Partitioning	Path/Mapping	Multi-Objective Configuration
Emergency Comm.	Iterative modularity maximization with bisection	Closed-form waypoint/motion planning for UAVs	MOEA/D + EE maximization
Analog IMC	Differentiable device affinity optimization	Tile-based and 2.5D chiplet mapping	$L=[\ell_{ik}]$7-regularized loss, sampling, retraining
SRAM Arrays	Three-group suffix partition of rows	Per-group SPICE delay evaluation	DRV/read/write-optimized sizing

• TDCC Selection: In emergency networks, nodes are ranked within clusters via multiscale centrality and TOPSIS multicriteria decision analysis (Huang, 2021).
• UAV Control: Optimized via convex analysis (waypoints), bang–bang minimum-time control (motion), with closed-form expressions for switching times and trajectory tracking.
• IMC Layer Assignment: Softmaxed affinity results in expected cost minimization; final hard assignment via argmax, followed by hardware-noise-aware retraining.
• SRAM Row Partitioning: Hybrid assignment uses integer group selection and continuous sizing, exploiting convexity/monotonicity of PAD curves for efficient search (Pasandi et al., 2019).

4. Device and Channel Modeling

A core aspect is the explicit modeling of physical-layer non-idealities:

• Links: Stochastic D2D/D2V path loss, outage, and SINR constraints, with power/rate adaptation subject to Gaussian noise, shadow fading, and LoS/NLoS probabilities (Huang, 2021).
• IMC Devices: Read noise ($L=[\ell_{ik}]$8), temporal drift (parameter $L=[\ell_{ik}]$9), and quantization. Linear conductance mapping, area, and energy per operation are modeled per device (SRAM, PCM, FeFET), with endurance considerations included through periodic reprogramming costs (Bhattacharjee et al., 2023).
• SRAM Cells: Intrinsic switching delay ($W=[w_{ik}]$0), cell and wire capacitances, leakage, and dynamic power, with process-voltage-temperature dependencies extracted via SPICE. Data retention voltage (DRV), read, and write margin requirements are included in sizing sweeps (Pasandi et al., 2019).

Device-level models are propagated up to system-level trade-offs, and in some frameworks, injected during optimization via noise/variation-aware parameterization.

5. Performance and Trade-off Analysis

Extensive simulation and evaluation demonstrate HyDe’s optimization efficacy:

• Emergency Network Assignment (Huang, 2021): HyDe achieves modularity $W=[w_{ik}]$1 (10–40% higher than clique-based clustering), mean D2V path loss $W=[w_{ik}]$2 dB, and uplink latency reduction from $W=[w_{ik}]$3 s to $W=[w_{ik}]$4 s. Multiobjective optimization yields energy-efficiency (EE) improvement up to 23% relative to benchmarks.
• Analog IMC (Bhattacharjee et al., 2023): Hybrid assignment (Hybrid-III model) provides up to $W=[w_{ik}]$5 TOPS/mm$W=[w_{ik}]$6 at $W=[w_{ik}]$7 higher energy-efficiency on VGG16, compared to homogeneous device baselines. Retention and robustness to IR-drop are improved versus single-device mappings.
• SRAM Arrays (Pasandi et al., 2019): PAD is reduced by up to $W=[w_{ik}]$8 with hybrid assignment alone and up to $W=[w_{ik}]$9 when combined with DRV/read/write-optimized sizing. Gains are attributed to strategic deployment of larger or lower-$C$0 cells at the row end to mitigate wire delay.

Qualitative trade-off plots and configuration tables validate that multi-granularity and device heterogeneity, selected and assigned via HyDe, lead to Pareto-superior operating points for system designers.

6. Extensions, Recommendations, and Applicability

HyDe methodologies are inherently extensible:

• Device Types: Additional nonvolatile memory (NVM) types (e.g., RRAM), emerging device models, and precision/bitwidth co-optimization can be integrated by supplying device-specific parameters (Bhattacharjee et al., 2023).
• Algorithmic Tuning: Regularization parameters ($C$1) can be adapted to prioritize area, energy, or accuracy. Endurance-aware or reliability-enhanced assignment is supported through augmented cost functions.
• Topological/NAS Coupling: Joint search over DNN structure and device assignment is feasible with the underlying differentiable frameworks.
• Implementation: Hybrid assignment translates across architectural granularity, from per-cell SRAM sizing to per-layer IMC mapping to per-mission cluster/UAV scheduling. 2.5D integration with chiplets and network-on-package (NoP) support mixing of device types with manageable area/energy overheads.

This suggests HyDe frameworks constitute a general, modular, and domain-agnostic approach for the principled assignment of heterogeneous devices and resources to optimize complex multidimensional objectives under physical and architectural constraints.