Feature-Path Circuits in Neural and Quantum Systems

• Feature-path circuits are sparse subnetworks that trace specific functions by preserving targeted activations and causal links in complex systems.
• They are extracted using methods like gradient-based pruning in neural networks, causal mediation in transformers, and resonant pathfinding in physical and photonic circuits.
• These circuits improve interpretability and targeted intervention, with applications spanning image feature isolation, combinatorial problem solving, and efficient quantum state tomography.

A feature-path circuit is a structured, mechanistically interpretable subnetwork within a computational or physical system, identified or engineered so that specific outputs or behaviors are realized via a sequence of activations, signal propagation, or causal relationships, each corresponding to a path through constituent elements. This concept appears in multiple domains, including combinatorial logic devices, deep learning (particularly in CNNs and transformers), and photonic quantum circuits, unified by the principle that computation or function is execution traceable along explicit, meaningful paths through the system.

1. Theoretical Foundations and General Definitions

In all settings, a feature-path circuit is a sparse subgraph or functional chain that preserves or realizes a specific target feature, behavior, or computation:

• In neural networks, it is typically defined as the set of units, kernels, or features whose activations and connectivity suffice for a given neuron or feature activation, while the rest can be ablated without significant loss of function (Hamblin et al., 2022, Nanfack et al., 2024, Marks et al., 2024).
• In path-based physical computation, as in multi-path active-ring circuits, the circuit is an actual physical path traced by energy or information—e.g., a resonance‐matching trajectory through coupled oscillatory devices, whose readout reflects the solution to a combinatorial problem (Khitun et al., 2022).
• In photonic quantum circuits, a feature-path is realized as a prescribed chain of beam splitters and phase shifters that maps high-dimensional quantum states in extended Hilbert space down to a minimal tomographically complete output (Cardoso et al., 2019).

Mathematically, the feature-path circuit is often described as a subgraph $G_\tau = (V_\tau, E_\tau)$ of the full computation graph $G=(V, E)$, such that functional preservation of a target quantity $f$ is maintained: for all $x \in \mathcal D$, $\hat f(x; \bar{\theta}) \approx f(x; \theta)$, subject to a sparsity constraint, $\| \bar{\theta} \|_0 \leq \kappa$.

2. Methodologies for Feature-Path Circuit Extraction

Feature-path circuit discovery comprises principled approaches tailored to model architecture and domain:

2.1 Gradient- and Attribution-Based Pruning in Neural Networks

• In CNNs, methods such as ActGrad (activation×gradient), SNIP (Saliency-based Pruning), and FORCE iteratively or single-shot identify the subset of kernels critical for the propagation of a chosen feature (Hamblin et al., 2022, Nanfack et al., 2024). For each kernel, a saliency score with respect to the target feature is computed, the top-κ kernels are retained, and dead ends are pruned.
• In transformers, sparse autoencoders (SAEs) or transcoders create disentangled feature bases in hidden spaces, mapping activations into sparse, interpretable units. Causally relevant paths for behaviors or outputs are identified by calculating effects via attribution patching, integrated gradients, or post-hoc mediation (Marks et al., 2024, Dunefsky et al., 2024, Chen et al., 2024).
  • Transcoder-based analysis factorizes per-path attributions into fixed (input-invariant) weights and variable (input-dependent) activations (Dunefsky et al., 2024).

2.2 Path-Level Circuit Discovery in LLMs

Standard edge-level ablation identifies important connections in isolation but fails to capture cumulative, sequential, or stratified causal effects. Path-level circuit discovery operates at the path granularity, identifying chains of functional units (memory circuits) whose joint presence is essential for the emergence of higher-order behaviors (e.g., previous token prediction, induction, in-context learning) (Chen et al., 2024).

2.3 Physical Pathfinding in Analog/Mixed-Signal Circuits

In multi-path active-ring circuits, inherent device resonance conditions result in auto-oscillation along the path(s) matching both amplitude and phase criteria. Computational problems are encoded into network topology, phase delays, and attenuation; external tuning of loop phase and gain determines which physical path is selected (Khitun et al., 2022).

2.4 Photonic Circuits for Quantum State Tomography

Feature-path circuits in this context are implemented as minimal interferometric schemes whose cascades of beam splitters, phase shifters, and ancilla mode permutations realize a decomposed unitary matching the desired positive-operator-valued measurement (POVM) for tomography of a path-encoded qudit state (Cardoso et al., 2019). Design exploits SIC–POVM symmetry and Naimark’s theorem for efficient implementation.

3. Empirical Analysis and Practical Applications

Feature-path circuits are validated through both mechanical and statistical criteria:

• In CNNs, feature-preserving circuits preserve individual feature activations to within strict tolerance (e.g., Pearson |R| ≈ 0.95 at 20% kernel sparsity), outperforming simple magnitude-based baselines (Hamblin et al., 2022). Sub-feature circuits partition polysemantic units into sub-circuits specialized for distinct image clusters.
• In vision models, visual circuits (a synonym for feature-path circuits) maintain functional head activations under adversarial manipulation unless the circuit itself is directly targeted with SNIP-demotion-based attacks (Nanfack et al., 2024).
• In LLMs, path-level circuits uniquely pinpoint the causal machinery underlying language skills, as assessed by causal mediation scores, stratification analysis, and reliability under path removals. Transcoder- and SAE-discovered circuits have been shown to match or exceed human-interpretable fidelity (Dunefsky et al., 2024, Chen et al., 2024, Marks et al., 2024).
• In multi-path active-ring devices, theoretical and simulated embodiments demonstrate combinatorial search (e.g., parallel prime factorization, shortest-path identification) by physical path selection. Readout via distributed power sensors renders the path in digital form, verifying computation (Khitun et al., 2022).
• In photonic tomography, feature-path circuits (minimal interferometers for SIC–POVM) enable efficient full quantum state reconstruction, drastically reducing optical depth and component count versus universal architectures (Cardoso et al., 2019).

4. Circuit Diagrams and Interpretability

Interpretability is enhanced by explicit circuit diagrams and visualization schemes:

• Circuit diagrams in CNN and vision models depict nodes as filters/channels and edges as weighted connections (with sign, magnitude, and saliency encoded), focusing on the minimal path/circuit necessary for the feature (Hamblin et al., 2022, Nanfack et al., 2024).
• In transformers, node and edge attributions represent direct causal contribution (e.g., via indirect effect or Jacobian-weighted gradients) to a behavior or output, producing graphs or path sets that can be read hierarchically (Marks et al., 2024, Chen et al., 2024).
• Path diagrams in physical/photonic devices correspond to concrete routes through the network’s topology, as revealed by detector readout or configuration of optical elements (Khitun et al., 2022, Cardoso et al., 2019).

5. Limitations, Scalability, and Extensions

Feature-path circuit methodologies face several inherent limitations and challenges:

• In neural models, the interpretability and usefulness of extracted circuits depend on the quality of the underlying feature dictionary (SAE or transcoder) and the fidelity of the attribution method; early layers are especially challenging for attribution-patching, and thresholding may exclude globally important but individually weak nodes (Marks et al., 2024, Dunefsky et al., 2024).
• Resolution limits arising from phase shifter quantization and gain control in physical circuits cap the size and complexity of realizable problems and enforce precision engineering requirements (Khitun et al., 2022).
• Adversarial manipulation can, in some models, disrupt discovered visual circuits if the attacker targets the salient subgraph, exposing a fundamental brittleness in the identification pipeline (Nanfack et al., 2024).
• Hardware complexity, such as the scaling of beam splitter and phase shifter counts in quantum circuits, remains O(d³) for d-dimensional tomography—superior to the O(d⁴) scaling of universal designs but still resource-intensive for large d (Cardoso et al., 2019).
• Human-in-the-loop annotation for SHIFT interventions or sub-feature labeling is labor-intensive, though unsupervised clustering and automated procedures can partially offset this burden (Marks et al., 2024).

Potential extensions include path-level circuit optimization (beyond simple thresholding), end-to-end differentiable pruning, improved feature disentanglement (e.g., cosparse coding), and unsupervised large-scale pipelines for behavior-to-circuit mapping.

6. Comparison Across Domains and Paradigms

The feature-path circuit concept provides a unified language for mechanism interpretability, physical computation, and quantum information processing:

Domain	Representation	Discovery Principle	Key Application Example
CNNs	Filter/channel subgraphs	Saliency-based pruning	Image feature isolation, subfeatures
Transformers	SAE or transcoder features	Attribution, mediation, paths	LLM skill circuits, causal graphs
Active-ring	Physical wave propagation	Resonant pathfinding	Prime factorization, shortest-path
Photonic Qudit	Mode paths in interferometers	Unitary decomposition	Minimum quantum state tomography

This framework enables the mechanistic decomposition and targeted editing of complex systems, whether for interpretability, intervention (e.g., SHIFT for bias removal (Marks et al., 2024)), or efficient physical computation. The emphasis on path structure—whether abstract (feature activations) or physical (signal trajectories)—differentiates feature-path circuits fundamentally from conventional Boolean or uninterpreted neural architectures.