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Fault Equivalence in Fault-Tolerant Systems

Updated 16 July 2026
  • Fault equivalence is an equivalence notion that compares systems based on their behavior under faults rather than in ideal, fault-free conditions.
  • In fault-tolerant quantum circuits, weight-based fault equivalence and ZX-calculus rewrites preserve error thresholds and enable compositional, transitive transformations.
  • This framework extends to other domains, preserving fault-relevant observables for robust verification, synthesis, and optimization in systems like power networks and elasticity.

Searching arXiv for papers on fault equivalence and closely related frameworks. Fault equivalence is an equivalence notion that compares systems under faults rather than only in their nominal, fault-free behavior. In fault-tolerant quantum computing, the term denotes a relation under which all undetectable faults on one circuit have a corresponding fault on the other, guaranteeing that the effect of undetectable faults on both circuits is the same (Rodatz et al., 20 Jun 2025). Closely related uses appear in several other literatures: equivalence between encoded fault-tolerant circuits and adiabatic holonomic processes (Zheng et al., 2013), structural and decoder-equivalence of Detector Error Models (Rennela, 12 Jun 2026), fault-tolerant equivalence of spacetime codes via chain maps (Pesah et al., 11 Sep 2025), preservation of boundary fault responses in power-system dynamic equivalents (Shen et al., 2023), output behavior equivalence for linear systems with additive faults (Gleizer, 19 May 2025), and equivalence between smooth curved faults and infinitesimally segmented faults in elasticity (Sato et al., 2019).

1. Fault equivalence in fault-tolerant quantum circuits

In the framework of "Fault Tolerance by Construction" (Rodatz et al., 20 Jun 2025), a quantum circuit is viewed in spacetime. The fault locations of a circuit are the qubits at each time step, and a fault is an element of PL\overline{\mathcal{P}^{|\mathcal L|}} specifying the Pauli action at every fault location. Applying a fault FF to a circuit CC yields a new circuit CFC^F obtained by inserting the corresponding Pauli operations at each fault location. Two faults are equivalent if CF1=CF2C^{F_1}=C^{F_2}, and a fault is trivial if it is equivalent to the trivial fault.

The same work defines an adversarial noise model F\mathcal F as a set of atomic faults in PL\overline{\mathcal{P}^{|\mathcal L|}}, with potential faults given by the group F\langle \mathcal F\rangle. The weight wt(F)\mathrm{wt}(F) of a fault is the minimal number of atomic faults required to generate it. The principal concrete instantiation is circuit-level noise, which includes qubit flips on wires, multi-qubit output faults on gates, and for Pauli measurements both measurement flips and measurement flip plus output faults. Idealised submodels are obtained by declaring selected wires and gates fault-free, and by distinguishing fault-tolerant from fault-free multi-qubit Pauli measurements (Rodatz et al., 20 Jun 2025).

Detectability is defined circuit-theoretically. A detecting set is a set of measurements whose parity in the fault-free case is predetermined, and a fault is detectable if it flips odd many measurements in a detecting set. The circuit distance under noise model F\mathcal F is

FF0

A corresponding correctability proposition states that if FF1 has distance FF2, then any two non-equivalent faults of weight at most FF3 have different syndromes (Rodatz et al., 20 Jun 2025).

The core definition is FF4-fault equivalence. For circuits FF5 under noise models FF6,

FF7

holds iff for every fault FF8 with FF9, either CC0 is detectable, or there exists a fault CC1 such that CC2 and CC3; and symmetrically in the other direction (Rodatz et al., 20 Jun 2025). Full fault equivalence means CC4-fault equivalence for all CC5.

This notion is explicitly stronger than standard circuit equivalence. Standard equivalence requires equality of the underlying linear map or unitary and is silent on behavior under noise. Fault equivalence implies equality of ideal maps by taking the trivial fault, but equal maps do not imply fault equivalence (Rodatz et al., 20 Jun 2025). The same paper also identifies circuit distance with equivalence to an idealised implementation: CC6 iff CC7 is the maximum value such that CC8 is CC9-fault-equivalent to its idealised, fault-free implementation.

Fault equivalence is compositional and transitive. If CFC^F0 and CFC^F1, then both tensor-product and sequential composition preserve equivalence at CFC^F2. If CFC^F3 and CFC^F4, then CFC^F5 (Rodatz et al., 20 Jun 2025). A corollary states that if CFC^F6 and CFC^F7, then CFC^F8.

2. Diagrammatic operationalization with the ZX calculus

To make fault equivalence computationally tractable, "Fault Tolerance by Construction" adapts the ZX calculus so that rewrites preserve not only the noiseless linear map but also behavior under noise (Rodatz et al., 20 Jun 2025). In this setting, the fault locations of a ZX diagram are its edges, a fault is an element of CFC^F9, and applying a fault inserts the corresponding Pauli rotations on diagram edges. The basic noise model is edge-flip noise, consisting of all Paulis of weight one on diagram edges.

Detectability in ZX diagrams is expressed through Pauli webs. A Pauli web is an edge-highlighting satisfying local parity constraints at spiders; a detecting region is a Pauli web with no highlighted input or output edges. A fault is detectable if there exists a detecting region that anticommutes with it (Rodatz et al., 20 Jun 2025). The paper also gives a parity criterion: if CF1=CF2C^{F_1}=C^{F_2}0 is a detecting Pauli web, CF1=CF2C^{F_1}=C^{F_2}1 is the number of spiders it stabilizes up to CF1=CF2C^{F_1}=C^{F_2}2 global phase, and CF1=CF2C^{F_1}=C^{F_2}3 is the number of edges highlighted as CF1=CF2C^{F_1}=C^{F_2}4, then CF1=CF2C^{F_1}=C^{F_2}5 odd implies CF1=CF2C^{F_1}=C^{F_2}6.

A ZX diagram CF1=CF2C^{F_1}=C^{F_2}7 is a fault-equivalent representation of a circuit CF1=CF2C^{F_1}=C^{F_2}8 if CF1=CF2C^{F_1}=C^{F_2}9 under edge-flip noise, or a submodel thereof, is fault-equivalent to F\mathcal F0 under the original circuit noise model (Rodatz et al., 20 Jun 2025). The same work introduces fault gadgets to reproduce correlated circuit-level faults under edge-flip noise: a single edge flip in the gadget reproduces the multi-qubit correlated fault effect at output. This yields the proposition that for any quantum circuit F\mathcal F1 under any noise model F\mathcal F2, one can find a ZX diagram that is fault-equivalent under edge-flip noise.

Several important special cases do not require gadgets. Fault-free gates can be mapped fault-equivalently to ZX by idealising internal edges; single-qubit unitaries inherit this as a corollary. Fault-tolerant multi-qubit Pauli-F\mathcal F3 measurements admit a canonical ZX representation that accounts for measurement flips and single-output flips. For CNOT under circuit-level noise, many of the fifteen possible two-qubit output faults are captured directly by single edge flips, and the remaining four are captured via gadgets. Two composite fragments, CNOT followed by target F\mathcal F4-measurement and F\mathcal F5 preparation followed by CNOT, are each fault-equivalent under circuit-level noise without gadgets (Rodatz et al., 20 Jun 2025).

The restricted rewrite system contains specifically fault-equivalent rules. The paper proves fault equivalence for rewrites such as ElimF\mathcal F6, Fuse-1F\mathcal F7, Fuse-4F\mathcal F8, Fuse-F\mathcal F9PL\overline{\mathcal{P}^{|\mathcal L|}}0, Pi-CopyPL\overline{\mathcal{P}^{|\mathcal L|}}1, Phase-unfusePL\overline{\mathcal{P}^{|\mathcal L|}}2, Pi–pi identityPL\overline{\mathcal{P}^{|\mathcal L|}}3, Perfect-fusePL\overline{\mathcal{P}^{|\mathcal L|}}4, CopyPL\overline{\mathcal{P}^{|\mathcal L|}}5, and Cat-XsPL\overline{\mathcal{P}^{|\mathcal L|}}6 (Rodatz et al., 20 Jun 2025). The general proof pattern is a boundary push-out argument: if undetectable internal faults can be replaced by logically equivalent boundary faults without increasing weight, then the rewrite preserves PL\overline{\mathcal{P}^{|\mathcal L|}}7-fault equivalence.

This restricted ZX system supports a correct-by-construction workflow. The specification circuit is first translated into a fault-equivalent ZX diagram under edge-flip noise, then rewritten using only fault-equivalent rewrites until it can be extracted into an implementable circuit, and finally extracted into a circuit known to be fault-equivalent to the original specification (Rodatz et al., 20 Jun 2025). The same source notes that checking arbitrary fault equivalence is NP-hard, but the restricted rewrite system provides tractable, local, provably sound transformations.

The term also appears in several adjacent formalisms for circuit-level fault tolerance. "Quasilinear Equivalence Checking for Detector Error Models" distinguishes structural DEM equivalence from decoder-equivalence (Rennela, 12 Jun 2026). A DEM instruction PL\overline{\mathcal{P}^{|\mathcal L|}}8 denotes the Bernoulli mixture

PL\overline{\mathcal{P}^{|\mathcal L|}}9

and sequential composition is modeled by XOR-convolution, with F\langle \mathcal F\rangle0. Decoder-equivalence is equality of unrolled distributions,

F\langle \mathcal F\rangle1

whereas structural equivalence is scope-local equality of distributions on every scope of a common repeat skeleton,

F\langle \mathcal F\rangle2

The paper gives a sound, terminating, confluent rewriting system, proves unique normal forms, and derives a quasilinear normalization and equivalence-checking procedure of complexity F\langle \mathcal F\rangle3, complete for non-adaptive QEC pipelines and sound for partially-adaptive ones (Rennela, 12 Jun 2026).

"Completeness for Fault Equivalence of Clifford ZX Diagrams" develops a more explicit preorder language of fault boundedness and fault equivalence for Clifford ZX diagrams (Rüsch et al., 9 Oct 2025). It models a fault as an element of F\langle \mathcal F\rangle4 placed on edges, regards a fault as detected when the faulty diagram equals zero, and defines

F\langle \mathcal F\rangle5

by symmetric F\langle \mathcal F\rangle6-fault-boundedness. The paper introduces fault gadgets that separate a diagram into a fully idealized semantic part and a noisy gadget layer, proves a unique normal form under noise, and shows that a proposed ZX rewrite system is sound and complete for fault equivalence of Clifford ZX diagrams (Rüsch et al., 9 Oct 2025).

A homological version appears in "Fault-tolerant transformations of spacetime codes" (Pesah et al., 11 Sep 2025). There, a spacetime code is represented by a chain complex

F\langle \mathcal F\rangle7

with fault distance

F\langle \mathcal F\rangle8

and minimum-weight decoding

F\langle \mathcal F\rangle9

Two spacetime complexes are fault-equivalent if there exist fault-tolerant maps in both directions that are weak quasi-isomorphisms and preserve the number of encoded qubits, the fault distance, and the minimum-weight decoding problem (Pesah et al., 11 Sep 2025). The same framework proves that local transformations called Rule A and Rule B are fault-tolerant maps and that Clifford circuits can be transformed into measurement-based protocols with the same fault-tolerant properties.

The older ZX-based unification in "Unifying flavors of fault tolerance with the ZX calculus" makes the same theme explicit at the level of stabilizer structure (Bombin et al., 2023). In that paper, Pauli faults differing by stabilizers are in the same syndrome and logical class, and local ZX transformations map circuit-based, measurement-based, fusion-based, and Floquet surface-code schemes to a common stabilizer backbone while preserving the internal Pauli-web checks, logical correlator webs, and decoder-relevant syndrome connectivity (Bombin et al., 2023). This suggests that fault equivalence functions as a circuit-level invariant across several otherwise different descriptions of stabilizer fault tolerance.

4. Role in synthesis, verification, and optimization

Within the correct-by-construction framework of (Rodatz et al., 20 Jun 2025), many design tasks become equivalence-search problems. State preparation and syndrome extraction are presented as finding an implementable circuit that is fault-equivalent to an idealised specification. Because each compilation step preserves fault equivalence, distance and correctability are preserved by compositionality and the distance corollary.

Cat-state preparation is a central example. The paper defines fault-tolerant cat-state preparation by requiring a preparation circuit wt(F)\mathrm{wt}(F)0 to satisfy

wt(F)\mathrm{wt}(F)1

For the four-qubit case, it proves a fault-tolerant construction using a flag entangled with the first and last qubits and measured afterward, built entirely from fault-equivalent rewrites and from composite fragments already known to be fault-equivalent under circuit-level noise (Rodatz et al., 20 Jun 2025). The paper also gives a recursive construction of a fault-tolerant wt(F)\mathrm{wt}(F)2-legged cat state from two fault-tolerant wt(F)\mathrm{wt}(F)3-legged cat states via transversal, fault-tolerant wt(F)\mathrm{wt}(F)4 parity measurements, and a wt(F)\mathrm{wt}(F)5-fault-efficient variant that uses only wt(F)\mathrm{wt}(F)6 such parity checks, reducing CNOTs and measurements to wt(F)\mathrm{wt}(F)7 and wt(F)\mathrm{wt}(F)8, respectively.

Shor-style syndrome extraction is treated in two layers. First, repeating a schedule of imperfect but fault-tolerant stabilizer measurements wt(F)\mathrm{wt}(F)9 times is shown to F\mathcal F0-fault-equivalently implement syndrome extraction. Second, Shor-style measurement itself is proved fault-tolerant by a ZX derivation built from fault-equivalent Pauli-measurement mappings and fault-equivalent building blocks such as CNOT-plus-measurement and CNOT-plus-state (Rodatz et al., 20 Jun 2025). The same paper derives an optimized Shor-style measurement that halves ancillary qubits and measurements by using an F\mathcal F1-like linear map implemented with two bare F\mathcal F2 measurements and conditional corrections, as well as a teleportation-like syndrome-measurement circuit that remains fault-equivalent.

For Steane-style syndrome extraction on CSS codes, the paper proves that Steane extraction is fault-equivalent to ideal perfect measurements when the ancilla logical state is encoded, coupled transversally to the data, and measured (Rodatz et al., 20 Jun 2025). It then describes an optimization obtained by bending half the legs of the ZX diagram, yielding a “F\mathcal F3-like” linear map that can be implemented fault-tolerantly. For the F\mathcal F4 Steane code, the resulting circuit can be prepared F\mathcal F5-fault-tolerantly and reduces the ancilla count from eight to five, CNOTs from eighteen to fifteen, and measurements from eight to five (Rodatz et al., 20 Jun 2025).

The same source reports performance evaluation with Stim. For a single syndrome-extraction cycle with F\mathcal F6 and F\mathcal F7, the optimized five-ancilla Steane-style extraction shows consistently lower logical error probability F\mathcal F8 than the standard eight-ancilla circuit, with similar asymptotic scaling, as predicted by fault equivalence preserving distance (Rodatz et al., 20 Jun 2025). For multiple cycles under F\mathcal F9 and FF00, the optimized circuit continues to outperform the standard across cycles.

5. Other domain-specific meanings of fault equivalence

In holonomic quantum computation, "A Fault-Tolerant Scheme of Holonomic Quantum Computation on Stabilizer Codes with Robustness to Low-weight Thermal Noise" establishes an equivalence relation between fault-tolerant encoded circuits for a stabilizer code and fault-tolerant adiabatic processes (Zheng et al., 2013). Starting from a fault-tolerant encoded circuit

FF01

the paper constructs an adiabatic path FF02 by deforming stabilizers segment by segment. The induced non-Abelian holonomy on the ground space equals the encoded circuit,

FF03

and low-weight Pauli faults occurring during the evolution remain correctable at the cycle end. The framework also assumes a constant spectral gap FF04 and states that low-weight thermal excitations are suppressed as FF05 (Zheng et al., 2013).

In power systems, "Scalable Neural Dynamic Equivalence for Power Systems" uses the term in a closed-loop dynamical sense (Shen et al., 2023). There, a learned external system is fault-equivalent when it preserves the system responses, specifically boundary voltages and tie currents, to faults applied at boundary buses or inside the internal system. The external subsystem is replaced by a neural ODE trained in closed loop with a physics-based internal DAE so that the integrated dynamics match the full-model trajectories during and after faults. DP-NeuDyE reduces inputs further by learning only the continuous tie-current components driven by boundary voltages, and the paper states that DP-NeuDyE uses only FF06 of the inputs required by PI-NeuDyE (Shen et al., 2023).

In system identification and diagnosis, "Output behavior equivalence and simultaneous subspace identification of systems and faults" defines equivalence of fault models through identical output behavior sets (Gleizer, 19 May 2025). For the residual system with Rosenbrock matrix

FF07

the output behavior is

FF08

Two systems are output behavior equivalent if they generate exactly the same set of residual trajectories. A finite-horizon theorem states that if two systems of order FF09 satisfy FF10, then they are output behavior equivalent on all horizons (Gleizer, 19 May 2025). The same paper identifies the full equivalence class of minimal-dimension fault matrices as

FF11

In elasticity, "Paradox of Modeling Curved Faults Revisited with General Non-Hypersingular Stress Green's Functions" uses equivalence in a geometric-discretization sense (Sato et al., 2019). The corrected non-hypersingular stress Green’s functions show that a smooth curved fault and its infinitesimally segmented set of flat patches are equivalent. For a structured mesh with midpoint interpolation of slip, the discretized flat-element representation converges to the smooth-fault stress with error FF12 off-fault and FF13 on-fault (Sato et al., 2019). This resolves the earlier paradox in which previous curved-fault kernels predicted zero stress for constant shear slip on a smooth curve while fine flat-element discretizations produced nonzero stress.

6. Computational status, assumptions, and conceptual scope

Across the quantum-circuit literature, fault equivalence is computationally nontrivial. "Fault Tolerance by Construction" proves that checking whether two quantum circuits are fault-equivalent is NP-hard (Rodatz et al., 20 Jun 2025). Its tractable component is therefore local: fault-equivalent representations, sound rewrite rules, and extraction procedures that avoid global equivalence checking. The Clifford ZX completeness result of (Rüsch et al., 9 Oct 2025) goes further by supplying a unique normal form under noise, but it remains restricted to Clifford ZX diagrams and Pauli fault models.

The scope of the construction in (Rodatz et al., 20 Jun 2025) is largely stabilizer/CSS codes and Clifford circuits. The same work lists as limitations the use of worst-case adversarial noise, the absence of probabilities, the NP-hardness of general checking, the primary focus on Clifford circuits and stabilizer/CSS codes, and the open question of preserving efficient decodability when detecting regions change under rewrites (Rodatz et al., 20 Jun 2025). Future directions identified there include extending the framework to stochastic noise, average-case performance, multi-block gadgets, and hardware-aware routing.

The DEM equivalence framework is broader in one computational direction and narrower in another. It provides a quasilinear static decision procedure with rigorous correctness guarantees and is complete for non-adaptive QEC pipelines under the paper’s assumptions of independent Bernoulli fault channels, FF14, skeleton compatibility, and detector and observable separation (Rennela, 12 Jun 2026). For partially-adaptive circuits it remains sound and applicable, but conservative. By contrast, the chain-complex framework of (Pesah et al., 11 Sep 2025) preserves distance and minimum-weight decoding under explicit weak chain maps, which is especially suitable for transformations between circuit spacetime codes and measurement-based protocols.

These various meanings are not identical. In quantum-circuit compilation, fault equivalence preserves the effect and weight of undetectable faults; in DEMs it can mean scope-local equality of probabilistic detector semantics; in output-behavior identification it means equality of residual trajectory sets; in dynamic equivalencing for power systems it means preservation of disturbance responses at the interface; and in elasticity it means compatibility between smooth and discretized geometric descriptions (Rodatz et al., 20 Jun 2025, Rennela, 12 Jun 2026, Gleizer, 19 May 2025, Shen et al., 2023, Sato et al., 2019). This suggests that the shared conceptual core is invariance of fault-relevant observables under a change of representation, while the preserved observable itself depends on the domain: logical action, syndrome distribution, decoder instance, boundary current-voltage response, or stress field.

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