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EmuPlat: Quantum Hardware Emulation

Updated 12 July 2026
  • EmuPlat is a framework-agnostic quantum hardware emulation platform that bridges high-level quantum programming frameworks with superconducting transmon pulse control systems.
  • It unifies circuit ingestion, native-gate reduction, connectivity-aware compilation, and pulse scheduling into an interoperable workflow validated by TransformationValidator methods.
  • EmuPlat extends its role from hardware emulation to solver-controlled open-system analysis, supporting HEOM-based studies with high-fidelity quantum simulation results.

Searching arXiv for "EmuPlat" and closely related records to ground the article in the cited literature. arXiv_search.query({"search_query":"all:EmuPlat OR ti:EmuPlat", "max_results": 10, "sort_by": "submittedDate", "sort_order": "descending"}) EmuPlat is a framework-agnostic quantum hardware emulation platform for superconducting transmon systems that bridges high-level quantum programming frameworks and hardware-specific pulse control through a validated transpiler-to-pulse pipeline and a modular simulation layer (Ye et al., 16 Sep 2025). Its distinguishing premise is that circuit ingestion, native-gate reduction, connectivity-aware compilation, pulse scheduling, and open-system dynamics should be treated as a single interoperable stack rather than as isolated software layers. In later work, the same platform was used as the compiled-control front end for non-Markovian studies in which instruction-set-architecture-level waveform generation was coupled to hierarchical equations of motion (HEOM) under $1/f$ pure dephasing, extending its role from hardware emulation to solver-controlled open-system analysis (Ye, 31 Mar 2026).

1. Definition, scope, and nomenclature

EmuPlat was introduced as a platform that addresses the interoperability gap between high-level quantum programming frameworks and hardware-specific pulse control systems (Ye et al., 16 Sep 2025). The explicit target is heterogeneous quantum software practice: circuits may originate in CUDA-Q, Qiskit, or Qibolab-related environments, while pulse-level emulation and noisy dynamics require a distinct layer of hardware modeling and numerical simulation. EmuPlat formalizes that bridge through a complete transpiler-compiler path and a back-end abstraction for simulation engines.

Within the literature surveyed here, the explicit name EmuPlat belongs to this quantum hardware emulation framework and to follow-on work that uses it for compiled-control studies (Ye et al., 16 Sep 2025). By contrast, earlier and unrelated systems are emulation platforms in a generic sense rather than instances of the named framework. A 2007 human-computer interaction platform implemented a multimodal Wizard-of-Oz environment for embodied conversational agents, but the paper does not explicitly use the name “EmuPlat” (0708.3740). Likewise, emucxl for CXL-based disaggregated memory, a Rust-based state-vector emulator, Pasqal’s neutral-atom backends, and 21cmEMU/21cmEMUv3 are separate domain-specific emulator frameworks rather than the same system (Gond et al., 2024, Luchnikov et al., 2022, Bidzhiev et al., 10 Oct 2025, Breitman et al., 2023, Breitman et al., 29 May 2026). This suggests that “EmuPlat” is best understood as a specific quantum platform embedded within a broader research pattern of layered emulation infrastructures.

2. Architectural organization

EmuPlat adopts a clean architecture with strict dependency inversion and five layers: Core, Domain, Application, Infrastructure, and Config (Ye et al., 16 Sep 2025). The Core layer defines abstract interfaces and system-wide contracts, including front-end adapters, transpiler passes, compiler interfaces, and simulation-engine interfaces. The Domain layer contains the quantum physics models and compilation semantics, including transmon Hamiltonians, Lindblad noise operators, and the rules for decomposition, virtual-ZZ handling, routing, and scheduling. The Application layer orchestrates use cases. The Infrastructure layer implements concrete integrations such as parsing, Qibo/Qibolab integration, and the QuTiP backend. The Config layer manages runtime selection of engines, device parameter sets, and routing strategies.

A central architectural mechanism is a novel adapter pattern. Front-end adapters translate external circuit representations into EmuPlat’s internal circuit representation, while engine adapters translate pulse schedules and hardware models into concrete dynamical solvers (Ye et al., 16 Sep 2025). In the current implementation, QuTiP is the primary backend, but the abstraction is explicitly designed so that other engines can be plugged in without changing the front-end or the transpiler-compiler logic.

This layered arrangement is not merely a software-engineering convenience. A plausible implication is that EmuPlat treats compilation artifacts as first-class scientific objects: native gates, virtual phase frames, pulse envelopes, and solver inputs all remain inspectable and comparable across stages. That design choice becomes especially significant in later HEOM-based work, where the same compiled waveform can be passed to Lindblad and HEOM solvers within the same run so that solver comparisons share identical inputs (Ye, 31 Mar 2026).

3. Validated transpiler-to-pulse pipeline

The core transformation path in EmuPlat is a four-stage validated pipeline:

Quantum ProgramCircuitNative GatesPulsesSimulated Results.\text{Quantum Program} \to \text{Circuit} \to \text{Native Gates} \to \text{Pulses} \to \text{Simulated Results}.

The four validated stages are: (1) recursive gate decomposition to a minimal native set, (2) virtual ZZ optimization implementing phase tracking without physical pulses, (3) connectivity-aware routing with automated SWAP insertion, and (4) deterministic pulse compilation respecting hardware timing constraints (Ye et al., 16 Sep 2025).

The native gate set is

Gnative={I,Z,RZ(θ),GPI2(ϕ),CZ,M}.\mathcal{G}_{\text{native}} = \{I, Z, RZ(\theta), \mathrm{GPI2}(\phi), CZ, M\}.

Here II is identity, ZZ and RZ(θ)RZ(\theta) are ZZ-axis operations, GPI2(ϕ)\mathrm{GPI2}(\phi) is a generalized ZZ0 equatorial rotation, ZZ1 is the entangling gate, and ZZ2 is measurement (Ye et al., 16 Sep 2025). Representative decomposition rules are explicitly given. A Hadamard becomes

ZZ3

an ZZ4 gate becomes

ZZ5

and

ZZ6

Virtual-ZZ7 optimization is implemented as phase tracking. Instead of compiling a physical ZZ8-pulse, EmuPlat updates a stored phase offset ZZ9 for qubit Quantum ProgramCircuitNative GatesPulsesSimulated Results.\text{Quantum Program} \to \text{Circuit} \to \text{Native Gates} \to \text{Pulses} \to \text{Simulated Results}.0, and a subsequent drive pulse with phase Quantum ProgramCircuitNative GatesPulsesSimulated Results.\text{Quantum Program} \to \text{Circuit} \to \text{Native Gates} \to \text{Pulses} \to \text{Simulated Results}.1 is realized with phase Quantum ProgramCircuitNative GatesPulsesSimulated Results.\text{Quantum Program} \to \text{Circuit} \to \text{Native Gates} \to \text{Pulses} \to \text{Simulated Results}.2 (Ye et al., 16 Sep 2025). The paper reports a 30–50% pulse count reduction due to this optimization. Because Quantum ProgramCircuitNative GatesPulsesSimulated Results.\text{Quantum Program} \to \text{Circuit} \to \text{Native Gates} \to \text{Pulses} \to \text{Simulated Results}.3 operations become zero-duration frame changes, the platform can maintain unitary equivalence while materially shortening scheduled pulse programs.

Routing is connectivity-aware. Logical qubits are placed onto a hardware coupling graph, and two-qubit operations are routed using ShortestPaths or Sabre strategies with SWAP insertion when needed (Ye et al., 16 Sep 2025). The pipeline uses Qibo’s transpilation machinery as a baseline but extends it with hardware-aware decomposition and scheduling semantics. A deterministic compiler then maps native gates to calibrated pulses and assigns explicit durations and channels. Quantum ProgramCircuitNative GatesPulsesSimulated Results.\text{Quantum Program} \to \text{Circuit} \to \text{Native Gates} \to \text{Pulses} \to \text{Simulated Results}.4 compiles to a 40 ns DrivePulse, Quantum ProgramCircuitNative GatesPulsesSimulated Results.\text{Quantum Program} \to \text{Circuit} \to \text{Native Gates} \to \text{Pulses} \to \text{Simulated Results}.5 to a 96 ns parametric pulse, Quantum ProgramCircuitNative GatesPulsesSimulated Results.\text{Quantum Program} \to \text{Circuit} \to \text{Native Gates} \to \text{Pulses} \to \text{Simulated Results}.6 to a 1000 ns ReadoutPulse, and Quantum ProgramCircuitNative GatesPulsesSimulated Results.\text{Quantum Program} \to \text{Circuit} \to \text{Native Gates} \to \text{Pulses} \to \text{Simulated Results}.7 remain zero-duration VirtualZ operations (Ye et al., 16 Sep 2025).

4. Hardware model and dynamical simulation

EmuPlat’s current hardware focus is superconducting transmon architectures with multi-level dynamics and calibrated open-system noise (Ye et al., 16 Sep 2025). The transmon Hamiltonian is

Quantum ProgramCircuitNative GatesPulsesSimulated Results.\text{Quantum Program} \to \text{Circuit} \to \text{Native Gates} \to \text{Pulses} \to \text{Simulated Results}.8

where Quantum ProgramCircuitNative GatesPulsesSimulated Results.\text{Quantum Program} \to \text{Circuit} \to \text{Native Gates} \to \text{Pulses} \to \text{Simulated Results}.9 and ZZ0 are oscillator ladder operators, ZZ1 are qubit frequencies, ZZ2 are anharmonicities, and ZZ3 are couplings (Ye et al., 16 Sep 2025). Pulse compilation supplies the control fields ZZ4 in a time-dependent Hamiltonian of the form

ZZ5

Noisy dynamics are modeled with the Lindblad master equation

ZZ6

with amplitude damping and dephasing channels derived from calibrated coherence parameters (Ye et al., 16 Sep 2025). The implementation uses adaptive Runge–Kutta with absolute tolerance ZZ7 and a 0.01 ns time step. Because the physical transmon model is multi-level, the evolved state is projected back to the computational subspace when circuit-level fidelities and measurement statistics are evaluated.

The reference devices used for validation are Anyon Technologies superconducting processors, including anyon_2q_CZ and anyon_4q_CZ, with ZZ8, ZZ9, 40 ns single-qubit GPI2 gates, 96 ns Gnative={I,Z,RZ(θ),GPI2(ϕ),CZ,M}.\mathcal{G}_{\text{native}} = \{I, Z, RZ(\theta), \mathrm{GPI2}(\phi), CZ, M\}.0 gates, and 1000 ns measurement pulses (Ye et al., 16 Sep 2025). These hardware-calibrated parameters directly determine both Lindblad rates and pulse scheduling constraints.

5. Validation and benchmark behavior

Validation is structured around a TransformationValidator that performs stage-by-stage verification of circuit equivalence, pulse-sequence legality, simulated evolution, and final-state fidelity (Ye et al., 16 Sep 2025). This validator compares high-level circuits to transpiled native circuits, checks that pulse schedules respect the gate-mapping and timing rules, and evaluates output states with the Uhlmann fidelity

Gnative={I,Z,RZ(θ),GPI2(ϕ),CZ,M}.\mathcal{G}_{\text{native}} = \{I, Z, RZ(\theta), \mathrm{GPI2}(\phi), CZ, M\}.1

The canonical Bell-state benchmark uses a 2-qubit Anyon device and begins from the standard Gnative={I,Z,RZ(θ),GPI2(ϕ),CZ,M}.\mathcal{G}_{\text{native}} = \{I, Z, RZ(\theta), \mathrm{GPI2}(\phi), CZ, M\}.2 plus CNOT construction. After native decomposition and phase tracking, the pulse sequence comprises GPI2 drives, a Gnative={I,Z,RZ(θ),GPI2(ϕ),CZ,M}.\mathcal{G}_{\text{native}} = \{I, Z, RZ(\theta), \mathrm{GPI2}(\phi), CZ, M\}.3 parametric pulse, an idle interval, and simultaneous readout, for a total sequence duration of 1272 ns (Ye et al., 16 Sep 2025). The final Bell-state fidelity is reported as 99.958%, with synthetic measurement statistics of 51.4% for Gnative={I,Z,RZ(θ),GPI2(ϕ),CZ,M}.\mathcal{G}_{\text{native}} = \{I, Z, RZ(\theta), \mathrm{GPI2}(\phi), CZ, M\}.4, 46.8% for Gnative={I,Z,RZ(θ),GPI2(ϕ),CZ,M}.\mathcal{G}_{\text{native}} = \{I, Z, RZ(\theta), \mathrm{GPI2}(\phi), CZ, M\}.5, and 1.8% total for Gnative={I,Z,RZ(θ),GPI2(ϕ),CZ,M}.\mathcal{G}_{\text{native}} = \{I, Z, RZ(\theta), \mathrm{GPI2}(\phi), CZ, M\}.6. These values are presented as evidence that the end-to-end pipeline preserves the intended computation while reproducing decoherence-induced imperfections.

Quantum Fourier Transform (QFT) benchmarks probe scaling and phase sensitivity. The 2-qubit QFT uses 10 drive pulses, has a 624 ns gate execution time, and is simulated over 62,500 time points in a 9-dimensional Hilbert space (Ye et al., 16 Sep 2025). The 4-qubit QFT uses 76 drive pulses40 GPI2 pulses and 36 Gnative={I,Z,RZ(θ),GPI2(ϕ),CZ,M}.\mathcal{G}_{\text{native}} = \{I, Z, RZ(\theta), \mathrm{GPI2}(\phi), CZ, M\}.7 pulses—with a 3328 ns gate execution time and 332,900 time points in an 81-dimensional Hilbert space. The reported increase is described as 5.33×, consistent with Gnative={I,Z,RZ(θ),GPI2(ϕ),CZ,M}.\mathcal{G}_{\text{native}} = \{I, Z, RZ(\theta), \mathrm{GPI2}(\phi), CZ, M\}.8 gate complexity. For the Anyon connectivity used, the QFT is implemented without SWAPs, which underscores the interaction between routing, topology, and pulse-count management.

A plausible implication is that EmuPlat’s principal validation claim is not only numerical accuracy at the solver stage, but reproducibility of the entire chain from framework-level input to pulse-level output. The paper characterizes the implementation as production-ready and emphasizes end-to-end testing with TransformationValidator (Ye et al., 16 Sep 2025).

6. Compiled-control HEOM studies

A later single-qubit study uses EmuPlat as the front-end machinery that takes gate-level control through compilation and waveform generation and then feeds the resulting envelopes into either Lindblad or HEOM solvers under a calibrated Gnative={I,Z,RZ(θ),GPI2(ϕ),CZ,M}.\mathcal{G}_{\text{native}} = \{I, Z, RZ(\theta), \mathrm{GPI2}(\phi), CZ, M\}.9 pure-dephasing bath (Ye, 31 Mar 2026). In that study, EmuPlat carries a pulse specification through four successive representation stages, from gate-level definition to time-domain waveform, and supports two waveform routes from a common PulseSequence: a Standard route using analytic envelopes in float64 and a VPPU route emulating QubiC-style hardware effects such as amplitude encoding, phase accumulation, FPGA timing quantization, zero-order-hold upsampling, and DAC quantization.

The system is a three-level superconducting transmon in the rotating frame with

II0

where II1 and II2, driven by

II3

The bath spectral density is

II4

with a pure-dephasing coupling operator

II5

Bath correlations are expanded as

II6

and propagated with QuTiP 5’s HEOMSolver (Ye, 31 Mar 2026).

This setup yields several specific findings. Under Y-CPMG, EmuPlat-enabled HEOM simulations show axis-dependent scaling-law breakdown: non-monotonic decoherence, partial coherence revival, and pronounced X–Y population asymmetry with mean imbalance 0.204 under Y-CPMG versus II7 under X-CPMG (Ye, 31 Mar 2026). Under X-CPMG, scaling remains well behaved with a power-law exponent of approximately 1.117 in Tier-0, alongside a finite-II8 transient excess interpreted as a bath-memory effect. The study also identifies a structural null: Standard and VPPU waveform realizations remain effectively indistinguishable in scaling observables across coupling strengths, with reported exponent differences of II9 for X-CPMG and ZZ0 for XY-4. The paper attributes this waveform insensitivity to rotating-frame pure-dephasing coupling, which renders control-layer detail invisible to the chosen scaling observables.

Another key result is the failure of perturbative filter-function theory in this regime. Using the same compiled control profiles, EmuPlat constructs the toggling-frame transfer function

ZZ1

and compares first-order filter-function predictions to HEOM. The reported absolute discrepancy reaches more than 12 orders of magnitude at the Ramsey reference point, while certain structural scaling trends remain approximately preserved (Ye, 31 Mar 2026). In this usage, EmuPlat functions less as a general emulation environment and more as a controlled interface between realistic compiled waveforms and solver-comparable non-Markovian dynamics.

7. Broader context, limitations, and significance

Within quantum computing, EmuPlat occupies a middle layer that many existing tools leave fragmented: high-level frameworks handle circuit construction, hardware stacks handle control, and open-system libraries handle dynamics, but few systems validate the complete transformation from one end to the other (Ye et al., 16 Sep 2025). This is why the platform is explicitly presented as infrastructure for hybrid quantum-classical algorithm development and hardware-software co-design rather than as a standalone simulator.

The present scope remains bounded. In its published form, EmuPlat is centered on superconducting transmon architectures, currently uses QuTiP as the main simulation backend, and is most naturally suited to relatively small systems under full density-matrix simulation (Ye et al., 16 Sep 2025). In the HEOM study, the scope narrows further to a single qutrit, a rotating-frame/RWA description, a diagonal pure-dephasing coupling ZZ2, and a specific ZZ3 spectral density with finite cutoffs (Ye, 31 Mar 2026). The later paper also notes a single-solver HEOM implementation and nontrivial hierarchy cost, which confines studies to short pulse sequences and limited system sizes.

In a broader emulation literature, related systems pursue analogous goals in other domains: a Windows-based Wizard-of-Oz platform for embodied conversational agents with synchronized recording and replay (0708.3740); emucxl as a virtual-appliance-plus-user-space API for CXL-based disaggregated memory (Gond et al., 2024); a Rust/OpenQASM 2.0 state-vector emulator for gate-based quantum circuits (Luchnikov et al., 2022); Pasqal’s emu-sv and emu-mps backends for neutral-atom arrays (Bidzhiev et al., 10 Oct 2025); and 21cmEMU/21cmEMUv3 as surrogate emulators of 21cmFAST summary observables for cosmic-dawn and epoch-of-reionization inference (Breitman et al., 2023, Breitman et al., 29 May 2026). This comparison does not collapse these systems into one lineage, but it clarifies EmuPlat’s place within a recurring computational pattern: a reusable platform that standardizes translation between an expressive front end and a physics-faithful or hardware-faithful back end.

Taken in that sense, EmuPlat’s main contribution is methodological. It makes transpilation, pulse compilation, and solver selection scientifically auditable components of one workflow, and it demonstrates that this unification can serve both conventional noisy-circuit emulation and non-perturbative open-system studies (Ye et al., 16 Sep 2025, Ye, 31 Mar 2026).

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