Dyadic Phase Fixing in Quantum Compilation
- Dyadic Phase Fixing (DPF) is a method that fixes quantum rotation angles to dyadic values to enable more efficient fault-tolerant synthesis.
- It employs greedy multi-qubit resynthesis with numerical reoptimization and phase kickback to reduce resource-intensive T gate usage.
- A catalyst-based variant implements exact dyadic rotations by reusing logical catalyst states, trading increased ancilla overhead for constant online depth.
Searching arXiv for the specified papers and closely related work to ground the article. {"query":"id:(Kalloor et al., 3 Jun 2026) OR id:(Xu et al., 25 Jun 2026)", "max_results": 10} I found the two focal papers on arXiv and verified their metadata:
- "Multi-Qubit Dyadic Phase Fixing for Fault-Tolerant Quantum Compilation" (Kalloor et al., 3 Jun 2026)
- "Cultivating logical catalysts for fault-tolerant dyadic phase rotations" (Xu et al., 25 Jun 2026)
I’ll use these as the primary sources for the encyclopedia entry, with terminology and claims constrained to the supplied data. Dyadic Phase Fixing (DPF) names two closely related developments in fault-tolerant quantum computing. In quantum compilation, it denotes a general multi-qubit synthesis routine that greedily fixes selected parameters to dyadic values of the form , numerically reoptimizes the remaining parameters, and then implements the fixed rotations by phase kickback (Kalloor et al., 3 Jun 2026). In fault-tolerant gate construction, the same basic objective appears in a more specialized form: exact implementation of fixed fine dyadic phases by cultivating reusable logical catalyst states that are eigenstates of high-period Clifford circuits and invoking them through controlled- phase kickback (Xu et al., 25 Jun 2026). The unifying theme is to replace repeated approximate non-Clifford synthesis with dyadic-phase structure that can be exploited exactly or more cheaply, subject to nontrivial tradeoffs in ancillas, serialization, catalyst size, and hardware mapping.
1. Problem setting and conceptual scope
Fault-tolerant quantum computation in the setting considered is organized around the Clifford+ gate set, where Clifford gates are comparatively easy to realize and gates dominate resource cost because they typically require magic-state cultivation or distillation, injection, and correction (Kalloor et al., 3 Jun 2026). Application circuits, however, are usually expressed with continuous-parameter gates such as , , and , so arbitrary rotations must be approximated in a discrete logical basis, usually with cost scaling like for target precision 0 (Kalloor et al., 3 Jun 2026).
DPF addresses a special regime in which dyadic-angle structure can be exploited. The compiler-oriented formulation targets rotations
1
for which phase kickback can be dramatically cheaper in 2-count than independent ancilla-free synthesis (Kalloor et al., 3 Jun 2026). The fault-tolerant catalyst formulation isolates the fixed-phase family
3
so that 4, 5, and more generally a fine dyadic phase rotation is 6 (Xu et al., 25 Jun 2026).
The two formulations differ in scope. The compiler formulation is approximate overall: it rewrites general multi-qubit circuit blocks under a prescribed error budget, fixes some angles to dyadic values, and leaves the remaining arbitrary rotations to conventional synthesis (Kalloor et al., 3 Jun 2026). The catalyst formulation is exact for the target dyadic phase once the phase-specific logical resource has been cultivated: the online invocation introduces no synthesis approximation error and makes the online non-Clifford depth independent of the target logical accuracy (Xu et al., 25 Jun 2026). This suggests that DPF is best viewed not as a single algorithm but as a design principle for converting dyadic phase structure into fault-tolerant advantage.
2. Compiler-level DPF as greedy multi-qubit resynthesis
The compiler introduced in "Multi-Qubit Dyadic Phase Fixing for Fault-Tolerant Quantum Compilation" (Kalloor et al., 3 Jun 2026) proceeds in three stages. First, an input logical circuit in any gate set is retargeted to blocks containing Clifford gates and continuous 7 gates, using non-overlapping partitions of width 8, with 9 in the reported experiments. Second, DPF is applied blockwise. Third, the resulting circuit is decomposed into Clifford+0 using phase kickback for fixed dyadic rotations and \texttt{gridsynth} for the remaining non-dyadic rotations.
The key operation is “fixing” a phase. Given a candidate block 1 and block error budget 2, DPF maintains a set of accepted candidates 3 and target unitary 4. It then iterates over dyadic granularities
5
For each candidate circuit 6, it collects the currently unfixed 7 angles and chooses the pair minimizing
8
The selected gate is replaced by 9, the remaining continuous parameters are numerically reoptimized against the original target unitary, and the candidate is accepted only if the Hilbert-Schmidt-distance test remains within 0 (Kalloor et al., 3 Jun 2026).
This is a greedy, heuristic approximate-synthesis strategy rather than an exhaustive search. What is optimized locally is proximity to a dyadic angle; preservation of the block unitary is enforced afterward by numerical reoptimization and acceptance testing. The outcome is operationally a decomposition into many dyadic-angle 1 rotations, a smaller residual set of arbitrary-angle 2 rotations, and the inherited Clifford structure of the block. The paper explicitly notes that DPF may miss better dyadic rewritings and does not provide formal optimality guarantees for the greedy extraction (Kalloor et al., 3 Jun 2026).
Error management is blockwise. If the circuit is divided into 3 blocks, each receives error budget 4, and the full algorithm error satisfies
5
Residual arbitrary-angle 6 gates are finally synthesized with \texttt{gridsynth} to precision 7, where 8 is the number of remaining arbitrary-angle rotations (Kalloor et al., 3 Jun 2026).
3. Phase-kickback infrastructure, decision logic, and ancilla tradeoffs
The compilation framework uses phase kickback through a phase gradient register, prepared following Sanders et al., together with constant-adder circuits from Gidney’s construction (Kalloor et al., 3 Jun 2026). For dyadic approximation at denominator scale 9, the adder cost scales roughly as 0 1 gates, and the ancilla requirement is substantial: 2 qubits for the phase gradient register and 3 scratch qubits for the optimal adder, for total ancilla overhead 4 (Kalloor et al., 3 Jun 2026).
A central implementation choice is to use a single shared phase kickback register of width 5 across the recomposed circuit. This prevents ancilla blow-up when many independently synthesized blocks are recombined, but it also serializes the phase-kickback subcircuits (Kalloor et al., 3 Jun 2026). That serialization becomes important at the architecture level because it can degrade depth parallelism even when logical 6-count improves.
The compiler therefore uses a three-variable decision matrix parameterized by phase gradient register size 7, the number of fixed 8 gates that would use that 9, and the per-gate approximation error. It compares the exact \texttt{gridsynth} 0-count model against a phase-kickback model consisting of phase gradient state preparation plus Gidney-adder cost, sweeps over 1, and chooses 2 that minimizes predicted total 3-count (Kalloor et al., 3 Jun 2026). If no register size yields benefit, the workflow falls back entirely to \texttt{gridsynth}. The paper states this as a practical guarantee: in terms of 4-count, the compiler will never do worse than the baseline \texttt{gridsynth} approach (Kalloor et al., 3 Jun 2026).
This logic sharply distinguishes DPF from naive phase kickback. The paper reports that naive phase kickback is generally 5 to 6 worse than default synthesis except on QFT, because directly approximating arbitrary rotations by dyadic angles often requires large 7, which increases register, adder, and ancilla cost (Kalloor et al., 3 Jun 2026). DPF’s contribution is therefore not merely to apply phase kickback, but to use multi-qubit numerical resynthesis to create more phase-kickback-friendly circuit structure.
4. Reported performance and architecture-level evaluation
The benchmark suite for the compiler formulation spans quantum subroutines, chemistry, physics simulation, optimization, and quantum machine learning, with circuit sizes ranging from 8 to 9 qubits and algorithmic error thresholds 0 and 1 (Kalloor et al., 3 Jun 2026). Preprocessing uses PyTKet Full Peephole Optimization, followed by BQSKit-FT-based compilation and then DPF.
The headline synthesis results are up to 2 reduction in 3-count compared to \texttt{gridsynth} and up to 4 compared to Repeat-Until-Success synthesis (Kalloor et al., 3 Jun 2026). The largest gains are reported for Hamiltonian simulation, QFT, QAE, QAOA, and QPE, where partitions tend to contain enough 5 rotations that DPF can fix many angles to dyadic values and amortize phase-kickback startup cost. At the same time, the method is not uniformly beneficial: KNN is identified as a case with little or no benefit because DPF could not extract enough dyadic angles to justify phase kickback (Kalloor et al., 3 Jun 2026).
The paper also maps compiled circuits to a surface-code architecture using lattice surgery and evaluates space-time volume,
6
under two Pauli-basis compilation strategies: Lightweight Pauli Basis Computation (LPBC) and Heavyweight Pauli Basis Computation (HPBC) (Kalloor et al., 3 Jun 2026). The reported improvement reaches up to 7 in space-time volume, with QAE-81q under HPBC improving from 8 to 9 and Ising-420q improving from 0 to 1 under LPBC/HPBC. Other strong HPBC improvements include QFT-40q from 2 to 3, LGT-380q from 4 to 5, and Neutrino-18q from 6 to 7 (Kalloor et al., 3 Jun 2026).
The same evaluation also shows substantial regressions. QAE-81q under LPBC worsens from 8 to 9; QPE-14q worsens from 0 to 1 under LPBC and from 2 to 3 under HPBC; QAOA-148q under HPBC worsens from 4 to 5; and Heisenberg-225q under HPBC worsens from 6 to 7 (Kalloor et al., 3 Jun 2026). The paper’s central interpretation is that 8-count is a useful but incomplete proxy for fault-tolerant program cost. Phase kickback can reduce logical non-Clifford count while increasing ancillas, adder CNOTs, serialization through the shared phase gradient register, and routing contention. Under LPBC, adder CNOTs often remain explicit sequential operations; under HPBC, the same Clifford-heavy adders may be absorbed into larger Pauli-product measurements, reducing the depth penalty (Kalloor et al., 3 Jun 2026).
5. Exact dyadic phase fixing by reusable logical catalysts
"Cultivating logical catalysts for fault-tolerant dyadic phase rotations" (Xu et al., 25 Jun 2026) presents a concrete surface-code-compatible framework for what is effectively DPF via reusable logical catalyst states. Rather than approximating a fine dyadic 9-rotation with a long Clifford+0 sequence every time it is needed, the protocol prepares a phase-specific logical resource state offline and then reuses it to implement the target dyadic phase exactly by phase kickback (Xu et al., 25 Jun 2026).
The target family is
1
A direct cultivation of the single-qubit magic state 2 is obstructed by the Clifford hierarchy for 3: for 4, the conjugated 5 operator remains Clifford-verifiable, but for finer dyadic states the analogous operator is itself non-Clifford, so direct verification would require the same non-Clifford resource one is trying to prepare (Xu et al., 25 Jun 2026).
The workaround is to cultivate a logical catalyst that is an eigenstate 6 of a specially chosen high-period Clifford circuit 7. Because
8
where 9 is the eigenvalue of 00 on 01, the state mediates the phase transformation without being consumed. The paper uses a family of depth-2 brickwork CNOT circuits 02 whose order is a power of two and whose eigenvalues are corresponding roots of unity. For 03, 04 has period 05, and the orbit-state construction
06
satisfies
07
Controlled-08 then kicks back the exact phase 09, so choosing 10 and 11 implements 12 exactly (Xu et al., 25 Jun 2026).
For arbitrary 13, the smallest direct brickwork construction uses 14, so the catalyst support scales as 15 logical qubits (Xu et al., 25 Jun 2026). This is the central asymptotic tradeoff: exactness, reusability, and constant online depth are obtained at the price of an exponentially large catalyst register in 16.
The paper’s worked example is 17, corresponding to 18. Here 19 and 20, and the nine-qubit brickwork Clifford 21 has period 22. One representative catalyst is
23
The 24 eigenspace is 25-fold degenerate, and the paper notes that this degeneracy is harmless for catalytic use because only the eigenphase matters. Online invocation requires controlled-26, which contains eight controlled-CNOTs, i.e. eight Toffolis. The reported costings are 27 28 gates for a conservative unitary Clifford+29 implementation, 30 31 gates using measurement-assisted logical-ANDs, or consumption of 32 33 states in parallel (Xu et al., 25 Jun 2026).
6. Cultivation protocol, verification theory, and comparative tradeoffs
The catalyst-cultivation protocol begins from a physical 34-qubit catalyst on the 35 orbit, encodes each qubit into an independent distance-3 rotated surface-code block, verifies the encoded catalyst by logical quantum phase estimation of 36, postselects on trivial syndromes, and then grows the code distance up to distance 37 (Xu et al., 25 Jun 2026). Since the target eigenvalue is 38, four ancilla bits suffice. One logical-39 measurement round applies
40
with compressed schedules for 41, 42, and 43; the reported CNOT counts are 44, with 45. The accepted semiclassical inverse-QFT output string is 46 (Xu et al., 25 Jun 2026).
A crucial technical point is that the phase readout is an exact projector onto the desired eigenspace. For the accepted string 47, the readout operator is
48
which is exactly the projector onto the 49 eigenspace (Xu et al., 25 Jun 2026). Because 50 has exact period 51, there is no spectral leakage: faults that move the state to a different eigenphase sector are ideally detected by phase estimation. The paper studies every single-qubit Pauli fault on the physical 52 under ideal phase estimation and finds that the only undetected single-qubit faults are 53 and 54, both acting merely as a global phase. The average Hamming distance from 55 of the flagged readout is 56, giving effective logical fault distance 57. Once the later stabilizer-growth stage provides 58, the decoded logical leakage scales as 59. This is the sense in which a single logical verification round already reaches the leading error-corrected scaling (Xu et al., 25 Jun 2026).
After verification, the protocol performs noisy distance-3 stabilizer extraction on every 60 block with hard postselection on all-zero syndrome, followed by growth 61, repeated trivial-syndrome postselection, unitary growth to 62, and final stabilizer-measurement growth 63 (Xu et al., 25 Jun 2026). In the last stage, acceptance is based on complementary-gap decoding between the best and second-best logical Pauli-frame hypotheses, and the final cultivated catalyst carries an 64-bit decoded Pauli frame.
The error metric is logical leakage out of the desired eigenspace rather than Pauli-frame error. For each accepted shot, the logical fidelity is computed after applying the residual decoded Pauli frame and projecting onto the 65 eigenspace, with leakage rate 66 (Xu et al., 25 Jun 2026). The simulation is hybrid: the front end is simulated as a tensor-network/MPS state vector using iTensor, the back end with Stim and PyMatching, the front-end noise model is circuit-level depolarizing noise at physical rate 67, and the main reported results use 68 with MPS bond dimension 69. Quantitatively, the paper reports that at 70, a single logical-71 verification round together with suitable distance-3 syndrome postselection and distance-7 growth yields logical leakage around 72 using about 73 to 74 expected attempts, while stronger complementary-gap postselection pushes the leakage toward 75 (Xu et al., 25 Jun 2026).
The two DPF formulations are complementary rather than redundant.
| Aspect | Compiler DPF | Catalyst-based exact dyadic rotation |
|---|---|---|
| Primary object | General multi-qubit circuit blocks | Fixed fine dyadic phases 76 |
| Core mechanism | Greedy dyadic fixing plus numerical reoptimization | Reusable logical catalyst eigenstate of Clifford 77 |
| Exactness | Approximate overall | Exact online dyadic phase |
| Main overhead | Shared-register ancillas and serialization | Catalyst size 78 |
| Key caution | 79-count and space-time volume can diverge | Offline cultivation is angle-specific |
This comparison clarifies several common misunderstandings. DPF is not synonymous with exact dyadic gate realization: in the compiler sense it is explicitly a heuristic approximate-synthesis method (Kalloor et al., 3 Jun 2026). Conversely, exact dyadic phase fixing is not automatically qubit-efficient: the catalyst construction achieves exactness and reusability at support cost 80 (Xu et al., 25 Jun 2026). The papers also converge on a broader caution about cost models. In the compiler setting, lower 81-count can worsen mapped space-time volume because of ancillas, adder structure, and serialization (Kalloor et al., 3 Jun 2026). In the catalyst setting, constant-depth exact online implementation is purchased by substantial offline, phase-specific cultivation (Xu et al., 25 Jun 2026). A plausible implication is that DPF techniques are most compelling when the same modestly fine dyadic phase or dyadic-rich block structure is reused often enough to amortize either compilation infrastructure or catalyst preparation.