Digital RIS (DRIS): Programmable Metasurfaces

• Digital RIS is a programmable metasurface technology featuring digitally controlled unit cells for precise phase, amplitude, and process selection.
• DRIS architectures employ discrete multi-bit state selection to enable fast and flexible configuration for 6G, optical, and ISAC applications.
• Integration with digital twin models and adaptive optimization frameworks ensures rapid reconfiguration and robust performance in dynamic environments.

Digital Reconfigurable Intelligent Surface (DRIS) represents an advanced class of programmable metasurfaces in which each subwavelength unit cell is digitally controlled, supporting high-speed, software-defined wireless and optical propagation manipulation. As opposed to traditional analog RIS with continuous or quasi-continuous tuning domains, DRIS architectures enable discrete, multi-bit state selection for phase, amplitude, and—where applicable—physical process (reflection, refraction, or hybrid operation), addressing both the control overhead bottleneck and the algorithmic flexibility demanded by next-generation (6G and beyond) communications, sensing, and integrated ISAC systems.

1. Digital RIS Concept, Taxonomy, and Formal Definition

A DRIS consists of an $M \times N$ array of unit cells, each addressable by a digital controller and reconfigurable among $L = 2^k$ discrete states, where $k$ is the per-cell bit-resolution. Compared to analog RIS that utilize varactors or other tunable components for (nearly) continuous control, DRIS implements state selection entirely through digital logic. In most architectures, this manifests as low-loss, switch-based phase shifters (e.g., PIN diodes, MEMS), often in 1-bit (${0, \pi}$), 2-bit (${0, \frac{\pi}{2}, \pi, \frac{3\pi}{2}}$), or higher-bit arrays (Tang et al., 2022, Ndjiongue et al., 2021).

Beyond classical reflection-only configurations, DRIS technology admits double-sided (omni-DRIS) operation, supporting selection among reflection, refraction, hybrid reflection/refraction (with independent phase and amplitude control for each process), and OFF states (Ndjiongue et al., 2022). The DRIS framework thus generalizes analog RIS, digital single-process RIS, and recently popular STAR-RIS to a per-element, fully addressable, multi-process programmable array.

Core characteristics include:

• Element-level digital codewords: Each cell is addressed by a unique bit-sequence selecting process, phase state, and amplitude coefficient.
• Switchable physical processes: Reflection/refracting/hybrid/mute, selected via control bits.
• Geometry- or environment-adaptive control: Integration with digital twin models facilitates closed-loop optimization, bypassing explicit CSI estimation (Karakelle et al., 20 Apr 2026, Güneşer et al., 10 Jan 2025).

2. Mathematical Models, Signal Processing, and Optimization Frameworks

The DRIS-enabled channel model is structured as

$$y = \left( h_d + \boldsymbol{g}^\mathrm{T}\boldsymbol{\Phi} \boldsymbol{h} \right)x + w,$$

where $\boldsymbol{\Phi}$ is a diagonal matrix with digitally set entries $\mathrm{e}^{j\theta_n}$ per element. Each $\theta_n$ is drawn from a quantized set determined by the bit-width $k$; multi-process/omni-DRIS further allow for element-wise process and amplitude coding. The design problem is to

$L = 2^k$0

subject to $L = 2^k$1, with $L = 2^k$2 the finite phase set (e.g., $L = 2^k$3 for 1-bit DRIS; richer sets for higher-bit or omni-DRIS) (Karakelle et al., 20 Apr 2026, Ndjiongue et al., 2022).

Two design paradigms dominate:

• Geometry-driven “digital twin” optimization: The environment’s 3D geometry and transceiver locations (via Blender → NVIDIA Sionna) instantiate a virtual twin; ray tracing computes deterministic channel coefficients $L = 2^k$4 for all two-hop paths. Over-the-air pilots and CSI feedback are bypassed; optimization is performed in the twin and configurations transferred to the physical DRIS (Karakelle et al., 20 Apr 2026).
• Adaptive closed-form and iterative search: For fixed-resolution architectures, continuous-phase optimality is obtained and mapped to the nearest allowed digital state. For 1-bit, $L = 2^k$5 or $L = 2^k$6 is chosen to align reflected paths as closely as quantization allows—yielding up to 75% of the ideal gain with minimal search complexity (Karakelle et al., 20 Apr 2026, Güneşer et al., 10 Jan 2025). In hybrid schemes (reflect/refract), configuration is performed per-mode per-element, enabling double-sided or multiplexed operation (Ndjiongue et al., 2022).

These paradigms scale to dense urban and indoor deployments via integration with digital twin frameworks and ray-tracing engines, substantially reducing control-plane complexity for real-time reconfiguration (Güneşer et al., 10 Jan 2025, Karakelle et al., 20 Apr 2026).

3. Hardware Architectures: Implementation Domains, Quantization, and Omni-DRIS

A diversity of DRIS hardware has been demonstrated across microwave, mmWave, and optical domains. Representative architectures include:

• Switch-based digital phase shifters: Employing PIN diodes or MEMS to select discrete phase states. For example, a 2-bit transmissive DRIS incorporates a current-reversible dipole (implementing $L = 2^k$7 shift) and a digital 90° phase shifter, driven by four PIN diodes per cell yielding $L = 2^k$8 (Tang et al., 2022). Measured aperture gains up to 22.0 dBi (N=256, $L = 2^k$9) and per-bit switching delays $k$0 ms have been achieved (Tang et al., 2022, Karakelle et al., 20 Apr 2026).
• LC-based and optical DRIS: Liquid-crystal metasurfaces admit multi-bit addressability via voltage-controlled birefringence, supporting fast state switching and DSP mapping directly onto the physical layer (Ndjiongue et al., 2021). Full-state selection is enabled through control of director tilt via CMOS backplanes, with demonstrated 2-bit/4-state operation (Ndjiongue et al., 2021).
• Omni-DRIS: Each unit cell can be in one of four distinct modes (reflect, refract, hybrid, or OFF), selected via two mode bits. Additional bits control phase (b bits) and amplitude (b bits), for a code length $k$1 per cell. Reflection/refractive phase quantization is typically uniform over $k$2 or $k$3, respectively; amplitude splitting in hybrid mode is realized by polarization filtering or mixed dielectric phase-change materials (Ndjiongue et al., 2022, Ndjiongue et al., 2024).

DRIS Variant	Phase Levels	Amplitude Control	Per-Element Processes
Analog RIS	(quasi-)cont.	Continuous	Reflection or refraction
Digital RIS (basic)	1/2/…-bit	Discrete (or fixed)	Reflection only
Omni-DRIS	$k$41-bit	Discrete	Reflect, refract, hybrid, off

Implementation overhead scales with the total number of addressable elements and bit-depth: $k$5 for global config, with experimentally validated setup times $k$6 ms for full-array reprogramming (Karakelle et al., 20 Apr 2026).

4. Performance Metrics, Digital Quantization Effects, and Theoretical Limits

DRIS system performance is captured by metrics including received signal power, achievable rate, and beamforming gain. Key relationships:

• Quantization loss: The coherent sum is attenuated by $k$7, incurring a power penalty versus continuous phase (e.g., $k$8 dB for 1-bit, $k$9 dB for 4-bit) (Ndjiongue et al., 2022).
• Effective SNR and rate: For ${0, \pi}$0 unused elements, effective SNR is ${0, \pi}$1, leading to ${0, \pi}$2 (Ndjiongue et al., 2022).
• Element count optimization: For omni-DRIS in OWC, the optimal number of elements maximizing ${0, \pi}$3 is ${0, \pi}$4, with ${0, \pi}$5 and ${0, \pi}$6 dependent on system parameters and ${0, \pi}$7 the solution to ${0, \pi}$8 (Ndjiongue et al., 2024).
• Experimental validation: In a 128-element, 1-bit DRIS testbed, digital-twin-optimized settings delivered ${0, \pi}$9 dB RSRP gain (vs. ${0, \frac{\pi}{2}, \pi, \frac{3\pi}{2}}$0 dB ideal from full search) using only 1–2 candidate configurations, confirming ${0, \frac{\pi}{2}, \pi, \frac{3\pi}{2}}$1 optimality with ${0, \frac{\pi}{2}, \pi, \frac{3\pi}{2}}$2 lower overhead (Karakelle et al., 20 Apr 2026). Coverage gains up to 30 dB have been demonstrated in urban RT settings using similar methods (Güneşer et al., 10 Jan 2025).

5. Double-Sided, Multi-Functionality, and Trade-Offs in Omni-DRIS

Omni-DRIS architectures extend DRIS functionality to simultaneous reflection/transmission (double-sided), hybrid beamforming, and element-wise process selection (Ndjiongue et al., 2022). A typical codeword structure comprises:

• ${0, \frac{\pi}{2}, \pi, \frac{3\pi}{2}}$3
  • ${0, \frac{\pi}{2}, \pi, \frac{3\pi}{2}}$4 selects between reflector, refractor, hybrid, or off
  • Next ${0, \frac{\pi}{2}, \pi, \frac{3\pi}{2}}$5 bits define quantized phase for each process
  • Last ${0, \frac{\pi}{2}, \pi, \frac{3\pi}{2}}$6 bits set amplitude

By combining process and phase coding, omni-DRIS realizes “double-sided beamforming,” enabling spatial multiplexing and joint reflection/refraction with per-process phase steering. Achievable rate upper bounds scale as ${0, \frac{\pi}{2}, \pi, \frac{3\pi}{2}}$7 for fully active, perfectly phased elements (Ndjiongue et al., 2022).

System-level trade-offs are delineated by:

• Bit-depth ${0, \frac{\pi}{2}, \pi, \frac{3\pi}{2}}$8 (phase resolution): Increases coherent gain, but with diminishing marginal improvement as ${0, \frac{\pi}{2}, \pi, \frac{3\pi}{2}}$9
• Element count $$y = \left( h_d + \boldsymbol{g}^\mathrm{T}\boldsymbol{\Phi} \boldsymbol{h} \right)x + w,$$0: Rate scales quadratically at low $$y = \left( h_d + \boldsymbol{g}^\mathrm{T}\boldsymbol{\Phi} \boldsymbol{h} \right)x + w,$$1, saturates when quantization and insertion losses dominate
• Unused elements $$y = \left( h_d + \boldsymbol{g}^\mathrm{T}\boldsymbol{\Phi} \boldsymbol{h} \right)x + w,$$2: Each unused cell reduces peak gain quadratically

System designers must jointly optimize $$y = \left( h_d + \boldsymbol{g}^\mathrm{T}\boldsymbol{\Phi} \boldsymbol{h} \right)x + w,$$3, $$y = \left( h_d + \boldsymbol{g}^\mathrm{T}\boldsymbol{\Phi} \boldsymbol{h} \right)x + w,$$4, and LC/metamaterial characteristics for targeted rate, power, and reconfiguration objectives. High-resolution and/or densely packed DRIS arrays demand rapid and high-throughput control links %%%%58$\boldsymbol{\Phi}$58%%%%6 bits per update.

6. ISAC, Security, and Fully-Passive Jamming: The Disco DRIS Paradigm

“Disco” DRIS (randomly and rapidly time-varying digital code states) introduces distinct behaviors in adversarial and ISAC contexts (Huang et al., 18 May 2025, Huang et al., 11 Apr 2026):

• Fully-passive jamming (FPJ): Random per-symbol reflection phases and amplitudes disrupt channel reciprocity, acting as a “passive noise generator” destroying Alice–Bob covert capacity while enhancing warden detection (Huang et al., 18 May 2025).
• Active Channel Aging (ACA): In ISAC, Disco DRIS induces random “aging” of the wireless channel between pilot and data, decoupling the channel estimates and introducing irreducible interference. The ACA variance scales as $$y = \left( h_d + \boldsymbol{g}^\mathrm{T}\boldsymbol{\Phi} \boldsymbol{h} \right)x + w,$$7 (aggregated over all DRIS elements) and cannot be suppressed by increasing transmit power (Huang et al., 11 Apr 2026).
• Directional sensing/comm trade-offs: The randomized DRIS reflections worsen angle-of-departure CRLB but can enhance angle-of-arrival estimation due to nonuniform Fisher information accumulation, offering new dimensions of design and attack/defense in ISAC frameworks (Huang et al., 11 Apr 2026).

The disco DRIS paradigm demonstrates the capacity for fully-passive electromagnetic manipulation at the physical layer—enabling both disruptive (jamming, security threat) and enriching (angular diversity for sensing) functionalities with minimal hardware complexity. Even 1-bit DRIS achieves maximal effect, confirming that high-precision analog control is unnecessary for such applications (Huang et al., 18 May 2025, Huang et al., 11 Apr 2026).

7. Applications, Experimental Validation, and Outlook

DRIS and its variants have demonstrated significant gains in real-world indoor, urban, mmWave, and OWC scenarios:

• Digital twin integration: Ray tracing–enabled twins (e.g., Sionna RT) streamline phase optimization, virtually eliminating CSI-related pilot overhead, and reducing DRIS configuration times from minutes to hundreds of milliseconds in >100 element arrays (Karakelle et al., 20 Apr 2026, Güneşer et al., 10 Jan 2025).
• Prototyping and communication testbeds: 2-bit transmissive DRIS realized 22 dBi aperture gain, 8 dB Tx power reduction, and beam steering up to $$y = \left( h_d + \boldsymbol{g}^\mathrm{T}\boldsymbol{\Phi} \boldsymbol{h} \right)x + w,$$8 in 16$$y = \left( h_d + \boldsymbol{g}^\mathrm{T}\boldsymbol{\Phi} \boldsymbol{h} \right)x + w,$$916-element arrays (27 GHz) (Tang et al., 2022).
• OWC and VLC systems: DRIS enables digitally coded beamforming, MIMO/space-time coding, and rate-optimized array sizing for multi-user VLC, with established theoretical formulas for system-level sum-rate optimization and per-link capacity scaling (Ndjiongue et al., 2024, Ndjiongue et al., 2021, Ndjiongue et al., 2022).

Future research is directed toward:

• High-speed, low-loss meta-atom fabrication for higher bits and larger arrays.
• DRIS-enabled joint communication-sensing (ISAC) leveraging programmable scattering.
• Scalable control and management protocols for dense DRIS deployments under stringent latency and environmental dynamics.
• Security-aware design, balancing the communication–sensing trade-off in the face of adversarial digital RIS.

Collectively, DRIS technology positions digitally addressable metasurfaces as a key enabler for 6G wireless, OWC, and emerging physically secure and integrated ISAC networks (Karakelle et al., 20 Apr 2026, Ndjiongue et al., 2021, Huang et al., 11 Apr 2026, Ndjiongue et al., 2022, Ndjiongue et al., 2024, Huang et al., 18 May 2025).