Controlled-V Gate in Quantum Computing
- Controlled-V gate is a two-qubit controlled-unitary performing the sqrt(X) operation on the target qubit when the control qubit is in the |1⟩ state.
- It is embedded in the Clifford hierarchy, with V in CH3 and CV in CH4, showcasing enhanced expressiveness over standard Clifford operations.
- Recent developments demonstrate its universality via catalytic embedding and efficient pulse-engineered implementations on superconducting hardware.
The controlled- gate is a two-qubit controlled-unitary whose standard modern meaning is the controlled- gate, denoted , where the target undergoes only when the control is . In the computational basis, its matrix is
and it satisfies (Kaarsgaard, 9 Sep 2025). The term is not completely uniform across the literature: in several photonic and linear-optical works, “controlled-” denotes a controlled-phase gate, often the instance of (Lemr et al., 2015, Shringarpure et al., 2021). Recent theory has sharply increased the importance of the controlled-0 interpretation by showing that 1 is computationally universal in isolation under catalytic embedding with a constant number of clean auxiliary qubits (Kaarsgaard, 9 Sep 2025).
1. Definition, block structure, and notation
For a unitary 2, the controlled gate is written
3
so controlled-4 is the case 5 (Anderson et al., 2024). In block form, a single-control controlled-6 gate is
7
with 8 the target-register dimension; this extends directly to function-controlled gates, where the full matrix is block diagonal and each control block is either 9 or 0 according to a Boolean function 1 (Lewis et al., 2022).
This block-diagonal viewpoint is not merely representational. It underlies structural results about when controlled gates lie in the Clifford hierarchy, and it also clarifies the distinction between the controlled-2 gate and controlled-phase families. In particular, the same formal pattern accommodates both the matrix above for controlled-3 and the controlled-phase form
4
which appears in photonic implementations of tunable controlled-phase operations (Wang et al., 2020).
2. Placement in the Clifford hierarchy
The 5-th level of the 6-qubit Clifford hierarchy is defined recursively by
7
with 8 the Pauli group and 9 the Clifford group (Anderson et al., 2024). For controlled gates, necessary conditions are restrictive: if 0 lies in the qubit Clifford hierarchy, then 1 must itself lie in some finite level of the hierarchy, and there must exist 2 such that 3 is a Pauli (Anderson et al., 2024).
The controlled-4 gate is a canonical example satisfying these conditions. The gate 5 obeys 6 and 7, so 8 has order 9 up to phase; 0 is in 1, and controlled-2 is known to be in 3 (Anderson et al., 2024). This situates 4 one level above 5 in the hierarchy and explains why it is more expressive than Clifford operations while still having a highly constrained algebraic form.
The corresponding sufficiency question remains unresolved in general. For single-qubit Clifford gates, the order-6 condition is both necessary and sufficient, and for diagonal gates the same pattern holds; for arbitrary 7, however, it is left open whether the same condition guarantees that 8 enters the hierarchy and is exactly one level higher (Anderson et al., 2024). A plausible implication is that controlled-9 is unusually well behaved: it satisfies the known necessary criteria and also admits explicit universal constructions, whereas the general classification problem for controlled gates is still incomplete.
3. Universality by catalytic embedding
A decisive recent result is that the controlled-0 gate is computationally universal when combined with a catalytic embedding and a small, constant number of clean auxiliary qubits (Kaarsgaard, 9 Sep 2025). The catalytic-embedding condition is
1
where 2 is a catalyst state on an ancillary system and is unchanged by the computation (Kaarsgaard, 9 Sep 2025). This construction allows a logical gate 3 to be simulated using only physical 4 gates acting on a larger space.
The construction proceeds in two layers. First, 5 already realizes classical reversible primitives exactly and efficiently: 6, Toffoli can be implemented with a constant number of 7 gates, and SWAP is likewise covered (Kaarsgaard, 9 Sep 2025). Second, explicit encodings of 8, 9, and 0 are provided using only 1 gates and auxiliary wires in fixed catalyst states; for example, 2 uses an ancilla 3 in 4, 5 uses 6 in 7, and 8 uses a third ancilla 9 in a specified catalyst state 0 (Kaarsgaard, 9 Sep 2025).
The resource overhead is constant. Clifford+Toffoli 1 can be simulated with at most 2 clean auxiliary qubits, and Clifford+3 4 with at most 5; each simulated logical gate requires at most 6 or 7 8 gates, and the encoding requires only nearest-neighbour 9 gates (Kaarsgaard, 9 Sep 2025).
| Simulated gate | Auxiliary qubits | 0 gates required |
|---|---|---|
| 1 | 0 | 2 |
| 2 (Toffoli) | 0 | 9 |
| 3 | 1 | 1 |
| 4 | 2 | 3 |
| 5 | 3 | 9 |
| 6 | 2 | 7 |
These figures show that universality is obtained without resorting to asymptotically large gadgetry. This suggests that the obstruction to universality for 7 is not the absence of irrational parameters, but rather the need for an encoding that converts its restricted native action into a universal logical action with constant-factor overhead.
4. Expressiveness, rational parameters, and resolved open questions
The universality result settles two distinct questions about the expressive power of controlled-8 (Kaarsgaard, 9 Sep 2025). The first concerns De Vos’ gate set based on Negators. De Vos had posed whether the gate set 9 is universal for quantum computation rather than only for classical reversible logic; the new construction shows that it is computationally universal by the same catalytic-embedding method (Kaarsgaard, 9 Sep 2025).
The second concerns the two-qubit gate 0 due to Sleator and Weinfurter. Previous universality arguments had applied only for irrational 1, where density arguments supply arbitrary rotations. For 2, however, 3 is exactly 4, and universality persists even for this rational choice of 5 (Kaarsgaard, 9 Sep 2025). This directly overturns the common expectation that universal gate sets must include irrational gate parameters.
The theoretical significance is therefore twofold. On the one hand, the result shows that rational two-qubit gates plus clean ancilla and simple circuit constructions suffice for universal quantum computation with constant-factor resource overhead. On the other hand, it clarifies that the gap between 6 and standard universal sets such as Clifford+7 or Clifford+Toffoli is bridgeable by encoding rather than by altering the underlying gate’s continuous parameters (Kaarsgaard, 9 Sep 2025).
5. Native realization on superconducting hardware
The controlled-8 gate has also been implemented directly at the pulse level on IBM superconducting devices using OpenPulse (Satoh et al., 2021). In that setting, the cross-resonance interaction is modelled by
9
and, after echoing and cancellation, the effective entangling term is
00
which generates
01
Within this framework,
02
so the pulse-engineered 03 gate is obtained by halving the cross-resonance pulse duration relative to 04 and adjusting the local rotations from 05 to 06 (Satoh et al., 2021). The reported gate time is 07 ns for direct OpenPulse 08, compared with 09 ns for a QASM-based 10 synthesized from two 11 gates, corresponding to a 12 reduction in gate time; process-tomography results give 13 fidelity for OpenPulse 14 versus 15 for the CX-based realization (Satoh et al., 2021).
The same paper characterizes the two-qubit gates reachable with two or three 16 gates using Cartan decomposition. For two 17 gates, reachable Weyl-chamber points satisfy
18
with 19; for three 20 gates,
21
(Satoh et al., 2021). Concrete examples include 22, implemented with 23 24 gates with gate time 25 ns versus 26 ns for a CX-based construction, and 27, implemented with 28 29 gates with gate time 30 ns versus 31 ns (Satoh et al., 2021). A linearly coupled three-qubit Toffoli gate is likewise improved, from 32 ns and 33 state average fidelity in a CX-only construction to 34 ns and 35 using 36 37 and 38 pulse-engineered 39 gates (Satoh et al., 2021).
6. Terminological ambiguity and controlled-phase variants
A persistent source of confusion is that several photonic papers use “controlled-40” for a controlled-phase gate rather than controlled-41. In that usage, 42 is effectively a phase operation on the 43 component, and the gate takes the form
44
with the controlled-45 gate corresponding in particular to 46 in some papers (Wang et al., 2020, Lemr et al., 2015). The distinction is substantive: controlled-47 and controlled-phase are different two-qubit gates even though both fit the generic controlled-unitary template.
Several architectures realize the controlled-phase interpretation. A passive and deterministic photonic scheme based on a single three-level ladder emitter implements any controlled-phase operation from 48 to 49 by tuning the target-photon detuning 50; in the idealized limit, the acquired phase is
51
and the gate is proposed as especially useful for quantum Fourier transform circuits requiring many controlled-phase gates at arbitrary angles (Wang et al., 2020). A linear-optical programmable scheme encodes the phase in a program qubit
52
with 53 yielding the controlled-54 phase gate; its basic success probability is 55, rising to 56 with combined optimizations (Lemr et al., 2015). A destructive linear-optical controlled-phase gate uses only a single nonlinear sign gate, giving intrinsic success probability 57 versus 58 for the KLM construction, but an effective success probability 59 versus 60 when heralded ancilla generation is included; the trade-off is that the control qubit is destroyed (Shringarpure et al., 2021). A different deterministic photonic architecture based on dynamically coupled cavities and optical nonlinearities reports that gates with 61 fidelity are feasible with near-term improvements in cavity loss using LiNbO62 or GaAs (Heuck et al., 2019).
The literature therefore supports two parallel conventions. For gate-synthesis, hierarchy, and universality discussions, controlled-63 now most significantly denotes controlled-64. For many photonic implementations, especially those centred on tunable controlled phases, the same label may refer instead to controlled-phase operations, including the 65 case. Careful interpretation of 66 is essential in both theoretical and experimental contexts.