Computational Graphs in Hierarchical Simulation

• Computational graph representation is a formal abstraction that encodes dependencies, modularity, and information flows across hierarchical simulation frameworks.
• The approach leverages structures such as DAGs, multigraph partitions, and graded operators to manage complexity and optimize simulation performance.
• It enables recursive modular reuse, parallel co-simulation, and seamless gradient propagation, improving scalability and cross-stack integration.

A computational graph representation serves as a foundational abstraction in hierarchical simulation, encoding dependencies, modularity, and signal or information flows between subsystems across levels of hierarchy. In modern simulation methodologies—including physical system modeling, device-level circuit simulation, cyber-physical multi-agent domains, and even cross-stack system architectures—the explicit use of computational graphs enables both efficient execution and rigorous reasoning over simulator state, scheduling, and derivatives. The emergence of formal graph lineages, graded and skeletal graph operators, and the fusion with discrete-event scheduling has made the computational graph central to modern hierarchical simulation frameworks.

1. Formal Models of Computational Graphs in Hierarchical Simulation

The most widely-used structure is the directed acyclic graph (DAG), with nodes and edges encoding different roles depending on application domain:

• Dynamic Scene Graphs (DSG) in environmental simulation: A time-indexed labeled graph $G[t] = (V[t], E[t])$ partitions nodes into static $V_S$ (e.g., infrastructure) and dynamic $V_D[t]$ (e.g., spawned objects) subsets, with edges unifying spatial adjacency, containment, and object-attachment relations. Nodes carry feature vectors $x_i(t)$, and edges may have attribute vectors $e_{ij}(t)$ encoding traversal costs, semantic relations, or physical quantities (Ohnemus et al., 10 Oct 2025).
• Hierarchical Circuit Computational Graphs: Nodes are partitioned as signals (unknowns), parameters (design variables), intrinsic parameters (model-dependent functions), and residuals (equation remainders). Edges encode computational/data dependencies, with recursive subcircuit instantiation forming a deeply nested, function-like hierarchy (Long et al., 2024).
• Computing Graphs for Cyber-Physical or Computational Task Scheduling: Multigraphs encode both static topology and dynamic state-spaces (manager states, action signals), with hierarchical nesting via partitioned or subgraph compositions. Attributes and state machines are attached to nodes and edges to govern execution and communication (Jalving et al., 2018).
• Architecture Graphs ("A-Graph") for Cross-Stack Simulation: A weighted DAG $G=(V, E, W, \ell, \mathcal{S})$ with scope/hierarchy annotations supports cross-layer (application, software, architecture, circuit) aggregation, traversal, and flexible metric queries (Price et al., 4 Feb 2026).
• Graph Lineages and Graded/Skeletal Graphs: Hierarchical graphs as sequences $\{G_0, \dots, G_L\}$ with inter-level bipartite connections, prolongation maps, and level-graded structure enable memory- and compute-efficient product operations (box, cross, disjoint, function type) and continuum-limit constructions (Mjolsness et al., 31 Jul 2025).

This formalism empowers encapsulation of both data and control, and is amenable to explicit algorithmic operations for simulation, optimization, and synthesis across all levels of hierarchy.

2. Hierarchical Composition and Decomposition

Hierarchical simulation leverages graph-based composition in several ways:

• Nested Subgraphs/Modules: Each module (device, subsystem, scene component) is represented as a subgraph; at compile time, representations such as JSON netlists or explicit subgraph objects store interface mappings, parameter pass-through, and pointers to submodules. Instantiation is recursive and mirrors function composition (Long et al., 2024, Jalving et al., 2018).
• Graph Lineages: Lineages $\{G_0,\ldots,G_L\}$ capture depth-wise growth and inter-level sparsity, using bipartite coupling $B_{\ell,\ell+1}$ and prolongation $P_\ell$ maps. The graded structure allows graded morphisms and categorical operations that are computationally efficient per-level, enabling tractable simulation of systems with exponential growth in state-space (Mjolsness et al., 31 Jul 2025).
• Scope/Forest Hierarchy: In unified cross-stack representations (e.g., A-Graph), scopes $V_S$0—disjoint or nested—enable metric queries and aggregation at any abstraction, such as all instances of a module type or all objects within a spatial region (Price et al., 4 Feb 2026).
• Partitioned Task Hierarchy for Parallel Co-simulation: By dividing a computing graph into subgraphs or levels, parallel simulation is enabled where each subgraph can be stepped or solved independently except for synchronization across global edges. This is critical for scalability and enables distributed simulation of complex heterogeneous systems (Jalving et al., 2018).

The composition approach, whether lineage-based, scope-based, or recursive modular, underlies the scalability and reusability of hierarchical simulation frameworks.

3. Algorithms for Simulation and Scheduling

Graph-based simulation is realized via several algorithmic paradigms:

• Event-Driven Updates (DES): For time-evolving systems, events are queued with timestamps. Application of the event produces state transitions via graph mutation—adding/removing nodes and edges, updating attributes, propagating observations to observer graphs, and triggering agent actions or path-planning (Ohnemus et al., 10 Oct 2025).
• Gather–Execute–Scatter in Partitioned Simulation: In quantum circuit simulation, the computational DAG is acyclically partitioned into subgraphs (parts) such that each part can be simulated using a small, local state vector. Partitioning heuristics and algorithms (natural order, random-DFS, acyclic partitioner) construct these parts. Simulation proceeds hierarchically:
  • Gather: Extract required state for a part.
  • Execute: Apply gates or operations locally.
  • Scatter: Write updated state back to the global state vector.
  • This maximizes data locality and reduces main-memory bandwidth requirements, with extensions for multiple hierarchical memory levels (Fang et al., 2022).
• Bottom-up/Topological Traversal: In A-Graph and circuit equation systems, simulation and metric aggregation are performed via a topological sort, propagating local metrics and states through the hierarchy according to edge weights, aggregation rules (summation, sequential/parallel), and scope queries (Price et al., 4 Feb 2026, Long et al., 2024).
• Differentiable and AD-friendly Chains: Circuit graphs explicitly propagate gradients (Jacobian information) through the hierarchy, supporting end-to-end automatic differentiation, parameter sensitivity, and robust optimization (Long et al., 2024).
• Finite State-Machine-Based Simulation: Computing graph nodes/arcs are attached with finite-state machines (manager states, action signals). Simulation iterates by enqueuing and applying state/action transitions in response to events, enabling logical and real-time scheduling (Jalving et al., 2018).

These computational methods enable both high-performance simulation (multi-threaded, distributed, or cache/locality-optimized) and rigorous analysis, including parameter sweeps and optimization.

4. Operator Theory on Hierarchical Computational Graphs

Advanced composition and manipulation of hierarchical graphs leverages a suite of algebraic operators and morphisms:

• Skeletal Product Operators: Cross product ($V_S$1), box product ($V_S$2), and disjoint sum ($V_S$3) are redefined for graded graphs to avoid exponential blowup in state/edge count. By restricting connections to $V_S$4 in grade, these “skeletal” products preserve tractability while supporting compositional expressivity (e.g., for neural network architectures or multigrid solvers) (Mjolsness et al., 31 Jul 2025).
• Unary Operations: Thickening and Escalation: The thickening operator produces a multiscale graph lineage suitable for scale-space analysis, while escalation constructs a lineage of search frontiers, supporting adaptive, level-structured search and optimization across hierarchical domains.
• Prolongation and Restriction Maps: Linear sparse maps $V_S$5 encode fine-coarse information transfer, enforcing consistent restriction/prolongation in multilevel solvers or scale-space models, and satisfying Galerkin properties in PDE continuum limits (Mjolsness et al., 31 Jul 2025).
• Chain Rule and Jacobian Assembly: For hierarchical systems with differentiable dependencies, operator rules encode how local derivatives are propagated upwards or downwards through nested subcircuits or modules, supporting efficient adjoint and forward-mode differentiation (Long et al., 2024).

These operators provide the mathematical foundation for rigorous, efficient, and expressive construction of hierarchical computational models.

5. Application Domains and Illustrative Examples

The computational graph paradigm underlies a range of hierarchical simulation frameworks:

Framework	Graph Model/Formalism	Application Example
FOGMACHINE (Ohnemus et al., 10 Oct 2025)	DSG + DES, time-indexed DAG	Urban scenario, partial agent observation
Circuit AD (Long et al., 2024)	Signal/param/intrinsic graph	CMOS device & OpAmp sizing, gradient flows
Plasmo.jl (Jalving et al., 2018)	Computing multigraph, subgraphs	Hierarchical control co-simulation
A-Graph/ArchX (Price et al., 4 Feb 2026)	WDAG w/scopes, layer tags	Cross-stack DSE, area/power aggregation
HiSVSIM (Fang et al., 2022)	Gate DAG, acyclic partition	Large-scale quantum circuit simulation
Lineage/Skeletal (Mjolsness et al., 31 Jul 2025)	Graded lineage sequence, skeletal product	Multigrid & CNN architecture

For example, FOGMACHINE fuses DSGs and event-driven simulation to enable multi-agent, partially observed benchmarking. The circuit computational graph approach permits automated sensitivity and sizing across algorithmic and physical abstraction levels. HiSVSIM demonstrates that partitioned, acyclic, and hierarchical state vector simulation drastically improves locality and scalability for quantum circuits.

6. Analysis of Scalability, Modularity, and Efficiency

The explicit graph abstraction yields performance and modeling advantages:

• Scalability: Hierarchical composition and partitioning naturally parallelize simulation. Subgraphs/local events can be handled independently except for synchronization on shared/global edges. Partitioned simulation strategies significantly reduce memory and communication overhead—e.g., HiSVSIM achieves 2–4× speedup versus previous quantum simulators utilizing optimal acyclic partitioning (Fang et al., 2022).
• Modularity and Reuse: By formalizing submodules as local computational graphs, with interface parameters and signals, code and model reuse are maximized—e.g., device models are reused across DC/TRAN/AC simulators in circuit analysis (Long et al., 2024).
• Metric and Cost Aggregation: A-Graph enables at-will querying of metrics (such as area, power, or runtime) at any scope, reflecting dynamic composition of modules or system architectures (Price et al., 4 Feb 2026).
• AD Integration and Sensitivity: Treating every node/parameter as a first-class variable, the computational-graph representation permits seamless end-to-end gradient propagation—supporting gradient-based optimization and data-driven calibration at all levels (Long et al., 2024).
• Complexity Management: Skeletal product and lineage formulation avoids combinatorial explosion in vertex/edge growth, preserving $V_S$6 per-level complexity for deep hierarchies (Mjolsness et al., 31 Jul 2025).

A plausible implication is that the computational-graph paradigm is preferred in settings where both fine-grained control and rigorous analysis, including differentiation and module reuse, are required under stringent resource constraints.

7. Prospects and Continuum Limits

Computational graph representations continue to evolve toward greater generality and analytic rigor:

• Continuum Limit and Multiscale Analysis: Graph lineages with Galerkin prolongators and sparsified inter-level connectivity enable convergence to PDE models and scale-space architectures, facilitating legitimate continuum-theoretic analysis (Mjolsness et al., 31 Jul 2025).
• Unified Simulation across Stacks: Cross-abstraction simulation—e.g., from software to architecture to device—becomes tractable with unified WDAG and scope-based representations, as in A-Graph (Price et al., 4 Feb 2026).
• Sampling, Search, and Optimization: Hierarchical structure enables adaptive and local procedures (e.g., search-frontier escalation, graded graph function spaces), promising for high-dimensional model exploration and automated model selection.

A plausible implication is that future simulation and design automation frameworks will increasingly leverage explicit hierarchical computational graphs, integrating event-driven simulation, differentiation, and multi-scale composition as first-class operators in the simulation stack.