Branching Micro-Kernel for Quantum PDE Updates

• Branching Micro-Kernel is a quantum circuit-based primitive that updates discretized PDE stencils locally using amplitude encoding and conditional rotations.
• It employs a three-step process—selector preparation, addressed rotation, and sampling—to efficiently encode neighbor values and compute convex sums as Monte Carlo estimates.
• The architecture achieves scalable resource use through node-local circuits and batching strategies, though its current advantage is constrained by NISQ noise compared to alternatives like the Bernoulli variant.

A branching micro-kernel is a quantum circuit-based computational primitive designed for explicit update of discretized Partial Differential Equation (PDE) stencils using quantum sampling. In this approach, each micro-kernel operates locally on a mesh node and consumes only its immediate stencil inputs (neighbor values and coefficients). It encodes these inputs in the amplitudes and conditional rotations of a tiny, shallow quantum circuit. The outputs serve as Monte Carlo estimates of the stencil update. Distinct from monolithic quantum PDE solvers that encode the global spacetime problem into a single deep circuit, the branching micro-kernel maintains the classical algorithm’s timestep loop and offloads only the local node update to the quantum processor unit (QPU) (Markidis et al., 16 Nov 2025).

1. Quantum Circuit Architecture and Algorithm

Given an $N_{\rm br}$-point stencil with nonnegative weights $\{w_i\}_{i=0}^{N_{\rm br}-1}$ and normalized neighbor values $\{v_i\in[0,1]\}$, the quantum circuit implements three subroutines:

1. Selector Preparation: Prepare $\lceil\log_2N_{\rm br}\rceil$ selector qubits in the superposition

$$|\psi_{\rm sel}\rangle = \sum_{i=0}^{N_{\rm br}-1}\sqrt{p_i}\,|i\rangle$$

with

$p_i = \frac{w_i}{\sum_j w_j}.$

Amplitude encoding is achieved using a binary rotation tree constructed with $R_y$ and controlled-$R_y$ gates.

2. Addressed Rotation: For each possible branch $i$, apply a controlled-$R_y(\phi_i)$ rotation to a single readout qubit (denoted $\{w_i\}_{i=0}^{N_{\rm br}-1}$0) conditioned on the selector register being in $\{w_i\}_{i=0}^{N_{\rm br}-1}$1, with

$\{w_i\}_{i=0}^{N_{\rm br}-1}$2

This encodes the neighbor value $\{w_i\}_{i=0}^{N_{\rm br}-1}$3 in the probability of measuring $\{w_i\}_{i=0}^{N_{\rm br}-1}$4 in state $\{w_i\}_{i=0}^{N_{\rm br}-1}$5.

3. Sampling: Measure $\{w_i\}_{i=0}^{N_{\rm br}-1}$6 $\{w_i\}_{i=0}^{N_{\rm br}-1}$7 times to accumulate an empirical mean $\{w_i\}_{i=0}^{N_{\rm br}-1}$8 for the stencil update, converging statistically to

$\{w_i\}_{i=0}^{N_{\rm br}-1}$9

The whole process is node-local, parallelizable across the spatial grid, and requires no communication between circuits for individual nodes.

2. Mathematical Encoding of Stencil Weights and Values

Each neighbor value $\{v_i\in[0,1]\}$0 (normalized to $\{v_i\in[0,1]\}$1) is mapped to a qubit amplitude via the rotation angle $\{v_i\in[0,1]\}$2, so that applying $\{v_i\in[0,1]\}$3 to a $\{v_i\in[0,1]\}$4 state yields a probability $\{v_i\in[0,1]\}$5 of measuring $\{v_i\in[0,1]\}$6. The selector superposition is built with amplitudes $\{v_i\in[0,1]\}$7 where $\{v_i\in[0,1]\}$8. The overall circuit encodes the full weighted average $\{v_i\in[0,1]\}$9 in the measurement statistics of the readout qubit. After selector preparation and all controlled rotations, the quantum state is

$\lceil\log_2N_{\rm br}\rceil$0

Marginalizing over the selector qubits, the probability of $\lceil\log_2N_{\rm br}\rceil$1 is the desired convex sum.

3. Resource Footprint and Circuit Depth

The branching micro-kernel architecture achieves compact resource scaling:

• Qubits: $\lceil\log_2N_{\rm br}\rceil$2, independent of grid size.
• Gate Count: $\lceil\log_2N_{\rm br}\rceil$3 for the selector tree and $\lceil\log_2N_{\rm br}\rceil$4 for the multi-controlled $\lceil\log_2N_{\rm br}\rceil$5 rotations.
• Circuit Depth: $\lceil\log_2N_{\rm br}\rceil$6, with an explicit example: for $\lceil\log_2N_{\rm br}\rceil$7 (three-point stencil) only $\lceil\log_2N_{\rm br}\rceil$8 selector qubits and $\lceil\log_2N_{\rm br}\rceil$9 gates untranspiled.

All costs depend only on the stencil branch number, not the global mesh size or shape. This structure enables simple orchestration and high parallelism.

4. Classical Orchestration and Batching Strategies

Given the independence of node-local circuits, overheads can be amortized via batching techniques:

• Batched Submission: Group $$|\psi_{\rm sel}\rangle = \sum_{i=0}^{N_{\rm br}-1}\sqrt{p_i}\,|i\rangle$$0 node update circuits per QPU job to pay queue and transpilation overhead $$|\psi_{\rm sel}\rangle = \sum_{i=0}^{N_{\rm br}-1}\sqrt{p_i}\,|i\rangle$$1 only once for the batch.
• In-Circuit Fusion (ICF): Lay out $$|\psi_{\rm sel}\rangle = \sum_{i=0}^{N_{\rm br}-1}\sqrt{p_i}\,|i\rangle$$2 node circuits on non-overlapping qubit sets in a single, wider circuit. Each shot yields a simultaneous outcome for all $$|\psi_{\rm sel}\rangle = \sum_{i=0}^{N_{\rm br}-1}\sqrt{p_i}\,|i\rangle$$3 nodes. The total qubit count rises to $$|\psi_{\rm sel}\rangle = \sum_{i=0}^{N_{\rm br}-1}\sqrt{p_i}\,|i\rangle$$4, and circuit depth increases marginally due to HW routing constraints.

The orchestration loop processes all nodes by building, submitting, and collecting quantum results in batches, with sample means forming the updated grid function at each timestep. Pseudocode from (Markidis et al., 16 Nov 2025):

$R_y$4

Overlapping circuit build, job submission, and result retrieval can further hide latency.

5. Empirical Performance and Comparison

Extensive testing covers both simulators and NISQ hardware (Markidis et al., 16 Nov 2025):

Platform	$$|\psi_{\rm sel}\rangle = \sum_{i=0}^{N_{\rm br}-1}\sqrt{p_i}\,|i\rangle$$5 (branching)	$$|\psi_{\rm sel}\rangle = \sum_{i=0}^{N_{\rm br}-1}\sqrt{p_i}\,|i\rangle$$6 (branching)	$$|\psi_{\rm sel}\rangle = \sum_{i=0}^{N_{\rm br}-1}\sqrt{p_i}\,|i\rangle$$7 (bernoulli)	$$|\psi_{\rm sel}\rangle = \sum_{i=0}^{N_{\rm br}-1}\sqrt{p_i}\,|i\rangle$$8 (bernoulli)	Depth (branching)	Depth (bernoulli)	2Q Gates (branching)
Simulator	$$|\psi_{\rm sel}\rangle = \sum_{i=0}^{N_{\rm br}-1}\sqrt{p_i}\,|i\rangle$$90 (with $p_i = \frac{w_i}{\sum_j w_j}.$0)	decays as $p_i = \frac{w_i}{\sum_j w_j}.$1	–	–	–	–	–
IBM Brisbane	0.412	0.162	0.085 ($p_i = \frac{w_i}{\sum_j w_j}.$2 mitigated)	0.037	118	3	29

• On noiseless simulators: error in space decays as $p_i = \frac{w_i}{\sum_j w_j}.$3 with the number of samples $p_i = \frac{w_i}{\sum_j w_j}.$4; for 3-point heat and Burgers’ stencils, long-term stability is maintained.
• On IBM Brisbane, the branching kernel’s oscillator circuit depth and two-qubit gate count lead to high error dominated by device noise, showing little improvement with increased shot number. In contrast, the Bernoulli micro-kernel—single-qubit only—yields much lower error and circuit depth.
• Hardware run telemetry for $p_i = \frac{w_i}{\sum_j w_j}.$5 node grid and $p_i = \frac{w_i}{\sum_j w_j}.$6 shots shows per-node wall times: $p_i = \frac{w_i}{\sum_j w_j}.$7s (branching 4k), $p_i = \frac{w_i}{\sum_j w_j}.$8s (branching 30k), $p_i = \frac{w_i}{\sum_j w_j}.$9s (bernoulli 4k, $R_y$0 circuits/node).

A plausible implication is that the branching micro-kernel will become more effective as two-qubit gate fidelities and coherence times improve, closing the gap to the Bernoulli variant as a practical NISQ primitive.

6. Practical Considerations and Recommendations

• Until high-fidelity multi-qubit hardware is available, the Bernoulli micro-kernel is recommended due to low error and no two-qubit gates.
• Readout-assignment error mitigation yields modest improvements that saturate when device noise is high.
• Batching and in-circuit fusion can reduce launch overhead by up to two orders of magnitude, at the cost of additional qubit resources and depth inflation.
• Spatially and temporally adaptive shot allocation—targeting regions of high stencil variation (branching) or high variance (Bernoulli)—can optimize resource use.
• For elliptic (global-coupling) PDEs, local micro-kernels are insufficient; global or spectral quantum circuit constructions are required.
• The introduction of quantum amplitude estimation may further accelerate convergence ($R_y$1), contingent on the availability of deeper and more robust circuits.

7. Implications and Future Directions

The branching micro-kernel exemplifies a node-local approach to mapping classical stencils into shallow quantum circuits, achieving $R_y$2 qubit scaling and $R_y$3 depth. This design captures categorical mixing in superposition, enabling quantum acceleration of Monte Carlo estimators for explicit stencil updates. While current NISQ-era noise strongly favors depth-minimal primitives, the branching approach is likely to become attractive with next-generation QPU gate quality. Its sampling-core structure is fundamental in differentiating local quantum acceleration of classical PDE solvers from fully-quantized, global quantum algorithms (Markidis et al., 16 Nov 2025).