Belle II Level-1 Trigger

• Belle II Level-1 Trigger is a real-time event selection system at the SuperKEKB collider, using FPGA pipelines to filter raw data from MHz to ~30 kHz.
• It integrates both conventional analytic methods and neural networks, including deep attention and graph neural networks, to perform precise track and vertex reconstruction.
• The system achieves 1–2 cm z-vertex resolution while effectively suppressing beam-induced backgrounds, enabling high-efficiency data acquisition in high-luminosity conditions.

The Belle II Level-1 (L1) Trigger is the real-time event selection system at the SuperKEKB $e^+e^-$ collider, responsible for reducing raw detector data rates from MHz to the $\sim$30 kHz range suitable for downstream acquisition and storage. Its central challenge is to suppress beam-induced background while retaining essentially all physics events of interest. The L1 trigger is implemented as a segmentally parallel pipeline anchored on FPGA farms, with dedicated logic for each detector subsystem, most notably the Central Drift Chamber (CDC) where charged-particle tracking and vertex discrimination are performed via a combination of analytic algorithms and machine-learning inference flows. Recent upgrades embed both classical pattern recognition and neural architectures—including deep attention models and graph neural networks—for hit filtering, track parameter regression, and global decision making.

1. CDC Trigger Chain and Level-1 System Segmentation

At the core of the Belle II L1 architecture is the CDC tracking chain. The CDC comprises 56 wire layers grouped into nine superlayers (SLs), alternating axial and stereo geometries. Hits on sense wires are digitized at 63.5 MHz by front-end electronics (FEE), merged, and assembled into “track segments” (TS) by the Track Segment Finder (TSF), which aggregates up to five adjacent layers to suppress noise (TS fires for $\geq$4 hits per pattern). TSs carry identifiers, drift times (2 ns resolution), and left/right ambiguity bits.

Three principal CDC tracking branches operate in parallel:

• A 2D Hough-transform track finder uses axial TSs to reconstruct $(r,\varphi)$ track candidates, providing estimates of $p_T$ and $\varphi$ at the vertex.
• A conventional 3D helix fitter augments 2D seeds with stereo hits to analytically regress the $z$-vertex position and track polar angle.
• A neural network (NN) z-vertex trigger applies sector-specialized Multi-Layer Perceptrons (MLPs) to stereo and axial drift times, achieving rapid $z$-vertex and $\theta$ regression without explicit full track reconstruction.

Outputs from all branches are consolidated in hardware-global logic for the final L1 trigger decision.

2. Neural Network z-Vertex Trigger: Sectorization, Architecture, and Inference

The neural z-vertex trigger exploits a sectorized ensemble of feed-forward MLPs, each trained to regress the longitudinal event vertex $z$ for tracks falling within narrow phase-space bins. The preprocessing chain proceeds as follows:

• Extract $\sim$0 for each track from 2D CDC seeds, localizing tracks into narrow sectors of phase space.
• For each sector, select the subset of relevant TSs (typically $\sim$1 of the 2336 total) likely to be hit by tracks in that region.
• Map hit information for relevant TSs into network input representations. Four main codings are used:
  • Rep1: one input per relevant TS; normalized drift time $\sim$2 sign for left/right.
  • Rep2: per-SL, earliest drift and wire-ID input (for $\sim$3 inputs).
  • Rep3: Rep2 plus relative azimuthal angle $\sim$4 (making the network $\sim$5-independent).
  • Rep4: Rep3 plus scaled arc length $\sim$6, providing linearization in the $\sim$7–$\sim$8 plane, for 27 inputs per SL.

Each sector hosts a small, uniform-size MLP (one or two hidden layers) with the hyperbolic tangent activation: $\sim$9. The single output node yields the scaled $\geq$0-vertex, $\geq$1, with $\geq$2 sector-dependent scalings absorbed in the network parameters.

Network training seeks to minimize $\geq$3 on simulated tracks filtered to the sector’s bounds. In practice, a staged cascade is adopted: a primary MLP (indexed by $\geq$4) provides coarse estimates of $\geq$5 and $\geq$6; secondary MLPs in refined $\geq$7 sectors yield final $\geq$8 resolution. This arrangement is necessary to resolve the entanglement of stereo hit patterns with $\geq$9 and $(r,\varphi)$0.

3. Performance Metrics and Sector Model Optimization

Performance validation employs Geant-4–based CDC simulation with test sectors $(r,\varphi)$1 GeV$(r,\varphi)$2, $(r,\varphi)$3, $(r,\varphi)$4 and $(r,\varphi)$5 cm. Across all input representations (Rep1–4):

• Achievable core $(r,\varphi)$6 resolution is $(r,\varphi)$71–2 cm, comfortably surpassing the $(r,\varphi)$8 cm requirement for effective background rejection.
• For high-$(r,\varphi)$9, rep4 yields $p_T$0 cm; for low-$p_T$1, $p_T$2 cm.
• Primary MLPs (without $p_T$3) already outperform the analytic 3D trigger ($p_T$4 cm), giving $p_T$5–4 cm, $p_T$6 over the $p_T$7 spectrum.
• A full cascade (primary and secondary MLP) is expected to approach or surpass the sub-2 cm goal.

4. Hardware Implementation and FPGA Constraints

Implementation targets Xilinx Virtex-7 FPGAs, partitioned into four boards for the CDC quadrants. The pipelined architecture leverages deterministic parallelization: neurons are mapped to DSP blocks, activations to look-up tables, input decoding and feature transformations are implemented as hardware modules.

• TS decoding, sector lookup, coordinate transforms ($p_T$8, $p_T$9), and MLP inference together fit within the $\varphi$01 μs slice of the $\varphi$1-vertex finding budget.
• Real-time neural $\varphi$2-vertex estimates are produced within the L1 deadline, allowing integration into the Global Decision Logic for event-level filtering under high-luminosity conditions.

5. Comparative Analysis and System-Level Integration

The NN z-vertex trigger forms one component of a diversified trigger system. Conventional 3D helix fitters, graph neural network (GNN)-based hit filters, and deep attention-augmented DNN track triggers complement the MLP trigger, each targeting particular noise regimes, detector regions, or topology classes. Notably:

• The analytic 3D helix fitter is less precise than the NN trigger in $\varphi$3 reconstruction, particularly for off-axis tracks.
• GNN-based hit filtering can suppress occupancy-driven backgrounds at the raw hit level by $\varphi$4 with $\varphi$5 signal efficiency, and operates at 31.8 MHz throughput per sector (Heine et al., 6 Nov 2025).
• Deep attention DNN upgrades (with simplified self-attention, LeakyReLU, and massive quantization/pruning) further reduce CDC track-trigger rates by $\varphi$6 while raising signal efficiency from $\varphi$7 to $\varphi$8 for $\varphi$9 GeV (Liu et al., 3 Oct 2025).

The full CDC L1 trigger pipeline, from raw hits through segmentation, sector selection, NN+classic regression, and topology logic, ensures fast, pure, and high-efficiency data acquisition across a broad range of collider conditions.

6. Background Suppression and High-Luminosity Operation

The primary function of sectorized NN z-vertex regression within L1 trigger logic is to suppress Touschek and beam-gas backgrounds arising from tracks originating far from the interaction point. Efficient $z$0-vertex determination, at $z$1 cm resolution, enables $z$2 cuts to reject up to $z$3 of off-vertex tracks within a $z$4s total latency. Sectorization and staged MLP cascades yield robust discrimination throughout the angular and momentum acceptance, and FPGA pipelining supports the $z$5 kHz global accept rate constraint at SuperKEKB design luminosity.

A plausible implication is that further increases in collider background can be managed by extending NN depth, increasing sector granularity, and integrating additional GNN/DNN-based hit- and topology-level filters, capitalizing on the parallelism available in modern FPGA platforms.

7. Outlook and Future Directions

The Belle II Level-1 trigger neural z-vertex system demonstrates that staged, highly parallel neural inference on FPGAs delivers resolution, efficiency, and throughput adequate for next-generation flavor physics. Ongoing hardware upgrades—toward larger UltraScale+ devices, expanded BRAM/DSP allocations, and deeper network integration—promise further performance gains in resolution, rejection, and cross-trigger matching. Additionally, the sectorized expert architecture provides a template for similar applications in other collider environments demanding sub-microsecond vertex discrimination and online background suppression.