Automated Photonic Circuit Discovery

• Automated photonic circuit discovery is a suite of algorithmic and machine learning methods that convert high-level circuit specifications into manufacturable photonic designs with minimal human intervention.
• It integrates techniques such as term rewriting, inverse design via variational autoencoders, and evolutionary topology search to optimize performance metrics like footprint reduction and energy efficiency.
• The approach spans quantum photonics, programmable photonic cores, and automated layout routing, accelerating innovation and ensuring compatibility with foundry design rules.

Automated photonic circuit discovery refers to the ensemble of algorithmic, computational, and formal methods that transform high-level circuit specifications or functional requirements into validated, fabricable photonic circuit designs with minimal human intervention. This domain encompasses inverse design strategies, term-rewriting systems, evolutionary and deep generative models, gradient-based and gradient-free optimization on discrete and continuous search spaces, and agentic frameworks that incorporate natural language reasoning and automated verification. The goal is to accelerate photonic circuit innovation, improve reliability, and enable scalable deployment for applications ranging from quantum information processing and analog computing to optical interconnects and AI acceleration.

1. Formal Representations and Term Rewriting for Quantum Photonics

Early approaches to automated photonic circuit discovery in the quantum domain employed term rewriting frameworks to systematically transform netlist-based circuit specifications into dynamical models suitable for analysis and simulation (Sarma et al., 2012). Circuits are specified as netlists (such as in Modelica), with nodes representing quantum optical components and connections representing photonic links. The transformation process is hierarchically organized in three main stages:

• Netlist to Algebraic Intermediate: Pattern matching and string replacement (e.g., inserting loss elements to model propagation loss).
• Algebraic Intermediate to Gough–James Algebra: Each component is mapped to an (S, L, H) triple—scattering matrix, coupling vector, and Hamiltonian—combined via series ($\lhd$) and concatenation ($\boxplus$) products, with auxiliary operators for permutations and feedback.
• Algebraic Reduction: Operator-level rewrite rules collapse the composite algebraic structure to a compact (S, L, H) model:

$$B \lhd A \rightarrow (S_B S_A, L_B + S_B L_A, H_B + H_A + \mathrm{Im}\{L_B^\dagger S_B L_A\})$$

$$B \boxplus A \rightarrow (S_B \oplus S_A, L_B \oplus L_A, H_B + H_A)$$

Feedback loops and wiring permutations are handled explicitly.

Symbolic automation (typically in Mathematica) supports recursive application of rules, providing rigorous synthesis, verification (by matching derived Lindblad operators to logical system diagrams), and robustness analysis (propagation of losses through the circuit structure). The formal equivalence to electrical engineering methodologies, and the ease of incorporating robustness to photonic errors, position term rewriting as a foundational methodology in automated circuit discovery for quantum photonics.

2. AI-guided Inverse Design and Latent Space Optimization

With increased device complexity, trial-and-error methods became infeasible and machine learning-based inverse design methods emerged. A hybrid strategy using variational autoencoders (VAE) and evolution strategies (ES) (Liu et al., 2019) advances the field by encoding discrete and continuous photonic structures into a compact, differentiable latent space and searching for optimal structures using evolutionary operators. The workflow is:

• Dataset encoding: Thousands of binary pixel patterns (e.g., unit cells of metasurfaces) are compressed into a low-dimensional latent space.
• Evolution in latent space: Fitness is evaluated by reconstructing a pattern from a latent vector, simulating its optical response (with neural surrogates or FEM), and computing the distance to the target spectrum via a non-differentiable fitness function.
• Evolutionary operations: Selection, crossover, interpolation, and mutation—using Gaussian noise—allow efficient navigation of complex design landscapes not amenable to gradient methods.
• Zero prior geometric knowledge: The method permits exploration of highly non-intuitive designs and enables rapid prototyping (e.g., 95%+ accuracy in metasurface design, ~5 seconds per cycle), extensible to multi-layer and 3D photonic structures.

This approach circumvents the differentiability limitations of physical simulation and allows direct incorporation of arbitrary performance targets, including those for which closed-form gradients are unavailable.

3. Differentiable and Evolutionary Topology Search for Programmable Photonic Cores

Automated photonic tensor core (PTC) design—a cornerstone for photonic AI accelerators—demands both topological flexibility and compatibility with silicon photonics foundries. Two paradigms currently dominate:

• Differentiable SuperMesh Search: ADEPT (Gu et al., 2021) parameterizes the entire search space via a probabilistic "SuperMesh" of phase shifters, directional couplers (DC), and waveguide crossings (CR) and employs gradient-based search (with techniques like Gumbel-Softmax for block selection and Birkhoff relaxations for permutation layers). Foundry-aware constraints and stochastic regularization permit end-to-end hardware- and area-adaptive design. ADEPT achieves up to 30× footprint reduction over MZI-mesh baselines and superior noise robustness.
• Zero-shot, Multi-objective Evolution: ADEPT-Z (Jiang et al., 2 Oct 2024) extends this architecture by framing topology search as a multi-objective optimization, co-optimizing accuracy (via zero-shot expressivity proxies), compute density, and energy efficiency under strict area/power/latency constraints. It encodes circuit topologies as sequences of discrete gene parameters (block counts, couplers, permutations), operates with NSGA-II–based evolutionary search, and dispenses with the need for differentiable objectives. Pareto fronts—offering >2× accuracy-weighted EE over hand/tensor architectures—are obtained orders of magnitude faster than differentiable designs and yield highly unconventional, foundry-adaptive topologies.

Both approaches support arbitrary hardware constraints, non-differentiable objectives, and are directly compatible with foundry process design kits (PDKs), providing scalable and fabrication-aware solutions for programmable photonic computing.

4. Automated Physical Layout: Curvy Waveguide Routing and Hierarchical Design

Large-scale PICs require detailed routing of optical waveguides, a problem ill-suited to electronic routing paradigms favoring Manhattan geometries and neglecting photonic constraints such as bend radius, port alignment, and low insertion loss. Dedicated tools such as APR (Zhou et al., 2 Oct 2024) and LiDAR 2.0 (Zhou et al., 22 May 2025) introduce breakthroughs in automated routing:

• Curvy-aware A* Search: Routing states encode x–y position and orientation. Neighbor candidates are generated parametrically based on allowable bends (e.g., ±45°, ±90°) determined by the minimal bend radius and grid size.
• Cost Functions: The path cost integrates waveguide length, bend and crossing loss, and groupwise congestion penalties. The routing engine inserts crossings adaptively (only when perpendicular, with sufficient length and spacing).
• Design-Rule Awareness: Geometry checks ensure DRV-freeness in high-density layouts. Local rip-up and reroute mechanisms resolve conflicts dynamically.
• Hierarchical Routing (LiDAR 2.0): Repeated submodules are recognized and reused, while redundant-bend elimination and crossing-space preservation minimize insertion loss and maximize routability.
• YAML-based Intermediate Representations: Modular, hierarchical circuit descriptions decouple schematic-level connectivity from layout, facilitating large-scale benchmarking and automated toolchain integration.

These tools yield DRV-free layouts with up to 16% lower insertion losses and 7.69× speedup in complex benchmarks compared to schematic-driven or VLSI-adapted tools, allowing rapid, manufacturable photonic system design.

5. Agentic and LLM-based Schematic Generation and End-to-End Automation

With the rise of natural-language processing and foundation models, frameworks such as PhIDO (Sharma et al., 18 Aug 2025) and PICBench (Wu et al., 5 Feb 2025) operationalize end-to-end PIC design discovery:

• Multi-agent Workflows: PhIDO orchestrates LLM-driven agents to parse free-form natural language into machine-interpretable templates, select components from PDKs, configure parameters, and generate detailed schematics which are then mapped to GDSII layouts via algorithmic placement and routing. Chain-of-thought reasoning, Pydantic schema validation, and RAG-based retrieval ensure robust entity extraction and schematic correctness. Circuit verification leverages simulation-based DRC and S-parameter analysis.
• Benchmarking and Evaluation: PICBench focuses on benchmarking LLM performance on natural language–to–netlist problems using simulation-based Pass@k evaluation with a feedback/refinement loop. Data indicates pass@5 rates of ~57% for designs <=15 components, with failures arising primarily in entity extraction and schematic translation for larger circuits. Emphasis is placed on strict schema adherence and iterative feedback for improving design correctness.

Such frameworks show practical promise for routine automation of schematic entry through to layout, though challenges remain in handling hierarchical/nested constructs, parameter extraction, and context transfer between reasoning agents.

6. Automated Discovery for Quantum and Topological Circuitry

Quantum photonic and topological photonic circuit discovery leverage a combination of rigorous mathematical frameworks and simulation-optimization pipelines:

• Graph-based and Polynomial-encoded Quantum Circuit Synthesis: A two-pass optimization (dense unitary design + circuit sparsification) using FFT-based polynomial simulation (Hartnett et al., 22 Aug 2025) is employed to maximize success probabilities for heralded graph state generation. Circuit discovery is fully differentiable (enabling gradient-based fidelity/success optimization) and includes a regularization phase to minimize beamsplitter count and reveal circuits with underlying rational coefficients. The methodology surpasses baseline fusion-based constructions by up to 7.5× in success probability for 5-qubit states and discovers the first known designs for several graphs.
• Symmetry-constrained Inverse Design for Topological PhCs: A combined global (randomized DIRECT–L) and local (Sbplx/ISRES) optimization on symmetry-reduced Fourier level-set parameterizations identifies 3D photonic crystals with specified band topologies—including nodal lines, Weyl points, and Chern bands—without prior geometric knowledge (Kim et al., 2022). The method efficiently enforces discrete symmetry indicator constraints in a non-convex objective and generalizes to arbitrary symmetry-induced topological phases, signifying a shift toward large-scale automated materials discovery in photonics.

7. Challenges, Future Directions, and Integration

Automated photonic circuit discovery, in its current state, addresses critical bottlenecks in both schematic generation and physical layout. Prevailing challenges include high-dimensional optimization in photonic mesh synthesis (especially for multi-functional or reconfigurable PPICs (Gao et al., 2022)), error propagation in multi-agent LLM architectures, and adaptability to diverse foundries and non-idealities (including process variations, thermal crosstalk, and loss). Prominent directions for further development, as indicated across the literature, comprise:

• Full EPDA Pipelines: The integration of device-level robust inverse design (e.g., PoLaRIS–InvDes (Zhou et al., 30 Jul 2025)) with system-level routable placement (e.g., Apollo) and curvy-aware detailed routing (e.g., LiDAR) into a seamless, fabrication-aware pipeline accelerates innovation and mass-producibility.
• Surrogate Modeling and ML Augmentation: Physics-informed neural surrogates for device simulation and sensitivity analysis reduce design evaluation times and facilitate large-scale optimization under practical constraints.
• Feedback-intensive, Autonomous Loops: The incorporation of simulation/verification modules (optical DRC, FDTD, S-parameter checks) and robotic automation for experimental feedback (closing the loop) is seen as the next frontier for "self-driving" PIC labs.
• Standardization and Knowledge Representation: Emphasis is placed on scalable, formally specified intermediate representations (e.g., YAML-based IRs, DSLs with Pydantic schema) to decouple logical design from physical realization.
• Discovery and Design of Topologically Robust Devices: Flexible platforms (e.g., programmable topological chips (Dai et al., 13 Mar 2024)) are envisioned to interface with automated design flows, rapidly exploring new photonic phases and leveraging disorder-induced phenomena (e.g., topological Anderson transitions).

Automated photonic circuit discovery, as evidenced by recent advances, is transitioning from hand-crafted, ad hoc methodologies toward fully algorithmic, data-driven, and fabrication-aware pipelines spanning quantum, neuromorphic, topological, analog, and digital photonic domains. This convergence is setting the groundwork for scalable, reliable, and application-diverse photonic system development.