Factorized Boolean representations for efficient quantum synthesis

Abstract: Quantum algorithms promise advantages beyond classical reach, but running them on error-corrected hardware requires translating Boolean specifications into reversible circuits, and the resources that translation demands determine what is executable. Established methods minimize a Boolean expression and map it to a circuit, assuming the minimized form is best. Here we show that minimized expressions retain algebraic structure minimization cannot reach, arising from containment and complementary-polarity relationships among their terms, and that extracting it yields circuits cheaper to execute despite having more operations. The decisive quantity is not a circuit's operation count but the control count of its widest operation, a superlinear cost; extracting shared factors trades a few wide operations for many narrow ones and reduces qubit count. Across benchmarks and oracles from quantum search and factoring algorithms, at the representation level the transformation never increases either cost measure, a guarantee from its construction. Translation to an executable circuit returns part of that advantage, since auxiliary lines must be uncomputed, yet the factorized circuit still left a leading circuit-level optimizer reaching lower final counts, and faster, than unaided. The representation of a computation is therefore itself a resource, optimizable before compilation and distinct from both logic minimization and circuit-level optimization.

• The paper introduces a novel factorization method to optimize reversible and quantum synthesis by reducing gate arity, though it may temporarily increase gate count, ensuring fewer quantum resources are utilized.
• By adressing the superlinear dependency on quantum efficacy finesse and linear improvement on T-count, factorizations benefits extend beyond mere gate count, optimizing both cost-effectiveness scalable and efficiency reductions.
• Containment factorization and complementary-polarity factorization are employed to exploit latent algebraic structures in minimized Boolean expressions, effectively redistributing control complexity for enhanced optimization.

The paper develops a representation-level optimization method for reversible and quantum synthesis based on factorizing Boolean expressions after conventional ESOP minimization. Its central claim is that minimizing the number of product terms or literals is not equivalent to minimizing the cost of the resulting quantum circuit. In the cost models used, the dominant variable is the arity of multi-controlled operations, whose decomposition cost grows superlinearly with the number of controls. The proposed method therefore targets latent algebraic structure in minimized expressions—specifically containment and complementary-polarity relationships—rather than expression size alone (2608.27430).

Problem formulation and central thesis

Fault-tolerant implementations of Boolean functions require reversible circuits whose non-Clifford resource requirements can be substantial. The paper focuses on the synthesis of ESOP representations into multi-controlled reversible gates, emphasizing that a minimized expression can still contain product terms with shared structure. Conventional synthesis maps each product term independently to a controlled operation. Under this mapping, the widest product term determines the largest gate arity, and a small number of wide gates can dominate the total cost.

The paper uses two resource models. The Maslov quantum-cost model assigns an $n$-control Toffoli operation a cost of $2^{n+1}-3$, while the T-count model assigns it $4(n-1)$ T gates under a measurement-assisted AND-tree decomposition. These models emphasize different aspects of synthesis, but both penalize wide gates. The resulting optimization objective is therefore structurally different from minimizing term count, literal count, or total gate count.

The proposed factorization deliberately accepts an increase in the number of operations when it reduces their arity. The paper’s most important conceptual claim is consequently that a circuit can contain more gates and nevertheless require fewer quantum resources, because replacing a few wide operations with several narrow operations exploits the superlinear arity dependence of quantum cost and the linear but still favorable dependence of T-count.

Factorization mechanisms

The framework operates on a minimized Boolean expression and applies two transformations.

Containment factorization identifies terms in which the literals of one cube are contained in another. A shared product is computed once and reused, while the residual literals are applied through auxiliary-controlled operations. In schematic form, an expression containing a term $L$ and a more specific term $LR$ can be reorganized so that the common factor $L$ is represented explicitly. This replaces two independently controlled gates with operations whose control structures are separated between the residual and shared portions.

Complementary-polarity factorization handles terms that share literals but differ in the polarity of one or more variables. The common literals form a shared factor, while the polarity differences are retained in the residual expressions. The resulting Product-Sum-EXOR structure computes the shared product once and reuses it across the related terms. This transformation can replace two gates with three narrower gates, but the new gates have substantially smaller control sets.

The containment stage evaluates candidate merges explicitly and accepts only strictly positive quantum-cost reductions. Candidate pairs are selected greedily according to the largest local cost reduction, with tie-breaking based on cube distance and residual literal count. The complementary-polarity stage constructs a weighted graph over product terms, with edge weights equal to the number of shared literals, and applies a greedy maximum-weight matching so that each term participates in at most one polarity-based merge.

The paper derives a monotonicity result for the representation-level T-count. If the shared factor has $|L|$ literals, containment factorization changes the T-count by $4(|L|-1)$ in the favorable direction, whereas complementary-polarity factorization reduces it by $4|L|$. Thus, under the stated decomposition model, neither transformation increases T-count. Containment with a one-literal factor is T-count neutral and is retained only when it reduces quantum cost. This is a formal property of the representation-level model; it does not automatically extend to fully decomposed executable circuits because auxiliary-line uncomputation introduces additional operations.

Auxiliary qubits are used to store extracted factors. The reported implementation returns them to $|0\rangle$ by measurement-based uncomputation and reuses them across factor groups. Across all 64 benchmark functions, the peak number of simultaneously live auxiliary qubits was two, including functions with up to 100 variables and 600 product terms. This bounded auxiliary footprint is important because the method does not exchange reduced gate arity for an unbounded increase in workspace.

Benchmark methodology and representation-level results

The evaluation covers 64 single-output Boolean functions: 37 structured RevLib and EPFL benchmarks, 14 randomly generated 100-variable functions with 200–600 product terms, and 13 oracle functions derived from quantum-algorithm primitives. Baseline ESOP expressions were generated with EXORCISM-4, after which the factorization procedure was applied without changing the baseline minimizer. Functional equivalence was verified exhaustively for functions with at most 20 variables and by random sampling for larger functions.

At the representation level, factorization reduced quantum cost for 56 of 64 functions and left the remaining eight unchanged. It increased neither quantum cost nor T-count for any function. The median quantum-cost reduction was 42.7%, and the median T-count reduction was 28.6%. These results directly support the paper’s claim that the method exploits structure already present in minimized expressions without imposing a penalty when that structure is absent.

The effect depends strongly on function class rather than merely on input size. Structured benchmarks achieved a median quantum-cost reduction of 49.7%, while algorithm-derived oracles achieved 61.9%. Random 100-variable functions achieved only 32.9%. The weak performance on random functions is consistent with the absence of containment relationships: in the generated instances, shared literals with matching polarity are statistically unlikely across long product terms. The eight unchanged functions were predominantly XOR-dominated or single-term functions with little multi-controlled structure. Their unchanged cost is evidence of the method’s conservative acceptance criterion, not evidence that factorization is universally beneficial.

The structural nature of the optimization is particularly clear in the gate-width statistics. Total gate count increased for 51 of 64 functions, while the maximum gate size decreased for 38 and increased for none. The largest gate encountered was reduced from 86 controls to 48. This inverse movement between gate count and maximum arity is the defining signature of the proposed method. It also establishes why gate-count-based assessments would mischaracterize the transformation: the method is not primarily eliminating operations; it is redistributing control complexity.

The paper also evaluates a more conservative quantum-cost model in which the baseline is allowed auxiliary qubits for decomposing multi-controlled gates. The factorized representation continues to improve cost, although the median reduction falls from 35.7% under the ancilla-free Maslov model to 27.7% under the auxiliary-aware model. For the illustrative con1f1 function, the reduction is 46% under the conservative model, compared with 58% under the ancilla-free model. This comparison weakens the possibility that the reported advantage is solely an artifact of assigning exponentially high cost to wide gates in the baseline.

Interaction with circuit-level optimization

A central strength of the paper is its separation of representation-level resource estimates from executable-circuit measurements. Both conventional and factorized representations were exported to OpenQASM, decomposed into a Clifford+T basis, uncomputed, and optimized using PyZX. This distinction is necessary because the representation-level model does not charge all costs associated with realizing and cleaning up auxiliary lines.

After executable translation but before PyZX optimization, the advantage was reduced. Across 34 completed comparisons with nonzero T-count, factorization produced a median T-count reduction of 16.7%, compared with 33.5% under the representation-level model. In three cases, the factorized circuit had a higher pre-optimization T-count than the conventional circuit. The implication is that the formal monotonicity guarantee is not an end-to-end guarantee for decomposed circuits. Auxiliary-line management and basis-level synthesis can reverse individual comparisons.

Nevertheless, factorization improved the result obtained by circuit-level optimization. PyZX applied to conventional circuits achieved a median T-count reduction of 42.3%, whereas PyZX applied to factorized circuits achieved 53.4%. Among the 34 completed comparisons, the factorized realization produced the lower optimized T-count in 24 cases, compared with five for the conventional realization, with five ties. On the 29 decided cases, the two-sided sign test gave $2^{n+1}-3$0. The median additional reduction attributable to factorization after PyZX optimization was 17.8%.

These results support a complementary rather than competitive relationship between the two optimization levels. PyZX can reduce T-count more aggressively than factorization alone, but it benefits from receiving a representation with lower-width and more structured operations. The factorization stage exposes transformations that PyZX does not consistently discover from the conventional realization.

The largest completed comparisons reinforce this conclusion. For seven benchmarks requiring more than ten minutes of PyZX optimization, factorization led to a lower optimized T-count in every case. PyZX reduced conventional circuits by a median of 42.8%, and factorized circuits by 51.0%, corresponding to an additional reduction of 247–1,021 T gates per instance. The optimizer also ran faster on factorized inputs, by factors of 1.9–8.4, with a median speedup of 3.2. The reported optimization ratios were relatively stable across circuit sizes, suggesting that the two methods act on partly distinct structural features.

The two largest instances were output bits of $2^{n+1}-3$1. In one case, factorization reduced the pre-optimization T-count from 5,876 to 3,680 and produced an optimized count of 4,489 versus 4,863 for the optimized conventional circuit, while reducing optimization time from 68,586 seconds to 35,745 seconds. In the widest attempted instance, the factorized representation reduced T-count from 10,129 to 8,764 and qubit count from 663 to 464. PyZX completed on the factorized circuit after 13.3 hours, reaching 5,110 T gates, whereas the conventional circuit did not complete within 24 hours. The latter comparison is not included in paired optimized-count statistics, but it demonstrates that representation-level preprocessing can determine whether downstream optimization is computationally tractable.

Qubit count provides a separate benefit. Among 50 exported comparisons, factorization reduced qubit count in 39, left it unchanged in 10, and increased it in one. Among the improved cases, the median reduction was 28.1%. For the seven largest completed comparisons, the median reduction was 32.2%, with individual reductions from 26.3% to 46.6%. PyZX did not produce comparable qubit reductions because it preserved the qubit footprint. Thus, factorization affects both magic-state consumption and the width of the fault-tolerant circuit, although these conclusions remain conditional on the chosen decomposition and uncomputation procedures.

Results on quantum-algorithm oracles

The oracle experiments test whether factorable structure occurs in Boolean functions derived from quantum algorithms rather than only in curated logic-synthesis benchmarks. The suite includes modular-exponentiation output bits associated with Shor-style arithmetic, ripple-carry adder outputs, and majority functions.

Across 13 oracle instances, the median quantum-cost reduction was 61.9% and the median T-count reduction was 38.5%. Modular-exponentiation output bits produced a median quantum-cost reduction of 73.2% and a median T-count reduction of 37.9%, excluding two degenerate instances from the modular-exponentiation median. Ripple-carry adder bits achieved reductions of 48.4% in quantum cost and 49.0% in T-count, while majority functions achieved 68.6% and 40.5%, respectively.

For two measured output bits of $2^{n+1}-3$2, conventional synthesis required 5,876 magic states under the stated one-T-gate-per-state accounting, compared with 3,680 for factorized synthesis, a 37% reduction. The functions were identical; the reduction arose solely from the representation chosen for synthesis.

The scope of these oracle results is limited. The oracles were synthesized from truth tables and represent individual output functions, not complete implementations of Shor’s algorithm or modular exponentiation at cryptographic scales. The experiments establish that exploitable algebraic structure occurs in algorithmically derived Boolean functions, but they do not establish comparable reductions for full large-scale algorithmic circuits.

Compositional scaling beyond truth-table synthesis

The paper addresses the principal scalability limitation of truth-table-based synthesis by applying factorization to repeated cells in compositionally generated modular-exponentiation circuits. A 16-bit circuit with 619,792 gates, 120 qubits, and a T-count of 955,968 was generated in under one second. This construction avoids enumerating the full Boolean function, whose truth table would already contain 65,536 rows for a single 16-bit output and more than four billion rows at 32 bits.

Because factorization is applied to Boolean blocks rather than directly to arbitrary gate sequences, the authors recover algebraic normal forms for local circuit cells. The selected majority and unmajority cells read at most seven wires, whereas a complete adder can read 39 wires and becomes infeasible for direct truth-table conversion. Distinct cells are factorized once and their contributions are weighted by the number of instances in the complete circuit.

Across 4-, 5-, 6-, and 8-bit modular constructions, the inventory contained 133, 133, 140, and 135 distinct cells, respectively, while the number of cell instances increased substantially. The resulting complete-circuit T-count reductions were 6.5%, 7.0%, 7.0%, and 6.7%; quantum-cost reductions were 3.3%, 3.0%, 3.0%, and 2.9%. All 541 distinct cells were exhaustively verified against their originating blocks.

These reductions are much smaller than those obtained for globally represented benchmark functions. The paper attributes this to the limited structural complexity of individual cells: 391 of the 541 distinct cells contained only two product terms, and none of those cells improved. Forty-five of the 46 improved cells had three terms. Factorization requires sufficiently rich relationships among multiple terms, but restricting the transformation to small cells prevents it from exploiting structure spanning cell boundaries.

The authors therefore present the compositional results as evidence of scaling behavior, not as evidence of large asymptotic savings. Under the observed near-invariant cell inventory, the measured approximately 6.7% T-count reduction is a width-independent estimate for the same arithmetic construction, including larger moduli. This is a projection based on repeated local structure rather than a direct factorization of a 2,048-bit circuit. The unresolved technical question is whether factorization can be applied across larger circuit blocks without incurring prohibitive Boolean conversion costs. The paper explicitly leaves that trade-off open.

Limitations and open questions

The reported guarantees are model-dependent. T-count monotonicity is proved for the local representation transformations under the specified $2^{n+1}-3$3 decomposition model. It does not guarantee monotonicity after Clifford+T decomposition, auxiliary-line uncomputation, routing, scheduling, connectivity adaptation, or fault-tolerant architecture-specific compilation. The observed increase in executable T-count for three of 34 pre-optimization comparisons demonstrates this distinction.

Correctness verification is also asymmetric across problem sizes. Functions with at most 20 variables are checked exhaustively, but the 100-variable functions are checked using 20,000 random assignments, which provides evidence rather than proof. The compositional experiments verify each cell exhaustively and validate the arithmetic generators extensively, but they do not provide end-to-end exhaustive verification of the full large-width circuits after factorization.

The factorization algorithms are heuristic. Containment selection is greedy, and complementary-polarity extraction uses greedy weighted matching rather than a globally optimal joint optimization over all possible factorizations. Consequently, the reported reductions are not upper bounds on what the representation class can achieve. The method also relies on the quality and form of the input ESOP minimizer; different minimization outputs may expose different factorization opportunities.

The most important scaling limitation is the granularity of factor extraction. Global truth-table synthesis is restricted to small numbers of variables, while local cell synthesis captures only relationships within bounded blocks. The approximately 6.7% compositional T-count reduction may therefore be a lower bound for the chosen construction, but it is not evidence that the larger reductions observed on small globally represented functions survive at cryptographically relevant widths. Whether one can identify larger blocks with sufficient shared structure while retaining tractable conversion and verification remains an open question specific to this framework.

Conclusion

The paper establishes factorized Boolean representation as a distinct optimization layer between Boolean minimization and reversible-circuit synthesis. Its key observation is that minimized expressions can retain containment and polarity structure that is invisible to term-count and literal-count objectives. By extracting that structure, the method trades increased operation count for reduced gate arity, auxiliary-qubit usage, T-count, quantum cost, and—after executable translation in many cases—overall qubit footprint.

Across 64 functions, the method reduced quantum cost for 56 without increasing either representation-level cost measure, achieving median reductions of 42.7% in quantum cost and 28.6% in T-count. On completed circuit-level comparisons, it improved the results of PyZX, yielding lower optimized T-count in 24 of 29 decided cases and reducing optimization time on the largest examples. The benefits were strongest for structured benchmarks and algorithmic oracles, weaker for random functions, and substantially smaller when factorization was confined to local arithmetic cells.

The evidence supports the paper’s narrower but consequential conclusion: the Boolean representation selected before reversible mapping is itself a quantum-synthesis resource. Its value is not captured by conventional logic minimization or by circuit-level optimization alone, and its effectiveness depends on the structural granularity at which factorization can be performed.