Radio frequency readout and control of Ge/SiGe hole spin qubits with a global accumulation gate

Abstract: Hole spin qubits in undoped Ge/SiGe quantum well structures have advanced rapidly in performance and scalability. However, stringent multi-layer patterning and overlay requirements of conventional overlapping-gate devices create a bottleneck for academic proof-of-concept experiments involving few-qubit devices. Here we present fabrication and measurements of Ge/SiGe spin qubit devices with a global accumulation gate and single-layer depletion fine gates, which substantially reduce fabrication complexity. With careful design of the gate-2DHG capacitance, we demonstrate RF-based single-shot spin readout and coherent control of two single-spin qubits. We also characterize the spin coherence times and exchange tunability, which are similar to those reported in recent overlapping-gate Ge/SiGe spin qubit devices. By simplifying fabrication without sacrificing performance, our approach offers a more accessible device design for spin-based quantum technology research.

• The paper introduces a simplified global gate architecture that enables RF-based spin readout and microwave control in Ge/SiGe hole spin qubits.
• The device achieves high coherence with T2* values comparable to multi-layer devices while reducing fabrication complexity and process turnaround.
• Quantitative analysis shows robust exchange tunability (17.3 mV/dec) and successful single-shot readout with an SNR of 4.6 at 10 μs integration.

Radio Frequency Readout and Microwave Control in Simplified Ge/SiGe Hole Spin Qubit Architectures

Introduction

The implementation and scalable fabrication of high-coherence semiconductor spin qubits remain core challenges for quantum information processing. Recent focus has shifted to Ge/SiGe two-dimensional hole gases (2DHG) due to their high mobility, strong spin-orbit coupling, and increasing material and device uniformity. However, the prevalent overlapping-gate device architectures—featuring multiple stacked electron-beam and dielectric layers—impose significant bottlenecks for fabrication throughput, device yield, and iteration rates, limiting rapid experimental progress in qubit technology research and hybrid quantum systems integration.

This paper introduces a Ge/SiGe spin qubit device utilizing a global accumulation gate and single-layer depletion fine gates, demonstrating that device functionality—including single-shot, RF-based spin readout and microwave-driven single-spin control—can be achieved without the demanding fabrication overhead of overlapping-gate architectures (2607.06342).

Device Architecture and Fabrication Simplification

The reported device stack is comprised of only one ebeam-defined depletion gate layer with a 100 nm minimum pitch, two optically defined layers for ohmic contacts and the global gate, and wide overlay tolerances at the micrometer scale. The active 2DHG is accumulated by biasing a global Al gate, while lateral quantum dots are formed via underlying depletion gates patterned with ebeam lithography. Sputtered Pt provides ohmic contacts. Thin atomic-layer deposition-grown oxides electrically isolate the metal layers.

This architecture eliminates the need for multiple overlay-critical gate layers, thereby significantly reducing both process complexity and turnaround time while enhancing device accessibility for proof-of-concept few-qubit studies. Importantly, the parallel-plate capacitance from the global accumulation gate to the 2DHG is minimized through careful layout, limiting it to ~73 fF—small enough not to impact RF reflectometry impedance matching or charge sensitivity.

Qubit Operation: Charge, Spin Readout, and Control

Charge sensing and spin readout leverage RF reflectometry implemented with standard PCB or chip inductors to form tank circuits. The small additional capacitance from the local 2DHG preserves reflectometry bandwidth and sensitivity, as evidenced by high signal-to-noise measurements during operation. The (1,1)-(0,2) transition in a lateral double quantum dot is probed as a charge sensor using video-mode reflectometry, with qubit and sensor dot states defined by typical gate pulsing protocols.

Spin state initialization and measurement employ Pauli spin blockade; single-shot readout histograms at 10 μs integration times demonstrate clear singlet-triplet separation with an SNR of 4.6. MW excitation applied to the plunger gates directly enables electrically driven spin resonance (EDSR), exploiting the strong intrinsic spin-orbit coupling of Ge holes. Coherent single-spin Rabi oscillations are observed, and Rabi frequencies display a linear dependence on MW amplitude, verifying all-electrical gate control.

Coherence properties were systematically characterized via Ramsey interferometry, yielding $T_2^*$ values of 3.1 μs and 1.9 μs for two independent qubits—parameters that match those observed in state-of-the-art overlapping-gate Ge/SiGe devices under similar conditions. This parity confirms that the device simplification does not induce excess charge noise or decoherence from the enlarged global gate or exposed 2DHG area.

Exchange Tunability and Two-Qubit Coupling

The system demonstrates robust exchange coupling $J$ tunability by modulating the interdot tunnel barrier. Zeeman-split resonance measurements reveal exchange energy splittings $J$ that depend exponentially on the barrier gate bias, as expected. Quantitative extraction shows an exchange tunability of 17.3 mV/dec—again in line with best-performing multi-layer devices. Joint operation of adjacent spins via this mechanism provides the required pathway for two-qubit gate protocols fundamental to quantum error correction and universal quantum computation.

Supplementary experiments show singlet-triplet (S—$T_{-}$) qubit operation with $T_2^* = 1.0$ μs and detailed charge noise measurements, emphasizing the broad applicability of the global-gate device.

Implications for Quantum Technology and Future Directions

This work demonstrates that the strict overlay and patterning requirements typical of overlapping-gate devices are not essential for achieving qubit performance at the current state-of-the-art in Ge/SiGe quantum wells. The global-accumulation-gate, single-depletion-layer architecture is therefore a strong candidate for rapid prototyping, material and stack studies, and the development and benchmarking of higher-level automation and cryoelectronic integration.

A key claim is that the simplified architecture achieves comparable performance to multi-layer devices without introducing additional decoherence or sacrificing electrical tunability. This substantially lowers the entry barrier for academic and small-group research in semiconductor spin qubits, facilitating parallel innovation in device optimization, material metrology, and hybrid system integration.

Despite its clear applicability to linear and few-qubit arrays, the global-gated approach remains less scalable to large two-dimensional qubit arrays due to challenges with cross-capacitance, addressability, and parallelization. Nevertheless, this design is well suited for testbeds enabling fast-feedback for material science, algorithmic training, and exploring hybrid architectures.

Future research should systematically benchmark gate fidelities and error syndromes using advanced quantum benchmarking protocols. Understanding the limitations imposed by global gating on error mitigation, readout multiplexing, and system cross-talk will guide further developments. Integrating this approach with emerging cryo-CMOS and automated tuning stacks will be pivotal for developing practical, modular, and hybrid quantum processors.

Conclusion

The presented global accumulation gate Ge/SiGe spin qubit platform demonstrates that substantial fabrication simplification is possible with no compromise to the critical qubit metrics of $T_2^*$ coherence, charge sensitivity, or exchange tunability. The results extend the utility and accessibility of planar Ge/SiGe qubits and establish a robust baseline architecture for rapid experimentation and exploration in quantum information processing research (2607.06342).