Quantum gates with parametrically driven multi-qubit couplers

Abstract: Superconducting quantum processors could significantly profit from enhanced connectivity together with precise control of interactions and gates between qubits. Here we investigate plaquettes of four qubits that are coupled via a central tunable coupling circuit, so that not only gates between qubits connected by an edge of the plaquette can be executed but also between qubits across the diagonal. By numerically and analytically analyzing parametrically driven processes, we explore $\sqrt{\text{iSWAP}}$-gates between any pair of qubits, also across the diagonal, as well as three-qubit interactions and gates. For experimentally available circuit parameters, we for example find $\sqrt{\text{iSWAP}}$-gates with a gate time of 50 ns and 99.9\% fidelity, which is decreased to 99.4\% if two such gates are executed in parallel on disjoint qubit pairs in the plaquette. For three-qubit gates we find fidelities of 95\% fidelity at a gate time of 200 ns.

• The paper introduces novel architectures using dc-SQUID and SNAIL-based couplers to enable flexible multi-qubit interactions in superconducting circuits.
• It employs parametric flux modulation analyzed via Bessel function responses to achieve high-fidelity (≥0.995) two-qubit and native multi-qubit gate operations within sub-65 ns durations.
• The study demonstrates scalable, all-to-all connectivity within four-qubit clusters, significantly reducing hardware complexity and enabling simultaneous gate execution.

Quantum Gates with Parametrically Driven Multi-Qubit Couplers

Introduction

This paper, "Quantum gates with parametrically driven multi-qubit couplers" (2606.14522), proposes, analyzes, and numerically benchmarks architectures for superconducting quantum processors based on central, parametrically driven multi-qubit couplers. The principal motivation is to overcome the intrinsic connectivity limitations of grid-based architectures with pairwise couplers. The study details the circuit quantization, parametric gate protocols, and practical performance of two main coupler topologies: the dc-SQUID and the SNAIL (Superconducting Nonlinear Asymmetric Inductive eLement) with a $\alpha$-tunable small junction. The work systematically investigates gate times, achievable fidelities, crosstalk, and scalability prospects for both two-qubit and native higher-order multi-qubit gates.

Figure 1: Schematic comparison of rectangular 4-qubit modules using only pairwise couplers (left) and a central multi-qubit coupler (right) in both $2 \times 2$ and larger grids.

Hardware Architectures: dc-SQUID and SNAIL-Based Couplers

The central methodological advance is the design, quantization, and analysis of two coupler types capable of connecting up to four superconducting transmon qubits:

• dc-SQUID Multi-Qubit Coupler: This symmetric device connects four qubits via a flux-tunable inductive element, enabling parametric activation of two-qubit and four-qubit interactions. The dc-SQUID topology eliminates odd-order nonlinearities due to circuit symmetry, facilitating precise modeling and control.

  Figure 2: Schematic of a dc-SQUID-based multi-qubit coupler with four transmon qubits capacitively coupled.

• SNAIL-Based Multi-Qubit Coupler: The SNAIL introduces a tailored asymmetry (via the parameter $\alpha$) that enables controlled activation not only of pairwise gates, but also native multi-qubit (three- and four-body) interactions due to odd-order nonlinearities. This system's nonlinear response is tunable via both the external flux and the $\alpha$ parameter.

  Figure 3: Layout of a SNAIL-based multi-qubit coupler, with three large Josephson junctions and one $\alpha$-tunable junction capacitively coupled to four transmon qubits.

A key design feature is the realization of an on-chip tunable $\alpha$ in the SNAIL, allowing dynamic switching between circuit regimes optimized for either strong pairwise or strong higher-order gates:

Figure 4: Tunable $\alpha$ in the SNAIL via an additional SQUID loop, allowing dynamic selection of regime for multi-qubit gate activation.

Parametric Gate Mechanisms and Analytical Framework

Parametric gates are realized by modulating the coupler with external flux at specific resonance conditions. The authors analyze the time-dependent Hamiltonians using irrotational gauge circuit quantization and Jacobi-Anger expansions to systematically track the generation of linear and nonlinear interaction terms. The Bessel function dependence of effective coupling strengths on drive amplitude and $\alpha$ facilitates regime selection.

Figure 5: Bessel-function components for the SNAIL as a function of drive amplitude $\delta$ for $\alpha=0.3$; tuning $2 \times 2$0 selectively modulates the strength of interaction terms.

A similar analysis for $2 \times 2$1 is given, highlighting the different harmonics in play:

Figure 6: Corresponding Bessel-function amplitudes for the SNAIL at $2 \times 2$2, demonstrating the suppression or enhancement of various-order terms.

The dc-SQUID, being inversion symmetric, supports only even powers of the phase; its parametric response as a function of drive amplitude is detailed in:

Figure 7: Bessel-function components for the SQUID as a function of drive amplitude; only even-order nonlinearities manifest.

Achieving Full-Plaquette Connectivity

A central numerical finding is the demonstration of all-to-all connectivity within a four-qubit cluster via a single coupler. The device supports horizontal, vertical, and diagonal two-qubit gates by frequency-selective parametric activation, with high-fidelity gates achieved irrespective of pair location.

Figure 8: Available two-qubit couplings (horizontal, vertical, diagonal) mediated by a single multi-qubit coupler, controlled via detuning selection.

Fidelity analysis is performed in the full 16-dimensional qubit Hilbert space, with the protocol also benchmarking trace-reduced fidelities for direct comparison to two-qubit-only systems. Exemplary state population evolutions and their fidelities for gates between various pairs are displayed:

Figure 9: Example: State populations for a $2 \times 2$3-gate between qubits 1 and 2 via the dc-SQUID, showing gate duration and high achieved fidelities.

Figure 10: Analogous data for a $2 \times 2$4-gate between qubits 2 and 4.

Figure 11: Example for a diagonal $2 \times 2$5-gate between qubits 2 and 3.

The SNAIL-coupled architecture yields similar metrics, with drives and optimal $2 \times 2$6 chosen per the analytic regime analysis. Achievable gate times are typically $2 \times 2$7 ns, with simulated full-system fidelities $2 \times 2$8, and reduced fidelities routinely $2 \times 2$9.

Native Multi-Qubit Gate Activation

Uniquely, the SNAIL's circuit asymmetry enables the direct (non-perturbative) activation of three- and four-qubit interactions. Proper tuning of $\alpha$0 and drive amplitude yields both strong coupling and minimized spectral spread with respect to spectator qubit states.

The three-qubit interaction is dynamically enabled by setting $\alpha$1, with pulse parameters optimized to maximize the relevant cubic term:

Figure 12: Native three-qubit gate via direct activation of the $\alpha$2 term, with gate duration and achieved fidelity indicated.

For four-qubit gates, a similar protocol is used with an appropriately chosen drive condition:

Figure 13: Native four-qubit gate with $\alpha$3, showing realized state transfer.

Multi-qubit gate fidelities (for the full four-qubit space) reach ~0.95 (three-body) and 0.79 (four-body) without further pulse optimization.

Parallel Gate Execution and Crosstalk Studies

The central coupler architecture supports simultaneous, non-overlapping two-qubit gates by multi-tone driving. The full-system simulation yields a fidelity of $\alpha$4 for two simultaneous $\alpha$5 gates. The residual degradation versus sequential execution is attributed to cross-mode crosstalk and residual ZZ interactions.

Figure 14: Simultaneous execution of two $\alpha$6 gates within a single four-qubit cluster, driven by two-tone parametric pulses.

A detailed sweep of the resonance spread and ZZ crosstalk versus $\alpha$7 is provided (Figures 18–21), demonstrating that the choice $\alpha$8 minimizes both gate-frequency spread and spectator-induced crosstalk.

Gate Performance as a Function of Parameters

Comprehensive analysis is provided for coupling strengths (Figures 22, 23), resonance spreads (Figures 18–20), and fidelities versus gate time (Figure 15). The main constraint for maximizing fidelity is the interplay between drive-induced crosstalk, ac Stark shifts, and achievable coupling strengths; optimal operating points are quantitatively identified.

Figure 16: Resonance spread for all two-qubit gate combinations as a function of $\alpha$9; the minimal spread correlates with optimal crosstalk suppression.

Figure 17: Two-qubit gate resonance spread vs $\alpha$0 and drive amplitude.

Figure 18: Three-qubit gate resonance spread in the same parameter space.

Figure 19: ZZ-crosstalk versus circuit asymmetry; minimized at $\alpha$1.

Figure 20: Calculated absolute value of two-qubit coupling strength as a function of drive parameters; red dot locates the simulation operating point.

Figure 21: Three-qubit coupling strength in the same parameter space.

Figure 15: Achieved fidelities versus gate time for $\alpha$2 gates; longer gates generally access higher fidelities.

Practical and Theoretical Implications

The demonstrated architecture offers several critical advantages for both NISQ-era superconducting quantum computation and analog quantum simulation:

• Reduced Hardware Overhead: Multi-qubit couplers enable all-to-all intra-cell connectivity, dramatically decreasing total coupler count on large chips, directly impacting complexity, crosstalk, and yield.
• Resource-Efficient Error Correction and Simulation: The ability to perform native three- and four-body gates is central for practical quantum LDPC codes, non-planar stabilizer circuits, and efficient simulation of LGTs (lattice gauge theories) with multi-body constraints.
• Benchmark-Competitive Gate Performance: Two-qubit gate fidelities (up to 0.9998 reduced) and sub-65 ns durations are within reach of state-of-the-art pairwise coupler devices, despite the increased circuit complexity and crosstalk risk.
• Scalability and Parallelization: The work details simultaneous, high-fidelity gate execution within a module, presaging efficient mapping of non-local algorithms and error correction routines.

The main open limitations are spectator-induced resonance spreads and residual crosstalk, which are attenuated but not eliminated by parameter optimization. These effects are further compounded when multiple cells are tiled. The study highlights the need for additional control degrees of freedom and possibly hybrid schemes (including tunable-qubit variants) to robustly suppress undesired interactions.

Conclusion

This work provides a comprehensive technical roadmap for the realization and exploitation of parametrically driven multi-qubit couplers in superconducting quantum processors. Gate protocols for dc-SQUID and SNAIL couplers are derived, simulated, and benchmarked, demonstrating that this approach is a viable path to enhanced connectivity, higher-order gate activation, and hardware efficiency. Gate fidelities and times are competitive with state-of-the-art, and the paper identifies operating regimes that minimize crosstalk and resonance spread.

Future developments should address the residual limitations due to single-mode crosstalk and expand the design toward additional tunable degrees of freedom or adaptive qubit-coupler integration. These advances will further support the deployment of scalable, highly connected quantum processors and offer highly compact, high-fidelity realization of complex quantum circuits and analog quantum simulations.