Native topological readout on qubit hardware: a Fibonacci-chain benchmark of measurement-compilation trade-offs

Abstract: Recent demonstrations of non-Abelian braiding of graph vertices on noisy intermediate-scale quantum (NISQ) superconducting processor, and the experimental realization of topological order in general on various quantum hardware platforms necessitate an important question: when does a native (topological) fusion readout genuinely help for topological anyonic Hamiltonians implemented on NISQ hardware? We use the Fibonacci anyons chain as a concrete model for understanding the trade-off between measurement cost and compilation cost in that setting. The comparison is made against a simple grouped-Pauli baseline, and is scored by a covariance-aware mean-squared-error (MSE) of the full energy estimator. We based our benchmark on two different important classes of quantum circuits, namely Floquet time-evolved and variational quantum eigensolver quantum circuits, with the underlying Hamiltonian consisting of both braiding and fusion interaction. Our analysis found that there is not a uniform best method across both problems: the fusion readout method performed better on Floquet-type circuits on both the MSE and covariance-aware sampling variance, while the grouped Pauli method performed better on VQE on the MSE but worse on sampling variance. We derive scaling laws, and compute shot-budget crossover points, where one method is operationally favored above the other. The relevance of this work extends beyond Fibonacci chains to two-dimensional topological models compiled on superconducting and other qubit-native platforms, and can be used as a guide in answering the question of when one should measure in the native operator basis of the target physics, or when it is better to fall back on Pauli-basis reconstruction.

• The paper demonstrates that native fusion readout systematically reduces sampling variance compared to grouped Pauli reconstruction.
• The study benchmarks Fibonacci anyon chain simulations using digital Floquet and VQE circuits to analyze measurement strategy performance under hardware noise.
• Explicit scaling laws and shot-budget crossover points provide operational guidelines for optimizing measurement strategies in topological quantum simulations.

Native Topological Readout on Qubit Hardware: Measurement-Compilation Trade-Offs in Fibonacci Anyon Chains

Motivation and Problem Formulation

The paper "Native topological readout on qubit hardware: a Fibonacci-chain benchmark of measurement-compilation trade-offs" (2605.25913) addresses a fundamental challenge in quantum simulation of topological phases: how should one measure physically natural observables of a topological Hamiltonian, such as those arising from non-Abelian anyons, when they are hosted on qubit-based hardware that provides access only to Pauli measurements? The motivation stems from recent processor-level demonstrations of non-Abelian braiding and encoded topological order on NISQ devices, pushing an operational question: does measurement in a native operator basis provide a practical advantage over Pauli-basis reconstruction when both measurement and compilation costs are considered?

This study uses the Fibonacci anyon chain as a concrete model. The Hamiltonian is formulated in a fusion-path encoding, wherein each qubit stores a fusion channel and only fusion-consistent bit strings represent physical states. The native observables are fusion projectors, and their measurement typically requires basis changes constructed from $F$- and $R$-move primitives. The work quantifies the trade-offs between two measurement strategies: (1) fusion readout, a native frame measurement adapted to the operator structure, and (2) grouped Pauli reconstruction, a baseline constructed from qubit-wise-commuting Pauli groups.

Benchmarking Framework and Methodologies

The estimator-level criterion is formulated as a covariance-aware fixed-budget mean-squared error (MSE) of the full energy estimator, serving as a metric for comparing both measurement strategies. The estimator variance is split into covariance-driven sampling effects and hardware noise contributions, enabling precise analysis of the error dynamics under NISQ constraints:

• Fusion readout involves rotating the state to the operator's native basis and measuring directly.
• Grouped Pauli reconstruction employs a commuting-group Pauli expansion and shared measurement for the local Hamiltonian terms.

Two circuit families are benchmarked: digital Floquet-time-evolved circuits and optimized-state VQE circuits. The digital approach generates controlled ensembles via product-formula Trotterization; the VQE workflow isolates measurement quality by fixing variational parameters in hardware-efficient ansatz circuits optimized noiselessly and then locked for comparison.

Benchmarks are implemented on IBM's superconducting backend, with matched shot budgets and baseline hardware calibrations, thereby separating sampling statistics from device noise and compiled depth.

Numerical Results and Regime Analysis

Rigorous empirical analysis is presented across noiseless simulations and hardware experiments. The salient findings are as follows:

• Fusion readout offers a universal advantage in sampling variance: In all regimes, fusion readout systematically lowers the covariance-driven sampling term as compared to grouped Pauli measurement, aligned with the observable structure of the Fibonacci chain Hamiltonian. In noiseless digital benchmarks, fusion readout wins all cells on sampling variance and most (72/96) on empirical MSE.
• Realized estimator error is regime-dependent: On hardware, the advantage in sampling variance is preserved, but the realized estimator error (empirical MSE) can be reversed due to basis-change circuit overhead and hardware noise. In digital Floquet benchmarks, fusion readout retains a majority of cell wins (71/96), but in optimized-state VQE circuits, grouped Pauli reconstruction dominates (15/16 cells), illustrating a pronounced hardware-induced reversal.
• Scaling laws and crossover points: The work derives explicit scaling laws for the estimator MSE and establishes shot-budget crossover points ($N_c$) where one method becomes operationally favorable. In digital hardware regimes, crossover points lie within practical shot budgets ($N_c \sim 4.5 \times 10^3$), while in VQE hardware benchmarks, circuit depth and basis-change cost push $N_c$ lower ($N_c \sim 10^3$), favoring Pauli-side measurement at typical budgets.
• Circuit depth and compiled measurement overhead: Data reveal that in shallow VQE circuits, the appended fusion readout measurement layer introduces significant hardware cost relative to the state-preparation circuit. In contrast, in deep Floquet circuits, measurement overheads are less prominent, allowing fusion readout’s sampling variance advantage to survive in empirical error.
• Correlation structure: Measurement-count versus error-ratio correlation analyses indicate workload-dependent behavior. In digital Floquet benchmarks, correlation is weak and negative at larger circuit depth steps, while in VQE hardware, measurement overhead correlates positively with the Pauli-favorable error ratio.

Implications, Practical Lessons, and Theoretical Insights

The benchmark demonstrates that measurement strategies physically aligned with encoded topological Hamiltonians provide estimator-level advantages in principle due to reduced sampling variance, quantifiable via covariance-aware MSE metrics. However, compiled hardware execution under realistic NISQ constraints can negate these advantages, primarily through basis-change-induced circuit depth and noise.

Practical takeaways:

• Measurement design for topological models compiled on qubit-native platforms must account for both sampling variance and hardware-induced error.
• The advantage of native fusion readout is not guaranteed; resource-aware analysis (circuit depth, gate count, routing, noise landscape) is essential.
• The empirical workflow and scaling-law criterion developed here serve as operational guides for measurement selection in broader 2D topological models, string-net Hamiltonians, and code-space braiding architectures.

Theoretical implications:

• The estimator framework clarifies the interplay of sampling and hardware errors. The derived crossover scale $N_c$ quantifies the regime boundary where native measurement remains advantageous.
• Basis-change depth and hardware co-design will become increasingly important for topological simulation protocols as device architecture evolves.

Future directions:

• Fault-tolerant architectures may eventually mitigate hardware-induced reversal, relegating basis change to resource overhead rather than accuracy limitation.
• Extension of the benchmarking workflow to more aggressive Pauli-grouping strategies, shadow-protocols, and broader device classes is needed for universal measurement optimization.
• Analytical exploration of topological measurement protocols in surface code architectures and string-net condensation models will benefit from the covariance-aware estimator logic introduced here.

Conclusion

The paper provides a structured framework for evaluating measurement-compilation trade-offs in topological quantum simulations hosted on NISQ qubit hardware. By rigorously comparing native fusion readout against grouped Pauli reconstruction in the context of Fibonacci anyon chains, it establishes that sampling variance advantages of native measurement are genuine but not universally realized in empirical error due to hardware constraints. The developed scaling laws and crossover criterion set operational guidelines for measurement design, with broader applicability to topological models and quantum error correction architectures. The results underscore the necessity of hardware-aware measurement strategies and pave the way for future co-design of native observables and compilation methodologies in quantum simulation.