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Fire and ice: Partially fault-tolerant quantum computing with selective state filtering

Published 14 May 2026 in quant-ph | (2605.15344v1)

Abstract: We develop an error-corrected quantum computation scheme based on concatenating the five-qubit Laflamme code onto the four-qubit Iceberg code. The approach skates a thin line: it is explicitly not fault tolerant, risking higher logical error rates, and it relies on selective filtering to prepare encoded states for error correction, risking significant overhead. Yet, at realistic simulated noise rates, the scheme is reliable and resource efficient. It forges a practical path toward scalable quantum computation.

Summary

  • The paper introduces a concatenated quantum error correction scheme by combining the five-qubit Laflamme code with the four-qubit Iceberg code to achieve practical logical error rates.
  • It employs selective postselection and paired support to construct efficient ancilla preparation circuits, mitigating resource overhead despite non-fault-tolerant state preparation.
  • Simulation results demonstrate that logical errors scale polynomially with code distance while maintaining manageable rejection rates on platforms like trapped ions and neutral atoms.

Partially Fault-Tolerant Quantum Computing with Selective State Filtering

Overview and Context

This work introduces a quantum error correction scheme that concatenates the five-qubit Laflamme code with the four-qubit Iceberg code. The resultant structure pursues reliable logical error rates with resource efficiency in near-term quantum devices, specifically targeting platforms with non-local connectivity such as trapped ions and neutral atoms. The scheme forgoes full fault tolerance in ancilla state-preparation, leveraging selective postselection to filter out higher-error states at the cost of overhead. This approach aims to provide low logical error rates in the range relevant to applications and current hardware, circumventing the substantial resource overhead associated with fully fault-tolerant architectures.

Code Construction and Concatenation Framework

The backbone of the scheme involves concatenating [n,k,d][n,k,d] codes onto the [4,2,2][4,2,2] Iceberg code. The [4,2,2][4,2,2] code is a distance-2 code encoding two logical qubits in four physical qubits. The concatenation leverages the observation that the Iceberg code's logical structure allows natural composition with higher-distance codes, including self-dual CSS codes derived via mappings such as those outlined in Bravyi-Leemhuis-Terhal. The mapping D\mathcal{D} transforms an [n,k,d][n,k,d] stabilizer code into a [n,k,d]4[n,k,d]_4 CSS code, which is then concatenated to yield larger, higher-distance codes: e.g., [5,1,3]∘[4,2,2]=[20,2,6][5,1,3]\circ [4,2,2] = [20,2,6], [3,1,2]4∘2∘[4,2,2]=[36,2,8][3,1,2]_4^{\circ 2} \circ [4,2,2]=[36,2,8], along with [32,4,6][32,4,6] and [48,4,8][48,4,8] alternatives.

An explicit property introduced—paired support—enables efficient preparation circuits by leveraging the structural symmetry of stabilizer generators, a feature prominent in GF(4)-linear codes. This allows efficient circuit compilation for encoding and verification by sharing CNOT gates across paired operators.

Error Correction Protocols and Performance

The scheme employs Steane-style error correction, utilizing preparation of encoded logical [4,2,2][4,2,2]0 and [4,2,2][4,2,2]1 states via non-fault-tolerant but verified circuits. Each ancilla state is tested before use—failures incur preparation retries but do not affect data blocks. The error rates per correction round, under a circuit-level stochastic depolarizing noise model with [4,2,2][4,2,2]2, are reported as:

  • [4,2,2][4,2,2]3 code: logical error rate [4,2,2][4,2,2]4 per CNOT+EC round; rejection rate [4,2,2][4,2,2]5
  • [4,2,2][4,2,2]6 code: logical error rate [4,2,2][4,2,2]7 per CNOT+EC round; rejection rate [4,2,2][4,2,2]8

Notably, these schemes exhibit logical error and rejection rates at or below target thresholds for practical quantum computing, given current hardware fidelities in the [4,2,2][4,2,2]9 to [4,2,2][4,2,2]0 range. Simulation data show that, provided the rejection-to-error ratio remains [4,2,2][4,2,2]1, the overhead from postselection is manageable (e.g., [4,2,2][4,2,2]2 increase in runtime).

The simulations demonstrate that even in the absence of full ancilla fault tolerance, logical error rates scale polynomially with code distance, with logical errors (for even distance [4,2,2][4,2,2]3) scaling as [4,2,2][4,2,2]4, and rejections as [4,2,2][4,2,2]5. For the considered codes, the rejection rates are sufficiently low in the relevant [4,2,2][4,2,2]6 range, ensuring postselection overhead does not dominate.

State Preparation and Overhead Mitigation

Detailed encoding circuits are provided for each code, emphasizing resource efficiency. For larger codes such as [4,2,2][4,2,2]7 and [4,2,2][4,2,2]8, a two-stage ancilla factory strategy is implemented: initial preparation and verification of smaller code-encoded blocks, then adaptive combination into the full ancilla. This minimizes resource wastage—conditional acceptance probabilities and expected CNOT gate counts are significantly reduced relative to naïve, monolithic preparation.

Crucially, the non-fault-tolerant preparation circuits, while allowing some low-order fault leakage, maintain negligible logical error contribution except at very small [4,2,2][4,2,2]9. Histograms of logical error orders confirm that, except in the extreme low-noise regime, higher-order faults dominate error processes, validating the practical efficacy of selective filtering.

Logical Gate Implementation

Logical Clifford gates are addressed through transversal CNOT and Hadamard operations, with internal qubit permutations enabling targeting among multiple logical qubits per block. Notably, logical CNOTs between D\mathcal{D}0-qubit code blocks require only D\mathcal{D}1 rounds of transversal operations, an efficient scaling in the context of non-local architectures.

Empirical analysis of logical CNOT implementation shows an increase in logical error and rejection rates relative to error correction-only rounds, primarily due to error propagation across code blocks. Use of correlated decoders and teleportation-based gate schemes can mitigate this, though at increased state-preparation cost. Acceptance rates for Bell-type ancillas remain within practical bounds due to two-stage production methods.

Non-Clifford Extensions

For universality, the scheme contemplates physical-layer D\mathcal{D}2 rotations supplemented with error detection for small-angle non-Clifford gates, and logical-level gate synthesis or magic state distillation for more general rotations. While detailed overhead analyses for these protocols are deferred, the foundation established supports modular improvements via standard distillation frameworks.

Implications and Future Directions

The proposed scheme demonstrates that sacrificing strict fault tolerance in state-preparation—mitigated by selective filtering—enables moderate-scale, resource-efficient quantum computation for current and near-term devices with mobile qubit architectures. Its modular construction and reliance on small, high-performance codes make it adaptable as hardware capabilities improve.

Pragmatically, the work delineates an operational regime distinct from surface code–based architectures: moderate code distances, low qubit and gate overhead, and efficiency rooted in non-geometric connectivity. Theoretically, it underscores the utility of code concatenation, paired support, and flexible postselection as alternatives to large-code asymptotics.

Future research may focus on extending postselection analyses, optimizing logical non-Clifford gate protocols, and exploring tailored decoding strategies at the circuit level. Investigation of leakage/loss resilience, as well as experimental integration and performance on hardware, are natural next steps.

Conclusion

This research articulates and substantiates a partially fault-tolerant paradigm for quantum error correction, predicated on the concatenation of small codes and selective state filtering. By forgoing strict fault tolerance in ancilla production in favor of postselection, the scheme achieves practical logical error rates and manageable overhead for the intended error regime and hardware class. This work advances the landscape of scalable, moderate-scale quantum computation using efficient code constructions and provides a foundation for further refinement in fault-tolerant protocol engineering.

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