Deployment-Aligned Low-Precision Neural Architecture Search for Spaceborne Edge AI

Abstract: Designing deep networks that meet strict latency and accuracy constraints on edge accelerators increasingly relies on hardware-aware optimization, including neural architecture search (NAS) guided by device-level metrics. Yet most hardware-aware NAS pipelines still optimize architectures under full-precision assumptions and apply low-precision adaptation only after the search, leading to a mismatch between optimization-time behavior and deployment-time execution on low-precision hardware that can substantially degrade accuracy. We address this limitation by integrating deployment-aligned low-precision training directly into hardware-aware NAS. Candidate architectures are exposed to FP16 numerical constraints during fine-tuning and evaluation, enabling joint optimization of architectural efficiency and numerical robustness without modifying the search space or evolutionary strategy. We evaluate the proposed framework on vessel segmentation for spaceborne maritime monitoring, targeting the Intel Movidius Myriad X Visual Processing Unit (VPU). While post-training precision conversion reduces on-device performance from 0.85 to 0.78 mIoU, deployment-aligned low-precision training achieves 0.826 mIoU on-device for the same architecture (95,791 parameters), recovering approximately two-thirds of deployment-induced accuracy gap without increasing model complexity. These results demonstrate that incorporating deployment-consistent numerical constraints into hardware-aware NAS substantially improves robustness and alignment between optimization and deployment for resource-constrained edge AI.

• The paper presents a deployment-aligned low-precision neural architecture search that integrates FP16-aware fine-tuning into the NAS loop, reducing quantization-induced accuracy loss.
• It employs a population-based genetic algorithm to optimize architectures on Intel® Movidius™ Myriad™ X hardware, balancing segmentation accuracy (mIoU) and throughput (FPS).
• Experimental results indicate enhanced structural fidelity and real-time segmentation, making the method promising for CubeSat and small satellite edge deployments.

Deployment-Aligned Low-Precision Neural Architecture Search for Spaceborne Edge AI

Motivation and Problem Statement

The research addresses the fundamental challenge of optimizing neural network architectures for strict latency and accuracy requirements on spaceborne edge accelerators, particularly those operating under low-precision arithmetic. Standard hardware-aware NAS pipelines primarily optimize under full-precision (FP32) assumptions, relegating reduced-precision adaptation—such as FP16 quantization—to a post-training step. This practice introduces a significant gap between optimization-time and deployment-time performance, leading to substantial accuracy losses when models are executed on low-precision platforms such as Intel® Movidius™ Myriad™ X VPUs.

Methodological Framework

The proposed framework integrates deployment-aligned low-precision training directly within the hardware-aware NAS optimization loop.

Architecture Search and Genetic Algorithm:

Candidate architectures are generated via a population-based genetic algorithm operating on a discrete search space of convolutional blocks and macro-primitives, with hyperparameters covering kernel sizes, channel widths, and activation functions. Fitness is computed as a function of both throughput and segmentation accuracy, measured directly on the target hardware.

Dual Evaluation Regimes:

Each candidate undergoes two regimes:

• PTQ Baseline: FP32-trained model exported to FP16 for deployment, following standard post-training quantization practices.
• Deployment-Aligned Fine-Tuning: FP16-aware fine-tuning is applied, simulating reduced-precision effects via fake-quantization projections, activation clipping, and weight rounding with straight-through estimation during the forward pass. This approach preserves optimizer stability while aligning numerical precision with the deployment pipeline.

Figure 1: Structured depiction of NAS workflow, contrasting PTQ conversion (A1–A2) with deployment-aligned FP16 fine-tuning (B1–B2), and direct on-device metric feedback guiding selection.

By evaluating both post-training and deployment-aligned variants, the search process jointly optimizes for structural efficiency and numerical robustness, with no modification to the search space or genetic strategy.

Experimental Results

Quantitative Analysis

Experiments are performed on HRSC2016 for vessel segmentation, utilizing binary masks refined from bounding box annotations. Evaluation metrics include mean Intersection-over-Union (mIoU) and on-device FPS, with all tests performed on actual Intel® Movidius™ Myriad™ X hardware.

Figure 2: Quantitative analysis showing IoU–FPS trade-offs, NAS fitness evolution, and maximum/minimum trends for PTQ (top) versus FP16-aware (bottom) training.

Deployment-aligned FP16 fine-tuning substantially reduces accuracy loss compared to conventional PTQ. The best architecture (95,791 params) exhibits a baseline 0.85 mIoU under FP32 GPU training, dropping to 0.78 mIoU post-PTQ, whereas FP16-aware fine-tuning recovers performance to 0.826 mIoU—preserving two-thirds of the accuracy lost to deployment-induced quantization.

Additional metrics show improved convergence stability and lower fitness variance per generation under deployment-aligned optimization. The IoU–FPS distribution narrows, reflecting greater robustness across the candidate pool and enhanced reliability for real-time onboard segmentation.

Qualitative Evaluation

Qualitative review demonstrates the structural superiority of deployment-aligned models. PTQ conversions often induce fragmented vessel contours and internal holes, especially for elongated or low-contrast ships, increasing false negatives and reducing morphological fidelity.

Figure 3: Segmentation outputs highlighting (left to right) ground truth, FP32 prediction, PTQ prediction, and FP16-aware prediction. FP16 training preserves connectivity and reduces missed detections.

Deployment-aligned FP16 training preserves vessel continuity, hull morphology, and recall for challenging cases without increasing parameter count. This points to improved operational reliability under realistic edge deployment constraints.

Implications and Future Directions

The findings show that NAS pipelines must incorporate deployment-time numerical regimes for robust spaceborne edge AI. Structural efficiency alone is insufficient; exposure to target hardware precision during optimization is critical for reliable, autonomous inference in resource-constrained, safety-critical environments.

Practical Implications:

Space missions leveraging onboard inference capability benefit from reduced downlink latency, accelerated event identification, and improved autonomy. The approach enables compact models with real-time throughput, suitable for CubeSats and small satellites operating on commercial off-the-shelf accelerators.

Theoretical Directions:

Future research will extend deployment-aligned optimization to integer-only and mixed-precision hardware, unify optimization of accuracy, throughput, and energy consumption, and further investigate co-design strategies that holistically address architectural and numerical robustness.

Conclusion

Integrating deployment-aligned low-precision training within hardware-aware NAS mitigates the optimization–deployment mismatch, yielding architectures with improved accuracy and operational stability on FP16 edge platforms. The approach demonstrates clear advantages over conventional post-training adaptation, and establishes that true deployment-centric NAS must explicitly reflect numerical execution regimes to ensure robust performance in spaceborne edge applications.

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